JPH0328596U - - Google Patents
Info
- Publication number
- JPH0328596U JPH0328596U JP8546389U JP8546389U JPH0328596U JP H0328596 U JPH0328596 U JP H0328596U JP 8546389 U JP8546389 U JP 8546389U JP 8546389 U JP8546389 U JP 8546389U JP H0328596 U JPH0328596 U JP H0328596U
- Authority
- JP
- Japan
- Prior art keywords
- parallel
- serial
- input
- output terminal
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000002457 bidirectional effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Static Random-Access Memory (AREA)
Description
第1図は本考案のパラレルメモリーの構成図で
ある。
1……パラレルメモリー、2……パラレルデー
タ入出力端子、3……パラレルアドレス入力端子
、4……シリアルパラレル双方向変換回路、5…
…シリアルパラレル変換回路。
FIG. 1 is a block diagram of a parallel memory according to the present invention. 1...Parallel memory, 2...Parallel data input/output terminal, 3...Parallel address input terminal, 4...Serial-parallel bidirectional conversion circuit, 5...
...Serial to parallel conversion circuit.
Claims (1)
ラレルメモリーにおいて、パラレル入力端子のい
ずれかひとつ、またパラレル出力端子のいずれか
ひとつをテスト機能により、それぞれシリアル入
力端子、シリアル出力端子とすることを特徴とす
る半導体試験回路。 In a parallel memory having a rewritable multi-pin input/output terminal, one of the parallel input terminals and one of the parallel output terminals can be used as a serial input terminal and a serial output terminal, respectively, using a test function. Semiconductor test circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8546389U JPH0328596U (en) | 1989-07-20 | 1989-07-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8546389U JPH0328596U (en) | 1989-07-20 | 1989-07-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0328596U true JPH0328596U (en) | 1991-03-22 |
Family
ID=31634613
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8546389U Pending JPH0328596U (en) | 1989-07-20 | 1989-07-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0328596U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008139606A1 (en) * | 2007-05-14 | 2008-11-20 | Advantest Corporation | Testing apparatus |
-
1989
- 1989-07-20 JP JP8546389U patent/JPH0328596U/ja active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008139606A1 (en) * | 2007-05-14 | 2008-11-20 | Advantest Corporation | Testing apparatus |
US8072232B2 (en) | 2007-05-14 | 2011-12-06 | Advantest Corporation | Test apparatus that tests a device under test having a test function for sequentially outputting signals |
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