JPH0326674Y2 - - Google Patents
Info
- Publication number
- JPH0326674Y2 JPH0326674Y2 JP7265585U JP7265585U JPH0326674Y2 JP H0326674 Y2 JPH0326674 Y2 JP H0326674Y2 JP 7265585 U JP7265585 U JP 7265585U JP 7265585 U JP7265585 U JP 7265585U JP H0326674 Y2 JPH0326674 Y2 JP H0326674Y2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- circuit
- operational amplifier
- power supply
- supply voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229920006395 saturated elastomer Polymers 0.000 claims description 14
- 230000010356 wave oscillation Effects 0.000 claims description 7
- 230000010355 oscillation Effects 0.000 description 10
- 239000003990 capacitor Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000007599 discharging Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
Description
【考案の詳細な説明】
産業上の利用分野
本考案は、方形発振回路に関するもので、発振
周波数の電源電圧による変動特性を改善するもの
である。[Detailed Description of the Invention] Industrial Application Field The present invention relates to a rectangular oscillation circuit, and is intended to improve the fluctuation characteristics of the oscillation frequency depending on the power supply voltage.
従来の技術
一般に方形波発振回路は、演算増幅器の正帰還
路の入力側にバイアス供給回路を接続し、かつ負
帰還路に時定数回路を接続しているが、前記演算
増幅器の飽和出力電圧VOは電源電圧VCCの変化に
対し、第７図に示すようにΔVだけ低い電圧とな
る特性を有している。2. Description of the Related Art In general, a square wave oscillation circuit has a bias supply circuit connected to the input side of the positive feedback path of an operational amplifier, and a time constant circuit connected to the negative feedback path. O has a characteristic that the voltage decreases by ΔV with respect to a change in the power supply voltage V CC as shown in FIG.
考案が解決しようとする問題点
この場合、電源電圧VCCが充分に高くとれる場
合には、電源電圧VCCの変動に伴う発振周波数の
変動は少ないが、電源電圧VCCが低い場合におい
ては、電源電圧VCCと増幅器の飽和出力電圧VOと
の比、すなわちVCC／VOが大きくなるので、電源
電圧VCCの変動によつて発振周波数が大きく変動
するという欠点があつた。Problems to be solved by the invention In this case, if the power supply voltage V CC can be kept high enough, there will be little variation in the oscillation frequency due to fluctuations in the power supply voltage V CC , but if the power supply voltage V CC is low, then Since the ratio between the power supply voltage V CC and the saturated output voltage V O of the amplifier, ie, V CC /V O, increases, there is a drawback that the oscillation frequency fluctuates greatly due to fluctuations in the power supply voltage V CC .
本考案は、上記の欠点を解消することを目的と
したものである。 The present invention aims to eliminate the above-mentioned drawbacks.
問題点を解決するための手段
本考案は、上記の問題点を解決するため、電源
電圧あるいは温度の変化によつて変動する演算増
幅器の飽和出力電圧の値を、演算増幅器の非反転
入力電圧（V+H），（V+L）の両電圧値に作用させ
るように、バイアス供給回路と電源との間に電圧
制御素子を挿入し、演算増幅器の飽和出力電圧の
変動値と、電圧制御素子を挿入したバイアス供給
回路の供給電圧の変動値とを合致させるよう構成
したものである。Means for Solving the Problems In order to solve the above problems, the present invention calculates the value of the saturated output voltage of an operational amplifier, which fluctuates due to changes in power supply voltage or temperature, from the non-inverting input voltage ( A voltage control element is inserted between the bias supply circuit and the power supply so that it acts on both the voltage values of V +H ) and (V +L ), and the fluctuation value of the saturated output voltage of the operational amplifier and the voltage control element The circuit is configured to match the variation value of the supply voltage of the bias supply circuit in which the bias supply circuit is inserted.
作 用
このような本考案の方形波発振回路では、バイ
アス供給回路に電圧制御素子を挿入して、バイア
ス供給回路からの供給電圧の変動を、演算増幅器
の飽和出力電圧VOの変動に合致するように、バ
イアス供給回路の電源電圧を演算増幅器の飽和出
力電圧VOにシフトさせて、電源電圧あるいは温
度の変化による周波数の変化を除去することがで
きる。Function In the square wave oscillation circuit of the present invention, a voltage control element is inserted into the bias supply circuit to match fluctuations in the supply voltage from the bias supply circuit to fluctuations in the saturated output voltage V O of the operational amplifier. By shifting the power supply voltage of the bias supply circuit to the saturated output voltage V O of the operational amplifier, it is possible to eliminate changes in frequency due to changes in power supply voltage or temperature.
実施例
以下、本考案をその実施例を示す図面にもとづ
いて説明する。第１図において、１は演算増幅器
で、この演算増幅器１の正帰還路の入力側に抵抗
R1，R2よりなるバイアス供給回路を接続してい
る。また演算増幅器１の負帰還路にはコンデンサ
Ｃと抵抗R4とよりなる時定数回路を接続してい
る。そしてまた前記抵抗R4と演算増幅器１の正
帰還路の入力側との間には抵抗R3を接続してい
る。２は抵抗R1，R2よりなるバイアス供給回路
と電源との間に接続された電圧制御素子で、この
電圧制御素子２はバイアス供給回路の供給電圧が
前記演算増幅器１の飽和出力電圧VOに合致する
ように電源電圧を制御する。すなわち演算増幅器
１の飽和出力電圧VOと電源電圧VCCとの差にほぼ
等しい電圧ΔVだけ電源電圧VCCを降下させて、
その降下した電圧をバイアス供給回路の供給電圧
とするようにしたものである。そしてこの電圧制
御素子２は一実施例として第２図に示すように複
数個のダイオードＤにより構成している。Embodiments Hereinafter, the present invention will be explained based on drawings showing embodiments thereof. In Figure 1, 1 is an operational amplifier, and a resistor is connected to the input side of the positive feedback path of this operational amplifier 1.
A bias supply circuit consisting of R 1 and R 2 is connected. Further, a time constant circuit consisting of a capacitor C and a resistor R4 is connected to the negative feedback path of the operational amplifier 1. Furthermore, a resistor R 3 is connected between the resistor R 4 and the input side of the positive feedback path of the operational amplifier 1. Reference numeral 2 denotes a voltage control element connected between a bias supply circuit consisting of resistors R 1 and R 2 and a power supply, and this voltage control element 2 is configured such that the supply voltage of the bias supply circuit is set to the saturation output voltage V O of the operational amplifier 1. Control the power supply voltage to match the That is, by lowering the power supply voltage V CC by a voltage ΔV that is approximately equal to the difference between the saturated output voltage V O of the operational amplifier 1 and the power supply voltage V CC ,
The dropped voltage is used as the supply voltage of the bias supply circuit. This voltage control element 2 is constituted by a plurality of diodes D as shown in FIG. 2 as an example.
第１図の回路は、演算増幅器１を電圧比較器と
して用いることにより、演算増幅器１の非反転入
力電圧V+と反転入力電圧VCとを比較し、V+＞
VCのとき、演算増幅器１の飽和出力電圧VOは、
電源電圧VCCより演算増幅器１の回路構成上発生
する電圧降下ΔVだけ低い電圧となり、またV+＜
VCのとき、演算増幅器１の飽和出力電圧VOはゼ
ロ近くになるような動作を繰り返して発振状態を
持続している。 The circuit of FIG. 1 compares the non-inverting input voltage V + and the inverting input voltage V C of the operational amplifier 1 by using the operational amplifier 1 as a voltage comparator, and calculates that V + >
When V C , the saturated output voltage V O of operational amplifier 1 is
The voltage is lower than the power supply voltage V CC by the voltage drop ΔV caused by the circuit configuration of operational amplifier 1, and V + <
When V C , the saturated output voltage V O of the operational amplifier 1 repeats an operation that becomes close to zero, thereby maintaining an oscillation state.
第３図において、演算増幅器１の飽和出力電圧
VOがVO＝VCC−ΔVのとき、演算増幅器１の非反
転入力電圧V+Hは、キルヒホツフの法則により、
VCC＝R2・i2＋（R1＋R2）i1……(1)
VO＝R2・i1＋（R2＋R3）i2……(2)
となり、この２つの式からi1，i2を求めて非反転
入力電圧V+Hを算出すると、
V+H＝R2（i1＋i2）＝
R1／／R2・VO／R1／／R2＋R3＋R2／／R3＋VCC／R2
／／R3＋R1……(3)
となる。 In Figure 3, the saturated output voltage of operational amplifier 1
When V O is V O = V CC −ΔV, the non-inverting input voltage V +H of operational amplifier 1 is V CC = R 2 · i 2 + (R 1 + R 2 ) i 1 ... according to Kirchhoff's law. (1) V O = R 2 · i 1 + (R 2 + R 3 ) i 2 ...(2) If we obtain i 1 and i 2 from these two equations and calculate the non-inverting input voltage V +H , , V +H = R 2 (i 1 + i 2 ) = R 1 //R 2・V O /R 1 //R 2 +R 3 +R 2 //R 3 +V CC /R 2
//R 3 + R 1 ...(3).
また第４図において、演算増幅器１の飽和出力
電圧VOがゼロのとき、演算増幅器１の非反転入
力電圧V+Lは、(3)式において、VO＝０とすると
V+L＝VCC・R2／／R3／R1＋R2／／R3 ……(4)
となる。 In addition, in FIG. 4, when the saturated output voltage V O of the operational amplifier 1 is zero, the non-inverting input voltage V +L of the operational amplifier 1 is expressed as V +L = V in equation (3), assuming V O = 0. CC・R 2 //R 3 /R 1 +R 2 //R 3 ...(4).
一方、演算増幅器１が飽和出力電圧VOがVO＝
VCC−ΔVのときのコンデンサＣの充電中の電圧
VCHは、
−C1／R4ｔ ……(5)
VCH＝VO（１−ε ）
となり、また演算増幅器１の出力電圧VOがゼロ
のときのコンデンサＣの放電中の電圧VCLは、
−１／CR4ｔ
VCL＝V+H・ε ……(6)
となる。 On the other hand, the saturated output voltage V O of operational amplifier 1 is V O =
Voltage during charging of capacitor C when V CC −ΔV
V CH is -C1/R 4 t (5) V CH =V O (1-ε), and the voltage V CL during discharge of capacitor C when the output voltage V O of operational amplifier 1 is zero is −1/CR 4 t V CL =V +H ·ε (6).
ここにおいて、方形波発振回路の発振周波数の
安定度を考えると、コンデンサＣの充電時間tHと
放電時間tLが一定であることが必要である。そし
て充電時間tHはV+H＝VCHを満たす時間であり、
また放電時間tLはV+L＝VCLを満たす時間である。
この場合、充電時間tHおよび放電時間tLが電源電
圧の変動があつても一定であるためには、V+Hと
VCHおよびV+LとVCLの変化率が同一であればよ
く、したがつて前述した１式におけるVCCおよび
４式におけるVCCをそれぞれVO＝VCC−ΔVとすれ
ば、
V+H＝VO・R1／／R2／R1／／R2＋R3＋VCC・R2／／R3
／R2／／R3＋R1→
VO・R1／／R2／R1／／R2＋R3＋VO・R2／／R3／R2／
／R3＋R1
V+L＝VCC・R2／／R3／R1＋R2／／R3→VO・R2／／R3
／R1＋R2／／R3
となつて、コンデンサＣの充電中の電圧VCHと、
V+HはともにVOに関係して決められ、一方VCLと
V+Lもまた同様にVOに関係してのみ決められるた
め、電源電圧VCCの変化には影響されなくなる。 Here, considering the stability of the oscillation frequency of the square wave oscillation circuit, it is necessary that the charging time t H and discharging time t L of the capacitor C be constant. And charging time t H is the time to satisfy V +H = V CH ,
Further, the discharge time t L is a time that satisfies V + L = V CL .
In this case, in order for the charging time t H and discharging time t L to remain constant even when the power supply voltage fluctuates, V + H and
It is sufficient that the rate of change of V CH and V +L is the same as that of V CL . Therefore, if V CC in Equation 1 and V CC in Equation 4 are respectively V O = V CC −ΔV, then V + H =V O・R 1 //R 2 /R 1 //R 2 +R 3 +V CC・R 2 //R 3
/R 2 //R 3 +R 1 → V O・R 1 //R 2 /R 1 //R 2 +R 3 +V O・R 2 //R 3 /R 2 /
/R 3 +R 1 V +L =V CC・R 2 //R 3 /R 1 +R 2 //R 3 →V O・R 2 //R 3
/R 1 +R 2 //R 3 , the voltage V CH during charging of capacitor C,
Both V +H are determined in relation to V O , while V CL and
Since V +L is similarly determined only in relation to V O , it is no longer affected by changes in the power supply voltage V CC .
そこで本考案は、前述した１式および４式の電
源電圧VCCをVO＝VCC−ΔVとするために、バイア
ス供給回路を構成する抵抗R1，R2のうち、抵抗
R1と電源との間にΔVの電圧制御を行なう電圧制
御素子２を直列に接続したものである。このΔV
なる電圧制御を行なう電圧制御素子２としては、
演算増幅器１の出力段がトランジスタで構成され
ている場合は、第２図に示すように複数個のダイ
オードＤを用いると、良好な結果が得られる。 Therefore, in the present invention, in order to set the power supply voltage V CC of the above-mentioned equations 1 and 4 to V O = V CC −ΔV, the resistors R 1 and R 2 constituting the bias supply circuit are
A voltage control element 2 that performs voltage control by ΔV is connected in series between R 1 and the power supply. This ΔV
The voltage control element 2 that performs voltage control is as follows.
When the output stage of the operational amplifier 1 is composed of transistors, good results can be obtained by using a plurality of diodes D as shown in FIG.
つまり、演算増幅器の出力段のトランジスタの
飽和電圧ΔVに相当する電圧を電圧制御素子２で
得る場合、これに流入する電流は出力段のトラン
ジスタに流れる電流に比べて小さいため、複数個
のダイオードＤを用いることにより同じ程度の電
圧を得ることができるものである。 In other words, when the voltage control element 2 obtains a voltage corresponding to the saturation voltage ΔV of the transistor in the output stage of the operational amplifier, the current flowing into it is smaller than the current flowing in the transistor in the output stage, so multiple diodes D The same voltage can be obtained by using .
第５図は本考案の他の実施例を示したもので、
この第５図はΔVなる電圧制御を行なう電圧制御
素子２を他の演算増幅器３からなる電圧保持回路
２により構成したものである。そしてこの電圧保
持回路２は演算増幅器１の飽和出力電圧VOを保
持しながら抵抗R1，R2からなるバイアス供給回
路に電圧を供給するものである。 FIG. 5 shows another embodiment of the present invention.
In FIG. 5, a voltage control element 2 that performs voltage control by ΔV is constructed by a voltage holding circuit 2 comprising another operational amplifier 3. In FIG. The voltage holding circuit 2 maintains the saturated output voltage V O of the operational amplifier 1 while supplying voltage to the bias supply circuit composed of resistors R 1 and R 2 .
第６図は第２図で示した方形波発振回路を２個
連結した回路の構成を示したものである。 FIG. 6 shows the configuration of a circuit in which two square wave oscillation circuits shown in FIG. 2 are connected.
考案の効果
以上のように本考案によれば、演算増幅器の正
帰還路の入力側に接続されるバイアス供給回路と
電源との間に、バイアス供給回路の供給電圧が前
記演算増幅器の飽和出力電圧に合致するように電
源電圧を制御する電圧制御素子を挿入しているた
め、電源電圧の変動があつても、バイアス供給回
路への供給電圧は、演算増幅器の飽和出力電圧に
合致したものを得ることができ、その結果電源電
圧の変動により発振周波数は変動するということ
はない。Effects of the Invention As described above, according to the present invention, when the supply voltage of the bias supply circuit is connected to the input side of the positive feedback path of the operational amplifier and the power supply, the supply voltage of the bias supply circuit is set to the saturation output voltage of the operational amplifier. Since a voltage control element is inserted to control the power supply voltage to match the voltage, even if the power supply voltage fluctuates, the voltage supplied to the bias supply circuit will match the saturation output voltage of the operational amplifier. As a result, the oscillation frequency does not fluctuate due to fluctuations in the power supply voltage.
第１図および第２図は本考案の一実施例を示す
方形波発振回路図、第３図および第４図は同発振
回路における演算増幅器の非反転入力電圧の説明
図、第５図は同発振回路の他の実施例を示す回路
図、第６図は同発振回路を２個連結した回路構成
図、第７図は演算増幅器の飽和出力電圧特性を示
す図である。
１……演算増幅器、R1，R2……バイアス供給
回路、２……電圧制御素子、Ｃ，R4……時定数
回路、３……電圧保持回路。
1 and 2 are square wave oscillation circuit diagrams showing one embodiment of the present invention, FIGS. 3 and 4 are explanatory diagrams of the non-inverting input voltage of the operational amplifier in the oscillation circuit, and FIG. 5 is the same. FIG. 6 is a circuit diagram showing another embodiment of the oscillation circuit, FIG. 6 is a circuit configuration diagram in which two of the same oscillation circuits are connected, and FIG. 7 is a diagram showing saturation output voltage characteristics of an operational amplifier. DESCRIPTION OF SYMBOLS 1...Operation amplifier, R1 , R2 ...Bias supply circuit, 2...Voltage control element, C, R4 ...Time constant circuit, 3...Voltage holding circuit.
Claims (1)
回路を接続し、かつ負帰還路に時定数回路を接続
した方形波発振回路であつて、電源電圧あるいは
温度の変化によつて変動する演算増幅器の飽和出
力電圧の値を、演算増幅器の非反転入力電圧
（V+H），（V+L）の両電圧値に作用されるように前
記バイアス供給回路と電源との間に電圧制御素子
を挿入し、演算増幅器の飽和出力電圧の電源電圧
あるいは温度の変化による変動値と、電圧制御素
子を挿入したバイアス供給回路の供給電圧の電源
電圧あるいは温度の変化による変動値とを合致さ
せるよう構成した方形波発振回路。 A square wave oscillation circuit that connects a bias supply circuit to the input side of the positive feedback path of an operational amplifier and a time constant circuit to the negative feedback path, and is a square wave oscillator circuit that is used for operational amplifiers that fluctuate due to changes in power supply voltage or temperature. A voltage control element is inserted between the bias supply circuit and the power supply so that the value of the saturated output voltage is affected by both the voltage values of the non-inverting input voltages (V +H ) and (V +L ) of the operational amplifier. The rectangular shape is configured to match the fluctuation value of the saturated output voltage of the operational amplifier due to a change in power supply voltage or temperature with the fluctuation value due to a change in power supply voltage or temperature of the supply voltage of a bias supply circuit in which a voltage control element is inserted. Wave oscillation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7265585U JPS615027U (en) | 1985-05-16 | 1985-05-16 | square wave oscillation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7265585U JPS615027U (en) | 1985-05-16 | 1985-05-16 | square wave oscillation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS615027U JPS615027U (en) | 1986-01-13 |
| JPH0326674Y2 true JPH0326674Y2 (en) | 1991-06-10 |
Family
ID=30611268
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7265585U Granted JPS615027U (en) | 1985-05-16 | 1985-05-16 | square wave oscillation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS615027U (en) |
-
1985
- 1985-05-16 JP JP7265585U patent/JPS615027U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS615027U (en) | 1986-01-13 |
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