JPH03185755A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH03185755A JPH03185755A JP1325103A JP32510389A JPH03185755A JP H03185755 A JPH03185755 A JP H03185755A JP 1325103 A JP1325103 A JP 1325103A JP 32510389 A JP32510389 A JP 32510389A JP H03185755 A JPH03185755 A JP H03185755A
- Authority
- JP
- Japan
- Prior art keywords
- source
- terminal
- current
- wire
- current detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 37
- 238000001514 detection method Methods 0.000 claims description 37
- 238000000034 method Methods 0.000 abstract description 6
- 230000004075 alteration Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Landscapes
- Wire Bonding (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はソース電流の過電流検出を行なうことのできる
半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device capable of detecting overcurrent of source current.
従来、かかる半導体装置の過電流を検出するためには、
半導体装置のソースを流れる電流を外部に取り出し、分
流して電流検出回路により検出している。すなわち、分
流により取り出した電流は、過電流検出用の回路により
半導体装置の出力電流が過大とならないように制御する
ために用いられる。Conventionally, in order to detect overcurrent in such a semiconductor device,
The current flowing through the source of the semiconductor device is extracted to the outside, shunted, and detected by a current detection circuit. That is, the current taken out by the shunt is used by an overcurrent detection circuit to control the output current of the semiconductor device so that it does not become excessive.
第２図は従来の一例を説明するための半導体装置とその
電流検出回路の接続図である。FIG. 2 is a connection diagram of a semiconductor device and its current detection circuit for explaining a conventional example.
第２図に示すように、樹脂封止型半導体装置１０Ａは通
常のソース端子６．ゲート端子８．ドレイン端子９を有
するパワーＭＯ３ＦＥＴであり、これの過電流をチエツ
クする過電流検出回路２０は抵抗１６と、二つのオペア
ンプ１３および１４と、基準電源１５とを有している。As shown in FIG. 2, the resin-sealed semiconductor device 10A has a normal source terminal 6. Gate terminal 8. This is a power MO3FET having a drain terminal 9, and an overcurrent detection circuit 20 for checking overcurrent in the MO3FET includes a resistor 16, two operational amplifiers 13 and 14, and a reference power supply 15.
すなわち、入力端子１１はソース端子６に接続されてお
り、出力端子１２はゲート端子８に接続されている。半
導体装置１０Ａの検出用電流により抵抗１６の両端に電
圧降下が生ずる。この電圧降下分を第一のオペアンプ１
３で増幅し、しかる後第二のオペアンプ１４で比較用基
準電源１５の電圧と比較する。この第一のオペアンプ１
３の出力は第二のオペアンプ１４の負側入力に接続され
、比較用電源１５の電圧より大きい場合には、オペアン
プ１４の出力は接地電位となる。従って、ダイオード１
７および出力端子１２を通してゲート端子８は接地され
、出力電流は遮断される。That is, the input terminal 11 is connected to the source terminal 6, and the output terminal 12 is connected to the gate terminal 8. A voltage drop occurs across the resistor 16 due to the detection current of the semiconductor device 10A. This voltage drop is applied to the first operational amplifier 1.
3, and then compared with the voltage of the comparison reference power supply 15 by the second operational amplifier 14. This first operational amplifier 1
The output of No. 3 is connected to the negative input of the second operational amplifier 14, and when the voltage is higher than the voltage of the comparison power supply 15, the output of the operational amplifier 14 becomes the ground potential. Therefore, diode 1
7 and the output terminal 12, the gate terminal 8 is grounded, and the output current is cut off.
上述した従来の半導体装置は、専用の電流検出用端子が
ないため、ソース端子およびゲート端子を用いて過電流
を検出している。このように、回路接続と試験接続とで
端子を共用することは半導体装置を回路に組込んだポン
ディングの工程等の場合にレイアウトしにくいという欠
点がある。The conventional semiconductor device described above does not have a dedicated current detection terminal, so the source terminal and the gate terminal are used to detect overcurrent. Sharing a terminal for circuit connection and test connection in this way has the disadvantage that it is difficult to layout the device in a bonding process or the like in which a semiconductor device is incorporated into a circuit.
すなわち、半導体装置を支える足が３本であり、特にソ
ース端子を基板の上で配線しなければならないので、上
述のように、共用しているとレイアウトしにくくなる。That is, there are three legs that support the semiconductor device, and the source terminal in particular must be wired on the substrate, so if they are shared as described above, layout becomes difficult.
本発明の目的は、かかるポンディング工程等におけるレ
イアウト変更を容易に実現できる半導体装置を提供する
ことにある。An object of the present invention is to provide a semiconductor device that can easily realize layout changes in the bonding process and the like.
本発明の半導体装置は、リードフレームに搭載した半導
体素子と、外部に導出されたソース。A semiconductor device of the present invention includes a semiconductor element mounted on a lead frame and a source led out to the outside.
ゲート、ドレイン端子および電流検出用端子と、前記ソ
ース端子および電流検出用端子と前記半導体素子のソー
ス電極をそれぞれ接続するワイヤとを有して構成される
。It is configured to include a gate, a drain terminal, a current detection terminal, and a wire that respectively connects the source terminal and current detection terminal to the source electrode of the semiconductor element.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示す半導体装置の概略図で
ある。FIG. 1 is a schematic diagram of a semiconductor device showing one embodiment of the present invention.
第１図に示すように、本実施例の樹脂封止用の半導体装
置ｌＯは、リードフレームｌと、このリードフレーム１
の上に固着したＭＯＳＦＥＴ等を含む半導体素子２と、
半導体素子２を外部に接続するために一部が外部に導出
されたソース端子６およびゲート端子８と、リードフレ
ームｌに一体形成され且つ外部に一部が導出されたドレ
イン端子９と、新たに設は且つ前述した各端子と同様の
電流検出用端子７と、半導体素子２のゲート電極および
ゲート端子８を接続するゲートワイヤ５と、半導体素子
２のソース電極およびソース端子６、電流検出用端子７
間を接続するソースワイヤ４並びに電流検出用ソースワ
イヤ３とを有している。すなわち、リードフレーム１に
は半導体素子２のドレイン電極である裏面が電気的に接
続されており、またソース電極はソース端子６および電
流検出用端子７に並列に接続されている。As shown in FIG. 1, the resin-sealed semiconductor device IO of this embodiment includes a lead frame 1 and a lead frame 1.
A semiconductor element 2 including a MOSFET etc. fixed on the
A source terminal 6 and a gate terminal 8, which are partially led out to connect the semiconductor element 2 to the outside, and a drain terminal 9, which is integrally formed with the lead frame l and which is partially led out, are newly added. The configuration includes a current detection terminal 7 similar to each terminal described above, a gate wire 5 connecting the gate electrode and gate terminal 8 of the semiconductor element 2, a source electrode and source terminal 6 of the semiconductor element 2, and a current detection terminal. 7
It has a source wire 4 and a current detection source wire 3 for connecting therebetween. That is, the back surface of the semiconductor element 2, which is the drain electrode, is electrically connected to the lead frame 1, and the source electrode is connected to the source terminal 6 and the current detection terminal 7 in parallel.
かかる半導体装置において、ドレイン端子９から流入し
た電流は、ゲート端子８に半導体素子２のしきい値以上
の電圧が印加されている時、ソース電極に流れる。この
ソース電極の電流は、大部分がソースワイヤ４を通って
ソース端子６へ流出する。一方、ソース電極へ流入した
電流の一部は電流検出用ソースワイヤ３を通り電流検出
用端子７へ流出する。例えば、ソースワイヤ４を４００
μｍφのＡｌ線且つ電流検出用ソースワイヤ３を１００
μｍφのＡｌ２線で同じ長さ（７ｍｍ程度）で作ると、
電流検出用端子７を流れる電流により測定された電流値
の１６倍の値の電流がソース端子７に流れる。In such a semiconductor device, a current flowing from the drain terminal 9 flows to the source electrode when a voltage equal to or higher than the threshold value of the semiconductor element 2 is applied to the gate terminal 8. Most of this source electrode current flows out through the source wire 4 to the source terminal 6. On the other hand, a part of the current flowing into the source electrode passes through the current detection source wire 3 and flows out to the current detection terminal 7. For example, source wire 4 is 400
100 μmφ Al wire and current detection source wire 3
When made with μmφ Al2 wire of the same length (about 7 mm),
A current that is 16 times the current value measured by the current flowing through the current detection terminal 7 flows through the source terminal 7 .
このように、電流検出用のソースワイヤ３と電流検出用
端子７を設け、ソース端子６に流れる電流と電流検出用
端子７に流れる電流の比をソースワイヤ４と電流検出用
ソースワイヤ３との抵抗比により変えられるので、過電
流の検出が容易であり、レイアウトの変更が自由度高く
選択できることになる。In this way, the source wire 3 for current detection and the current detection terminal 7 are provided, and the ratio of the current flowing to the source terminal 6 and the current flowing to the current detection terminal 7 is determined between the source wire 4 and the current detection source wire 3. Since it can be changed by changing the resistance ratio, overcurrent can be easily detected and the layout can be changed with a high degree of freedom.
また、本実施例の変形として、ソースワイヤ４を２本以
上打つようにしてもよい。Further, as a modification of this embodiment, two or more source wires 4 may be used.
すなわち、ソースワイヤ４が１本であった時に比へ、ソ
ースワイヤ４と電流検出用ソースワイヤ３の抵抗率の比
の範囲をソースワイヤ４の本数に比例して広くできる。That is, when there is only one source wire 4, the range of the resistivity ratio between the source wire 4 and the current detection source wire 3 can be widened in proportion to the number of source wires 4.
従って、かかる変形によると、高電流の検出が容易にな
り、また電流検出のために用いる電流が減ることにより
、電流効率の向上を図れるという利点がある。例えば、
前述した実施例と同じ太さ、および長さ、つまＦ）２本
のソースワイヤー４を４００μｍφのＡＡ線で、電流検
出用ソースワイヤ３を１００μｍφのＡＡ線でそれぞれ
７ｍｍ作ることにより、電流検出用端子７より測定され
た電流の３２倍の値の電流をソース端子７に流すことが
できる。Therefore, this modification has the advantage that high current can be easily detected, and current efficiency can be improved by reducing the amount of current used for current detection. for example,
By making the two source wires 4 with 400 μmφ AA wires and the current detection source wire 3 with 100 μmφ AA wires of 7 mm each, the current detection A current 32 times the value of the current measured from the terminal 7 can be passed through the source terminal 7.
上述したように、本実施例によれば、ソースワイヤを２
本以上打ち、そのうち１本を電流検出用端子に接続し、
それ以外をソース端子に接続することにより、電流検出
機能を構成し、半導体素子のボンディングワイヤをボン
ディングする工程において、この半導体素子を電流検出
端子付半導体装置とするか、電流検出用端子なしの半導
体装置とするかを決定することができるので、レイアウ
トしやすくなる。As described above, according to this embodiment, the source wire is
Connect at least one wire to the current detection terminal,
By connecting the other terminals to the source terminal, a current detection function is configured, and in the process of bonding the bonding wire of the semiconductor element, this semiconductor element can be used as a semiconductor device with a current detection terminal, or as a semiconductor device without a current detection terminal. Since it is possible to decide which device to use, the layout becomes easier.
以上説明したように、本発明の半導体装置は、ソースワ
イヤを複数個形威し、そのうちの−本を電流検出用ソー
スワイヤとして電流検出用端子に電気的に接続すること
により、ボンディング工程においては、ソース端子に流
れる電流と電流検出用端子に流れる電流の比をソースワ
イヤと電流検出用ワイヤの抵抗の比により変えることが
できるので、ポンデイ〜ング工程におけるレイアウトの
変更を自由度高く選択できるという効果がある。As explained above, the semiconductor device of the present invention has a plurality of source wires, and one of the source wires is used as a current detection source wire and is electrically connected to a current detection terminal. Since the ratio of the current flowing to the source terminal and the current flowing to the current detection terminal can be changed by changing the resistance ratio of the source wire and the current detection wire, it is possible to change the layout during the pounding process with a high degree of freedom. effective.
第１図は本発明の一実施例を示す半導体装置の概略図、
第２図は従来の一例を説明するための半導体装置とその
電流検出回路の接続図である。
１・・・・・・リードフレーム、２・・・・・・半導体
素子、３・・・・・・電流検出用ソースワイヤ、４・・
・・・・ソースワイヤ、５・・・・・・ゲートワイヤ、
６・・・・・・ソース端子、７・・・・・・電流検出用
端子、８・・・・・・ゲート端子、９・・・・・・ドレ
イン端子、１ｏ・・・・・・樹脂封止半導体装置。FIG. 1 is a schematic diagram of a semiconductor device showing an embodiment of the present invention;
FIG. 2 is a connection diagram of a semiconductor device and its current detection circuit for explaining a conventional example. DESCRIPTION OF SYMBOLS 1...Lead frame, 2...Semiconductor element, 3...Source wire for current detection, 4...
...Source wire, 5...Gate wire,
6... Source terminal, 7... Current detection terminal, 8... Gate terminal, 9... Drain terminal, 1o... Resin Sealed semiconductor device.
Claims (1)
されたソース、ゲート、ドレイン端子および電流検出用
端子と、前記ソース端子および電流検出用端子と前記半
導体素子のソース電極をそれぞれ接続するワイヤとを有
することを特徴とする半導体装置。It has a semiconductor element mounted on a lead frame, a source, a gate, a drain terminal, and a current detection terminal led out to the outside, and wires that respectively connect the source terminal and current detection terminal to the source electrode of the semiconductor element. A semiconductor device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1325103A JP2715603B2 (en) | 1989-12-14 | 1989-12-14 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1325103A JP2715603B2 (en) | 1989-12-14 | 1989-12-14 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03185755A true JPH03185755A (en) | 1991-08-13 |
| JP2715603B2 JP2715603B2 (en) | 1998-02-18 |
Family
ID=18173163
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1325103A Expired - Lifetime JP2715603B2 (en) | 1989-12-14 | 1989-12-14 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2715603B2 (en) |
-
1989
- 1989-12-14 JP JP1325103A patent/JP2715603B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2715603B2 (en) | 1998-02-18 |
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