JP2715603B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2715603B2 JP2715603B2 JP1325103A JP32510389A JP2715603B2 JP 2715603 B2 JP2715603 B2 JP 2715603B2 JP 1325103 A JP1325103 A JP 1325103A JP 32510389 A JP32510389 A JP 32510389A JP 2715603 B2 JP2715603 B2 JP 2715603B2
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- source
- semiconductor device
- current detection
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Landscapes
- Wire Bonding (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はソース電流の過電流検出を行なうことのでき
る半導体装置に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device capable of detecting an overcurrent of a source current.
従来、かかる半導体装置の過電流を検出するために
は、半導体装置のソースを流れる電流を外部に取り出
し、分流して電流検出回路により検出している。すなわ
ち、分流により取り出した電流は、過電流検出用の回路
により半導体装置の出力電流が過大とならないように制
御するために用いられる。Conventionally, in order to detect such an overcurrent of a semiconductor device, a current flowing through a source of the semiconductor device is taken out, divided, and detected by a current detection circuit. That is, the current extracted by the shunt is used by the overcurrent detection circuit to control the output current of the semiconductor device so as not to be excessive.
第２図は従来の一例を説明するための半導体装置とそ
の電流検出回路の接続図である。FIG. 2 is a connection diagram of a semiconductor device and a current detection circuit thereof for explaining an example of the related art.
第２図に示すように、樹脂封止型半導体装置10Aは通
常のソース端子6,ゲート端子8,ドレイン端子９を有する
パワーMOSFETであり、これの過電流をチェックする過電
流検出回路20は抵抗16と、二つのオペアンプ13および14
と、基準電源15とを有している。As shown in FIG. 2, the resin-encapsulated semiconductor device 10A is a normal power MOSFET having a source terminal 6, a gate terminal 8, and a drain terminal 9, and an overcurrent detection circuit 20 for checking overcurrent of the power MOSFET is a resistor. 16 and two op amps 13 and 14
And a reference power supply 15.
すなわち、入力端子11はソース端子６に接続されてお
り、出力端子12はゲート端子８に接続されている。半導
体装置10Aの検出用電流により抵抗16の両端に電圧降下
が生ずる。この電圧降下分を第一のオペアンプ13で増幅
し、しかる後第二のオペアンプ14で比較用基準電源15の
電圧と比較する。この第一のオペアンプ13の出力は第二
のオペアンプ14の負側入力に接続され、比較用電源15の
電圧より大きい場合には、オペアンプ14の出力は接地電
位となる。従って、ダイオード17および出力端子12を通
してゲート端子８は接地され、出力電流は遮断される。That is, the input terminal 11 is connected to the source terminal 6, and the output terminal 12 is connected to the gate terminal 8. A voltage drop occurs across the resistor 16 due to the detection current of the semiconductor device 10A. This voltage drop is amplified by the first operational amplifier 13 and then compared with the voltage of the reference power supply 15 by the second operational amplifier 14. The output of the first operational amplifier 13 is connected to the negative input of the second operational amplifier 14, and when the voltage is higher than the voltage of the comparison power supply 15, the output of the operational amplifier 14 is at the ground potential. Therefore, the gate terminal 8 is grounded through the diode 17 and the output terminal 12, and the output current is cut off.
上述した従来の半導体装置は、専用の電流検出用端子
がないため、ソース端子およびゲート端子を用いて過電
流を検出している。このように、回路接続と試験接続と
で端子を共用することは半導体装置を回路に組込んだボ
ンディングの工程等の場合にレイアウトしにくいという
欠点がある。Since the above-described conventional semiconductor device does not have a dedicated current detection terminal, overcurrent is detected using the source terminal and the gate terminal. As described above, sharing a terminal for circuit connection and test connection has a disadvantage that layout is difficult in the case of a bonding step or the like in which a semiconductor device is incorporated in a circuit.
すなわち、半導体装置を支える足が３本であり、特に
ソース端子を基板の上で配線しなければならないので、
上述のように、共用しているとレイアウトしにくくな
る。In other words, there are three legs supporting the semiconductor device, and in particular, the source terminal must be wired on the substrate.
As described above, the layout is difficult when shared.
本発明の目的は、かかるボンディング工程等における
レイアウト変更を容易に実現できる半導体装置を提供す
ることにある。An object of the present invention is to provide a semiconductor device capable of easily realizing a layout change in such a bonding step or the like.
本発明の半導体装置は、リードフレームに搭載した半
導体素子と、外部に導出されたソース，ゲート，ドレイ
ン端子および電流検出用端子と、前記ソース端子および
電流検出用端子と前記半導体素子のソース電極をそれぞ
れ接続するワイヤとを有して構成される。The semiconductor device of the present invention includes a semiconductor element mounted on a lead frame, source, gate, drain terminals and a current detection terminal led out to the outside, the source terminal, the current detection terminal, and a source electrode of the semiconductor element. And wires to be connected to each other.
次に、本発明の実施例について図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示す半導体装置の概略図
である。FIG. 1 is a schematic view of a semiconductor device showing one embodiment of the present invention.
第１図に示すように、本実施例の樹脂封止用の半導体
装置10は、リードフレーム１と、このリードフレーム１
の上に固着したMOSFET等を含む半導体素子２と、半導体
素子２を外部に接続するために一部が外部に導出された
ソース端子６およびゲート端子８と、リードフレーム１
に一体形成され且つ外部に一部が導出されたドレイン端
子９と、新たに設け且つ前述した各端子と同様の電流検
出用端子７と、半導体素子２のゲート電極およびゲート
端子８を接続するゲートワイヤ５と、半導体素子２のソ
ース電極およびソース端子6,電流検出用端子７間を接続
するソースワイヤ４並びに電流検出用ソースワイヤ３と
を有している。すなわち、リードフレーム１には半導体
素子２のドレイン電極である裏面が電気的に接続されて
おり、またソース電極はソース端子６および電流検出用
端子７に並列に接続されている。As shown in FIG. 1, a semiconductor device 10 for resin encapsulation according to this embodiment includes a lead frame 1 and the lead frame 1.
A semiconductor element 2 including a MOSFET and the like fixed on the substrate, a source terminal 6 and a gate terminal 8 which are partially led out to connect the semiconductor element 2 to the outside, and a lead frame 1.
A drain terminal 9 which is formed integrally with the semiconductor device 2, a current detection terminal 7 which is newly provided and is similar to each of the above-described terminals, and a gate which connects the gate electrode and the gate terminal 8 of the semiconductor element 2. It has a wire 5, a source electrode 4 and a current detection source wire 3 for connecting the source electrode and source terminal 6 of the semiconductor element 2 and the current detection terminal 7. That is, the back surface, which is the drain electrode of the semiconductor element 2, is electrically connected to the lead frame 1, and the source electrode is connected to the source terminal 6 and the current detection terminal 7 in parallel.
かかる半導体装置において、ドレイン端子９から流入
した電流は、ゲート端子８に半導体素子２のしきい値以
上の電圧が印加されている時、ソース電極に流れる。こ
のソース電極の電流は、大部分がソースワイヤ４を通っ
てソース端子６へ流出する。一方、ソース電極へ流入し
た電流の一部は電流検出用ソースワイヤ３を通り電流検
出用端子７へ流出する。例えば、ソースワイヤ４を400
μｍφのAl線且つ電流検出用ソースワイヤ３を100μｍ
φのAl線で同じ長さ（7mm程度）で作ると、電流検出用
端子７を流れる電流により測定された電流値の16倍の値
の電流がソース端子７に流れる。In such a semiconductor device, the current flowing from the drain terminal 9 flows to the source electrode when a voltage higher than the threshold value of the semiconductor element 2 is applied to the gate terminal 8. Most of the current of the source electrode flows out to the source terminal 6 through the source wire 4. On the other hand, part of the current flowing into the source electrode flows out to the current detecting terminal 7 through the current detecting source wire 3. For example, if the source wire 4 is 400
μmφ Al wire and current detection source wire 3 is 100 μm
If the same length (about 7 mm) is formed with the φ Al wire, a current having a value 16 times the current value measured by the current flowing through the current detection terminal 7 flows to the source terminal 7.
このように、電流検出用のソースワイヤ３と電流検出
用端子７を設け、ソース端子６に流れる電流と電流検出
用端子７に流れる電流の比をソースワイヤ４と電流検出
用ソースワイヤ３との抵抗比により変えられるので、過
電流の検出が容易であり、レイアウトの変更が自由度高
く選択できることになる。Thus, the current detection source wire 3 and the current detection terminal 7 are provided, and the ratio of the current flowing through the source terminal 6 to the current flowing through the current detection terminal 7 is determined by the ratio between the source wire 4 and the current detection source wire 3. Since it can be changed by the resistance ratio, it is easy to detect the overcurrent, and the layout can be changed with a high degree of freedom.
また、本実施例の変形として、ソースワイヤ４を２本
以上打つようにしてもよい。As a modification of the present embodiment, two or more source wires 4 may be hit.
すなわち、ソースワイヤ４が１本であった時に比べ、
ソースワイヤ４と電流検出用ソースワイヤ３の抵抗率の
比の範囲をソースワイヤ４の本数に比例して広くでき
る。従って、かかる変形によると、高電流の検出が容易
になり、また電流検出のために用いる電流が減ることに
より、電流効率の向上を図れるという利点がある。例え
ば、前述した実施例と同じ太さ、および長さ、つまり２
本のソースワイヤー４を400μｍφのAl線で、電流検出
用ソースワイヤ３を100μｍφのAl線でそれぞれ7mm作る
ことにより、電流検出用端子７より測定された電流の32
倍の値の電流をソース端子７に流すことができる。That is, compared to when the number of the source wires 4 is one,
The range of the ratio between the resistivity of the source wire 4 and the resistivity of the current detection source wire 3 can be increased in proportion to the number of source wires 4. Therefore, according to such a modification, there is an advantage that the detection of a high current is facilitated and the current used for current detection is reduced, thereby improving the current efficiency. For example, the same thickness and length as in the above-described embodiment, that is, 2
The source wire 4 is made of an Al wire having a diameter of 400 μmφ and the source wire 3 for a current detection is made 7 mm with an Al wire having a diameter of 100 μm.
A current having twice the value can be supplied to the source terminal 7.
上述したように、本実施例によれば、ソースワイヤを
２本以上打ち、そのうち１本を電流検出用端子に接続
し、それ以外をソース端子に接続することにより、電流
検出機能を構成し、半導体素子のボンディングワイヤを
ボンディングする工程において、この半導体素子を電流
検出端子付半導体装置とするか、電流検出用端子なしの
半導体装置とするかを決定することができるので、レイ
アウトしやすくなる。As described above, according to the present embodiment, two or more source wires are hit, one of which is connected to the current detection terminal, and the other is connected to the source terminal, thereby forming a current detection function. In the step of bonding the bonding wires of the semiconductor element, it is possible to determine whether the semiconductor element is a semiconductor device with a current detection terminal or a semiconductor device without a current detection terminal, thereby facilitating the layout.
以上説明したように、本発明の半導体装置は、ソース
ワイヤを複数個形成し、そのうちの一本を電流検出用ソ
ースワイヤとして電流検出用端子に電気的に接続するこ
とにより、ボンディング工程においては、ソース端子に
流れる電流と電流検出用端子に流れる電流の比をソース
ワイヤと電流検出用ワイヤの抵抗の比により変えること
ができるので、ボンディング工程におけるレイアウトの
変更を自由度高く選択できるという効果がある。As described above, the semiconductor device of the present invention forms a plurality of source wires, and electrically connects one of them as a current detection source wire to the current detection terminal. Since the ratio of the current flowing through the source terminal to the current flowing through the current detection terminal can be changed by the resistance ratio of the source wire and the current detection wire, there is an effect that the layout change in the bonding process can be selected with a high degree of freedom. .
第１図は本発明の一実施例を示す半導体装置の概略図、
第２図は従来の一例を説明するための半導体装置とその
電流検出回路の接続図である。 １……リードフレーム、２……半導体素子、３……電流
検出用ソースワイヤ、４……ソースワイヤ、５……ゲー
トワイヤ、６……ソース端子、７……電流検出用端子、
８……ゲート端子、９……ドレイン端子、10……樹脂封
止半導体装置。FIG. 1 is a schematic view of a semiconductor device showing one embodiment of the present invention,
FIG. 2 is a connection diagram of a semiconductor device and a current detection circuit thereof for explaining an example of the related art. DESCRIPTION OF SYMBOLS 1 ... Lead frame, 2 ... Semiconductor element, 3 ... Source wire for current detection, 4 ... Source wire, 5 ... Gate wire, 6 ... Source terminal, 7 ... Terminal for current detection,
8 gate terminal, 9 drain terminal, 10 resin-sealed semiconductor device.
Claims (1)
外部に導出されたソース，ゲート，ドレイン端子および
電流検出用端子と、前記ソース端子および電流検出用端
子と前記半導体素子のソース電極をそれぞれ接続するワ
イヤとを有することを特徴とする半導体装置。A semiconductor device mounted on a lead frame;
A semiconductor device comprising: a source, a gate, a drain terminal, and a current detection terminal that are led out to the outside; and wires that respectively connect the source terminal, the current detection terminal, and the source electrode of the semiconductor element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1325103A JP2715603B2 (en) | 1989-12-14 | 1989-12-14 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1325103A JP2715603B2 (en) | 1989-12-14 | 1989-12-14 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03185755A JPH03185755A (en) | 1991-08-13 |
| JP2715603B2 true JP2715603B2 (en) | 1998-02-18 |
Family
ID=18173163
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1325103A Expired - Lifetime JP2715603B2 (en) | 1989-12-14 | 1989-12-14 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2715603B2 (en) |
-
1989
- 1989-12-14 JP JP1325103A patent/JP2715603B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03185755A (en) | 1991-08-13 |
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