JPH0317623U - - Google Patents

Info

Publication number
JPH0317623U
JPH0317623U JP1989076274U JP7627489U JPH0317623U JP H0317623 U JPH0317623 U JP H0317623U JP 1989076274 U JP1989076274 U JP 1989076274U JP 7627489 U JP7627489 U JP 7627489U JP H0317623 U JPH0317623 U JP H0317623U
Authority
JP
Japan
Prior art keywords
electrode
external lead
bump electrode
bump
out electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989076274U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989076274U priority Critical patent/JPH0317623U/ja
Publication of JPH0317623U publication Critical patent/JPH0317623U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05556Shape in side view
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1301Shape
    • H01L2224/13016Shape in side view

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第3図、第4図及び第5図は本考案の
実施例を示す図、第2図は従来のバンプ電極を示
す図である。 14…開口部、15…インナーリード、16…
バンプエリヤ、17,37…バンプ電極、18…
接続部。
1, 3, 4, and 5 are views showing embodiments of the present invention, and FIG. 2 is a view showing a conventional bump electrode. 14...Opening, 15...Inner lead, 16...
Bump area, 17, 37... bump electrode, 18...
Connection part.

Claims (1)

【実用新案登録請求の範囲】 半導体素子表面上に設けられた外部導出電極に
形成されたバンプ電極において、 このバンプ電極と外部導出電極とが接続される
領域を前記外部導出電極の一部分とした事を特徴
とするバンプ電極。
[Claims for Utility Model Registration] In a bump electrode formed on an external lead-out electrode provided on the surface of a semiconductor element, a region where the bump electrode and the external lead-out electrode are connected is a part of the external lead-out electrode. A bump electrode featuring:
JP1989076274U 1989-06-30 1989-06-30 Pending JPH0317623U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989076274U JPH0317623U (en) 1989-06-30 1989-06-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989076274U JPH0317623U (en) 1989-06-30 1989-06-30

Publications (1)

Publication Number Publication Date
JPH0317623U true JPH0317623U (en) 1991-02-21

Family

ID=31617590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989076274U Pending JPH0317623U (en) 1989-06-30 1989-06-30

Country Status (1)

Country Link
JP (1) JPH0317623U (en)

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