JPH03148869A - Photo-detector - Google Patents

Photo-detector

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Publication number
JPH03148869A
JPH03148869A JP1288191A JP28819189A JPH03148869A JP H03148869 A JPH03148869 A JP H03148869A JP 1288191 A JP1288191 A JP 1288191A JP 28819189 A JP28819189 A JP 28819189A JP H03148869 A JPH03148869 A JP H03148869A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor substrate
junction
signal charges
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1288191A
Other languages
Japanese (ja)
Other versions
JPH0828493B2 (en
Inventor
Nobuyuki Kajiwara
梶原 信之
Hajime Sudo
須藤 元
Yoshihiro Miyamoto
義博 宮本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1288191A priority Critical patent/JPH0828493B2/en
Publication of JPH03148869A publication Critical patent/JPH03148869A/en
Publication of JPH0828493B2 publication Critical patent/JPH0828493B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To prevent crosstalks among pixels by giving the excess minority carriers of a semiconductor substrate a potential gradient in the surface direction of the substrate and forming the recombination region of optical signal charges so as to surround each of conductivity type layers. CONSTITUTION:When the carrier concentration of a semiconductor substrate 10 is kept constant, the potential EC of a conduction band accelerates excess electrons in the direction of a reverse conductivity type layer 11 from the rear of the substrate 10 when the substrate 10 takes a p type. On the other hand, the potential EV of a valence band is kept constant from a depletion layer in the vicinity of the layer 11 to the rear of the substrate 10. An electric field by the potential gradient of the conduction band is brought so that the velocity of electrons is brought near to thermal velocity. Accordingly, signal charges generated by light hv projected to the substrate 10 are accelerated by the potential gradient of the conduction band, are not diffused approximately in the cross direction and reach the surface of the substrate 10, and are diffused in the cross direction on a surface. A recombination region 12 is formed between a p-n junction, thus absorbing signal charges diffused in the cross direction to the recombination region 12.

Description

【発明の詳細な説明】 (概!) 赤外線検知器のpn接合による光電変換部の構造に関し
、 化合物半導体上のpn接合アレイよりなる光検知器にお
いて少なくとも各pn接合間での信号電荷のクロストー
クを減少させる光電変換部造をもつことを目的とし、 半導体基板の表面に該半導体基板とは逆の導電型層を所
定間隔で複数形成し、該半導体基板と該逆導電型層とに
よりpn接合による光電変換部を形成する構造とした光
検知器において、前記半導体基板の深さ方向に連続的に
エネルギーギャップを大とし、該半導体基板の過剰な少
数キャリアが該半導体基板の表面方向に向かう電位勾配
を有するようにし、かつ、前記複数の道l電8:J、層
の各々を取り巻くように光信号電荷の再結合領域をmG
するよう構成する。
Detailed Description of the Invention (Overview!) Regarding the structure of a photoelectric conversion section using a pn junction in an infrared detector, crosstalk of signal charges at least between each pn junction in a photodetector consisting of a pn junction array on a compound semiconductor In order to have a photoelectric conversion structure that reduces the In a photodetector having a structure in which a photoelectric conversion part is formed by a method, an energy gap is continuously increased in the depth direction of the semiconductor substrate, and an electric potential at which excessive minority carriers of the semiconductor substrate are directed toward the surface of the semiconductor substrate is provided. The recombination region of optical signal charges is made to have a gradient and surround each of the plurality of layers.
Configure it to do so.

(産業上の利用分野) 本発明は光検知器に係り、特に赤外線検知器のpn接合
による充電変換部の構造に関する。
(Industrial Field of Application) The present invention relates to a photodetector, and more particularly to the structure of a charge conversion section using a pn junction in an infrared detector.

近年の赤外線検知器の高性能化の要求に伴い、赤外線検
知器には小型、多画素化、分解能の向上が要求されてい
る。分解能の向上のためには、基板上のpn接合による
光電変換部の構成を、画素間(各pn接合間)のピッチ
を綱かくし、しかも各画X間での光信号電荷のりOスト
ークを減少させる必要がある。
With the recent demand for higher performance of infrared detectors, infrared detectors are required to be smaller, have more pixels, and have improved resolution. In order to improve the resolution, the structure of the photoelectric conversion section using pn junctions on the substrate is made to have a tight pitch between pixels (between each pn junction), and to reduce the optical signal charge density O stalk between each pixel. It is necessary to do so.

〔従来の技術〕[Conventional technology]

従来のpn接合による光検知器においては、基板上に形
成された複数個のpn接合よりなる光電変換部を有し、
裏面から赤外光が入射される裏面入射型と、表面から赤
外光が入射される表面人射−型とがある。裏面入射型の
光検知器ではpn接合から離れた基板の奥で赤外光が充
電変換され、光による信号電荷は基板内を拡散し、信号
読み出し部になるpn接合に達する。このため、分解能
向上のため画素ピッチを細かくした光検知器では隣接画
素間での信号電荷のクロストークは避けられない。
A conventional photodetector using a pn junction has a photoelectric conversion section made up of a plurality of pn junctions formed on a substrate,
There is a back-illuminated type in which infrared light is incident from the back surface, and a front-illuminated type in which infrared light is incident from the front surface. In a back-illuminated photodetector, infrared light is charged and converted deep inside the substrate away from the pn junction, and the signal charge caused by the light is diffused within the substrate and reaches the pn junction, which becomes the signal readout section. For this reason, in a photodetector in which the pixel pitch is reduced to improve resolution, crosstalk of signal charges between adjacent pixels is unavoidable.

そこで、従来は第8図(a)に示す如く例えばp型の半
導体基板1の表面にn+領域2を形成してpn接合の光
電変換部を形成すると共に、その先電変換部のまわりに
半導体基板1と同一導電型(ここではp型)の高濃度H
3を設け、半導体基板1に電位障壁を彫琢している。
Therefore, conventionally, as shown in FIG. 8(a), for example, an n+ region 2 is formed on the surface of a p-type semiconductor substrate 1 to form a pn junction photoelectric conversion section, and a semiconductor High concentration H of the same conductivity type as substrate 1 (p-type here)
3 is provided, and a potential barrier is carved into the semiconductor substrate 1.

これにより、半導体基板1の裏面から入射される赤外光
が充電変換されて得られた信号電荷は同図(a)に4で
示すように隣接画素(pn接合)へ拡散することが、高
濃度層3により阻止される。
As a result, the signal charge obtained by charging and converting the infrared light incident from the back surface of the semiconductor substrate 1 can be diffused to the adjacent pixel (p-n junction) as shown by 4 in FIG. This is blocked by the concentration layer 3.

他方、表面入射型の光検知器ではカットオフ波長近傍の
信号光が基板の111深くで吸収され充電変換されるの
で、長い波長でのりOストーク(スミア)が発生し、ま
た同様な理由でブルーミングも発生している。
On the other hand, in front-illuminated photodetectors, signal light near the cutoff wavelength is absorbed deep into the substrate and converted into charge, which causes smearing at long wavelengths, and also causes blooming for the same reason. is also occurring.

そこで、従来の表面入射型の光検知器では第8図(a)
と同様の高濃度層を設けたり、またpn接合光電変換部
分を除いた表面に、例えばアルミニウム(AIl)から
なるシールドを形成している。
Therefore, in the conventional front-illuminated photodetector, as shown in Fig. 8(a).
A high concentration layer similar to the above is provided, and a shield made of aluminum (AIl), for example, is formed on the surface excluding the pn junction photoelectric conversion portion.

(発明が解決しようとする課題) しかるに、化合物半導体を基板として用い、その表面に
光電変換部を一次元、又は二次元配列してなる光検知器
においては、高濃度層を基板深く形成することが困難で
あるため、第8図(a)に示したIs造をとることが難
しく、よって同図(b)に示すように、例えばp型の半
導体基板5の表面にn+領域6を形成してpn接合の光
電変換部を構成すると共に、その光電変換部のまわりに
物理的な分離17を設けるか、各pn接合(画素)のピ
ッチを広くしたり、半導体基板のキャリア濃度を上げて
信号電荷の拡散長を小さくしている。
(Problem to be Solved by the Invention) However, in a photodetector in which a compound semiconductor is used as a substrate and photoelectric conversion parts are arranged one-dimensionally or two-dimensionally on the surface thereof, a high concentration layer must be formed deep in the substrate. Therefore, it is difficult to obtain the Is structure shown in FIG. 8(a). Therefore, as shown in FIG. 8(b), for example, an n+ region 6 is formed on the surface of a p-type semiconductor substrate 5. In addition to constructing a pn junction photoelectric conversion section, a physical separation 17 may be provided around the photoelectric conversion section, or the pitch of each pn junction (pixel) may be widened, or the carrier concentration of the semiconductor substrate may be increased to increase the signal strength. The charge diffusion length is reduced.

このため、化合物半導体を用いた光検知器では、画素数
を増やす場合、画素ピッチ(pn接合ピッチ)を所定値
以下に狭められず光検知器の形状が大きくなってしまう
。また、上記の分離溝7を形成する方法では形成プロセ
スが難しく、歩留りの低下が著しい。更に、半導体基板
のキャリア濃度を上げた場合は、pn接合特性が悪くな
るという問題がある。また更に、表面入射型ではシール
ド形成工程が必要で工程数が多い。
For this reason, in a photodetector using a compound semiconductor, when increasing the number of pixels, the pixel pitch (pn junction pitch) cannot be narrowed to a predetermined value or less, resulting in an increase in the size of the photodetector. Furthermore, the above-described method of forming the separation grooves 7 requires a difficult formation process, resulting in a significant drop in yield. Furthermore, when the carrier concentration of the semiconductor substrate is increased, there is a problem that the pn junction characteristics deteriorate. Furthermore, the front-illuminated type requires a shield forming step, which requires a large number of steps.

本発明は以上の点に鑑みてなされたもので、化合一半導
体上のpn接合アレイよりなる光検知器において少なく
とも各pn接合間での信号電荷のクロストークを減少さ
せる光電変換構造をもつ光検知器を提供することを目的
とする。
The present invention has been made in view of the above points, and is a photodetector having a photoelectric conversion structure that reduces crosstalk of signal charges at least between each pn junction in a photodetector consisting of a pn junction array on a compound semiconductor. The purpose is to provide equipment.

(課題を解決するための手段) 第1図は請求項1記載の発明(以下、第1発明という)
の原理説明図を示す。同図(A)は第1発明の要部概略
断面図を示し、10は半導体基板、11は逆導電型層、
12は再結合領域を示す。半導体基板10の表面には逆
導電型病11が所定間隔で複数形成されており、半導体
基板10と透導電ヤ層11とによりpn接合による充電
変換部が形成されている。
(Means for solving the problem) Figure 1 shows the invention as claimed in claim 1 (hereinafter referred to as the first invention).
A diagram explaining the principle is shown. The same figure (A) shows a schematic cross-sectional view of the main part of the first invention, 10 is a semiconductor substrate, 11 is a reverse conductivity type layer,
12 indicates a recombination region. A plurality of opposite conductivity types 11 are formed on the surface of the semiconductor substrate 10 at predetermined intervals, and the semiconductor substrate 10 and the transparent conductive layer 11 form a charge conversion section by a pn junction.

このような構造の光検すすriにおいて、第1発明では
第1図(B)に示すように半導体基板10の深さ方向に
連続的にエネルギーギャップを大とし、半導体基板10
の過剰な小数キャリアが半導体基板10の表面方向に向
かう電位勾配を有するようにし、かつ、複数の逆3!J
aiす:!層11の各々を取り巻くように光信号電荷の
再結合領域12を設けたものである。
In the optical detection sensor having such a structure, in the first invention, as shown in FIG. 1(B), the energy gap is continuously increased in the depth direction of the semiconductor substrate 10.
The excess minority carriers of have a potential gradient toward the surface of the semiconductor substrate 10, and a plurality of reverse 3! J
AI:! A recombination region 12 for optical signal charges is provided so as to surround each layer 11.

また、第2図は品求項2記載の発明(以下、第2発明と
いう)の原理設明図を示す。同図中、第1図と同−I成
部分には同一符号を付し、その説明を省略する。第2図
(A>に示す第2発明の要部概略断面図において、半導
体基板10上には逆導電型[111の他に拡散層13が
形成され、拡散1113と半導体基板10とによるpn
接合により電荷排出領域が形成されている。すなわら、
この第2発明は前記第1図(A)の再結合領域12に代
えて電荷排出領域を設けたものである。
Further, FIG. 2 shows a diagram illustrating the principle of the invention described in item 2 (hereinafter referred to as the second invention). In the figure, the same reference numerals are given to the -I parts as in FIG. 1, and the explanation thereof will be omitted. In the schematic cross-sectional view of the main part of the second invention shown in FIG.
A charge discharge region is formed by the junction. In other words,
In this second invention, a charge discharge region is provided in place of the recombination region 12 of FIG. 1(A).

また、第2図(A)には逆導電型層11の一部を除いた
半導体基板10の表面上に絶縁1114が形成され、更
にその上に拡散J113に対応した位置に電極15が設
けられている。
Further, in FIG. 2(A), an insulator 1114 is formed on the surface of the semiconductor substrate 10 excluding a part of the opposite conductivity type layer 11, and an electrode 15 is further provided on the insulator 1114 at a position corresponding to the diffusion J113. ing.

〔作用〕[Effect]

第1図に示す第1発明においては、半導体基板10のキ
ャリア濃度を一定にすると、半導体基板10がp型のと
きは第1図(B)に示すように伝導帯の電位Ecが半導
体基板10の裏面から逆導電型層11の方向へ伝導帯上
の過剰な電子を加速するような方向へ傾く。一方、価電
子帯の電位Evは逆導電型1111の近傍の空乏層かう
半導体基板10の裏面まで一定である。
In the first invention shown in FIG. 1, when the carrier concentration of the semiconductor substrate 10 is kept constant, when the semiconductor substrate 10 is p-type, the potential Ec of the conduction band of the semiconductor substrate 10 changes as shown in FIG. is tilted in a direction that accelerates excess electrons on the conduction band from the back surface toward the opposite conductivity type layer 11. On the other hand, the potential Ev of the valence band is constant up to the back surface of the semiconductor substrate 10, which is the depletion layer near the opposite conductivity type 1111.

上記の伝導帯の電位勾配による電界を電子の速度が熱速
度に近くなるようにする。こうすると、半導体基板10
に入射された光(hν)により発生した信号電荷(電子
)は第1図(A)、(B)に示すように伝導帯の電位勾
配によって加速され、横方向に殆ど拡散することなくp
n−接合を有する半導体基板10の表面に達し、第1図
(A>に■で示す如く表面で横方向に拡散する。
The electric field due to the potential gradient in the conduction band is set so that the velocity of electrons approaches the thermal velocity. In this way, the semiconductor substrate 10
The signal charges (electrons) generated by the incident light (hν) are accelerated by the potential gradient of the conduction band as shown in Figure 1 (A) and (B), and the signal charges (electrons) are accelerated by the potential gradient of the conduction band, and the p
It reaches the surface of the semiconductor substrate 10 having an n-junction, and diffuses laterally at the surface as shown by ▪ in FIG. 1 (A>).

しかも、第1発明ではpn接合間に再結合領域12が設
けられているため、上記の基板表面で横方向に拡散した
信号電荷は、表面再結合速度SOが無限大の再結合領域
12に吸い取られる。
Moreover, in the first invention, since the recombination region 12 is provided between the p-n junctions, the signal charges diffused laterally on the substrate surface are absorbed by the recombination region 12 where the surface recombination speed SO is infinite. It will be done.

また、第2図に示す第2発明では第2図(A)。Moreover, in the second invention shown in FIG. 2, FIG. 2(A).

(8)に示すように信号電荷(電子)が伝導帯の電位勾
配によつt加速され、横方向に殆ど拡散することなく基
板表面に達し、その後横方向に拡散する点は第1発明と
同様であるが、本発明では拡1!J113と半導体基板
10とによるpn接合の排出領域により横方向に拡散し
た信号電荷が吸い取られる。
As shown in (8), the signal charges (electrons) are accelerated by the potential gradient of the conduction band, reach the substrate surface with almost no lateral diffusion, and then diffuse laterally, which is the first invention. Similarly, in the present invention, the expansion is 1! The signal charges diffused in the lateral direction are absorbed by the discharge region of the pn junction between J113 and the semiconductor substrate 10.

また、本発明では第2図(A)、(C)に示すように、
電荷排出領域の周囲に電極15.絶縁膜14及び半導体
からなるMIS電極により、電極15の直下の半W(4
基板10に第2図(C)に示すように表面反転領域16
を形成することにより、電圧jl17から電極15への
印加電圧によって電荷排出領域の面積を調整することが
できる。従って、本発明では入射光の強度に応じて電極
15への印加電圧をIIIIllすることにより、入射
光の強度に応じて電荷の排出量を調整することができる
In addition, in the present invention, as shown in FIGS. 2(A) and (C),
Electrodes 15. around the charge discharge area. The MIS electrode made of the insulating film 14 and the semiconductor provides a half W (4
A surface inversion region 16 is formed on the substrate 10 as shown in FIG. 2(C).
By forming this, the area of the charge discharge region can be adjusted by applying the voltage from the voltage jl17 to the electrode 15. Therefore, in the present invention, by adjusting the voltage applied to the electrode 15 according to the intensity of the incident light, it is possible to adjust the amount of charge discharged according to the intensity of the incident light.

なお、半導体基板10はp型でなくn型でもよく、その
場合はpn接合を形成する基板表面から深さ方向にエネ
ルギーギャップを連続的に大とし、かつ、基板のキャリ
ア濃度を基板内で一定にすると、第3図に示す如く価電
子帯の電位Evが基板の裏面から表面方向へ価電子帯の
過剰な正孔を加速するように傾く勾配を有する。なお、
第3図中、EFはフェルミレベルを示す。
Note that the semiconductor substrate 10 may be an n-type instead of a p-type; in that case, the energy gap is continuously increased in the depth direction from the substrate surface forming a p-n junction, and the carrier concentration of the substrate is constant within the substrate. Then, as shown in FIG. 3, the potential Ev of the valence band has a gradient such that it accelerates excess holes in the valence band from the back surface of the substrate toward the front surface. In addition,
In FIG. 3, EF indicates the Fermi level.

〔実施例〕〔Example〕

次に本発明の各実施例について説明する。第4図は本発
明のIII実施例の構成図及びエネルギーバンド図で、
同図(A)は上面図、同図(B)は同図(A)のx−x
線に沿う縦断面図、同図(C)は同図(B)のY−Y線
に沿う断面でのエネルギーバンド図を示す、本実施例は
第1発明の実施例で、半導体基板10としてI−IV族
半導体の混晶であるl)  H01−x Cd xT 
e W板20を用いるものである。この基板20の表面
には所定砺隔でn+拡#2I!層21(第1図の11に
相当)が形成され、このn9拡散11121と基板20
とのpn接合により充電変換部が形成されている。
Next, each embodiment of the present invention will be described. FIG. 4 is a configuration diagram and an energy band diagram of the third embodiment of the present invention,
The same figure (A) is a top view, the same figure (B) is xx of the same figure (A)
This embodiment is an embodiment of the first invention, and FIG. I-IV group semiconductor mixed crystal l) H01-x Cd xT
e W board 20 is used. On the surface of this substrate 20, there are n+ expanded #2I! A layer 21 (corresponding to 11 in FIG. 1) is formed, and this n9 diffusion 11121 and the substrate 20
A charge conversion section is formed by a pn junction with the .

また、基板20の表面には第4図(A)、(B)に示す
ように、複数のn″拡散層21の各々の一部と所定部分
が夫々露出するように保護用絶RIMとして硫化亜tl
a (Zn S)111122が形成されている。Zn
S膜22の開口部のうちn+拡散層2仕の間口部には例
えばインジウム(In)からなる信号取出し電極23が
形成され、それ以外の間口部には例えば金(AU )か
らなるオーミックコンタクト用金属電極24が形成され
ている。オーミックコンタクト用金属電44i24は第
4図(A)。
Further, as shown in FIGS. 4A and 4B, on the surface of the substrate 20, a sulfide layer is formed as a protective RIM so that a part of each of the plurality of n'' diffusion layers 21 and a predetermined part are exposed respectively. sub-tl
a (Zn S) 111122 is formed. Zn
A signal extraction electrode 23 made of, for example, indium (In) is formed in the opening of the S film 22 between the n+ diffusion layers 2, and an ohmic contact electrode made of, for example, gold (AU) is formed in the other opening. A metal electrode 24 is formed. The metal electrode 44i24 for ohmic contact is shown in FIG. 4(A).

(8)かられかるように、相隣るpn接合による光電変
換部の間に形成されており、前記した再結合領域12を
構成する。
As can be seen from (8), it is formed between the photoelectric conversion portions formed by adjacent pn junctions, and constitutes the above-mentioned recombination region 12.

また、本実施例では、HQ 1−x Cd xTe基板
20の組成比Xが拡散1121とのpn接合部で0.2
10(XネApキーハントEQ1= 0.1001eV
)とし、pn接合部から基板深さ方向に組成比Xを線形
に太き(し、基板200I!厚10μmの所で0.24
0 (E O2= 0.1483t!V )になるよう
にしている。更にp型のHa 、−x Cd xT e
基板20のキャリア濃度をIX101Gαうに一定にす
ると、そのエネルギーバンド図は第4111 (C)に
示す如くになり、価電子帯の電位Evの勾配はわずかと
なり、エネルギーギャップの差は殆ど伝導帯側にくるた
め、伝導帯の電位Ecの勾配が大きくなり、この場合の
伝導帯の電位勾配による電界は約50V/aI(v (
E(22−EQ+ )/108m )となる。
Further, in this example, the composition ratio X of the HQ 1-x Cd xTe substrate 20 is 0.2 at the pn junction with the diffusion 1121.
10 (Xne Ap Key Hunt EQ1 = 0.1001eV
), and the composition ratio
0 (E O2 = 0.1483t!V). Furthermore, p-type Ha, -x Cd xT e
When the carrier concentration of the substrate 20 is kept constant as IX101Gα, its energy band diagram becomes as shown in 4111 (C), the gradient of the potential Ev in the valence band is slight, and the difference in energy gap is almost on the conduction band side. Therefore, the gradient of the conduction band potential Ec increases, and the electric field due to the conduction band potential gradient in this case is approximately 50 V/aI (v (
E(22-EQ+)/108m).

伝導帯の電子の移動度は77にで2X105or2/V
/sであるから、電子の移動度と電界との積で表わされ
る電子の速度はIX10α/Sとなり、はぼ熱速度に近
くなる。
The mobility of electrons in the conduction band is 77, which is 2X105or2/V.
/s, the electron velocity expressed as the product of the electron mobility and the electric field is IX10α/S, which is close to the thermal velocity.

これにより、p型の”1−x CdxTe基板20の裏
面に入射した赤外光により裏面で発生した信号電荷は第
4図(B)に25で示すように横方向に拡散することな
くpn接合部を有する基板表面に到達した慢、基板表面
を横方向に拡散し、その後オーミックコンタクト用金属
電極24による再結合領域で消滅する。
As a result, signal charges generated on the back surface of the p-type "1-x CdxTe substrate 20 due to infrared light incident on the back surface are not diffused in the lateral direction and are transferred to the p-n junction, as shown at 25 in FIG. 4(B). Once it reaches the surface of the substrate having a portion, it diffuses laterally across the surface of the substrate, and then disappears in the recombination region formed by the metal electrode 24 for ohmic contact.

従って、一つのpnJl合に流入する信号電荷はオーミ
ックコンタクト用金ma1極24で囲まれた領域からの
みとなり、隣接するpn接合(画素)間での信号電荷の
混合がなくなる。従って、入射赤外光をpn接合で光電
変換して得られた信号にはクロストークがなく、鮮明な
赤外画像が得られる。
Therefore, the signal charges flowing into one pnJl junction only come from the region surrounded by the gold ma1 electrode 24 for ohmic contact, and there is no mixing of signal charges between adjacent pn junctions (pixels). Therefore, the signal obtained by photoelectrically converting the incident infrared light at the pn junction has no crosstalk, and a clear infrared image can be obtained.

次に本実施例の製造方法について第5図と共に説明する
。同図中、第4図と同一構成部分には同一符号を付しで
ある。
Next, the manufacturing method of this example will be explained with reference to FIG. In the figure, the same components as in FIG. 4 are given the same reference numerals.

まず、p型のCdTe基板に水11(Hg)、カドミウ
ム(Cd)及びテルル(Te)を有機金属気相1ピタキ
シャル成長法(MOCVD法)により1ビタキシャル成
長させると共に、その際にHgに対するCdの組成比X
を時間の経過と共に変え、前記したように基板表面のp
n接合部から基板深さ方向に進むにつれてHOに対する
Cdの−組成比を大とする。これにより、厚さ10μ糟
のp型のHa、、CdxTe基板20を形成する。
First, water 11 (Hg), cadmium (Cd), and tellurium (Te) are grown bitaxially on a p-type CdTe substrate by metal organic vapor phase one-pitaxial growth method (MOCVD method). Composition ratio
is changed over time, and the p of the substrate surface changes as described above.
The -composition ratio of Cd to HO increases as it goes from the n-junction in the depth direction of the substrate. As a result, a p-type Ha, CdxTe substrate 20 having a thickness of 10 μm is formed.

次に、上記基板20の表面を115図<A)に示すよう
に所定のバターニングをしたレジスト27で冒りた後、
レジスト27の上方からボロンイオン(B9)を高濃度
イオン注入してレジスト27で覆われていない基板20
の表面部分に所定深さのn9拡散層21を形成する。こ
のn9拡散層21と基板20とのpn接合により光電変
換部(フォトダイオード)が形成される。
Next, as shown in FIG. 115A, the surface of the substrate 20 is etched with a resist 27 that has been patterned in a predetermined manner.
Boron ions (B9) are implanted at a high concentration from above the resist 27 to form a substrate 20 that is not covered with the resist 27.
An N9 diffusion layer 21 of a predetermined depth is formed on the surface of the substrate. A photoelectric conversion section (photodiode) is formed by the pn junction between the n9 diffusion layer 21 and the substrate 20.

次に、レジスト27を除去した後第5図(B)に示す如
く、スパッタ若しくは蒸着により基板20の表面全面に
、保護用絶縁膜としてZnS膜22を膜厚1μ園で形成
する。続いて第5図(C)に示す如く、フォトリソグラ
フィ:[程によってZnS1122をエッチングし、n
9拡散11121を一部露出させる開口部(コンタクト
穴)22aと、各pn接合部間の基板表面を露出させる
間口部(コンタクト穴)22bとを開孔する。
Next, after removing the resist 27, as shown in FIG. 5B, a ZnS film 22 is formed as a protective insulating film over the entire surface of the substrate 20 by sputtering or vapor deposition to a thickness of about 1 μm. Subsequently, as shown in FIG. 5(C), the ZnS1122 was etched by photolithography:
An opening (contact hole) 22a that partially exposes the 9 diffusion 11121 and a frontage (contact hole) 22b that exposes the substrate surface between each pn junction are formed.

次に第5図(D)に示す如く、inを開口部22aのみ
に蒸着して信号電荷取出し電lfI23として形成した
後、同図(E)に示す如く、Auを開口部22b&:、
1着してオーミックコンタクト用金属電極24を形成す
る。
Next, as shown in FIG. 5(D), in is deposited only on the opening 22a to form a signal charge extraction voltage IfI23, and then, as shown in FIG. 5(E), Au is deposited on the opening 22b &:
A metal electrode 24 for ohmic contact is formed by attaching one layer.

次に本発明の第2実施例について説明するに、第6図は
本発明の第2実施例の構成図及びエネルギーバンド図を
示し、同図<A)は上面図、同図(B)u同図(A) 
17)X−X [lk−沿つlI断面図、同図(C)は
同図(B)のY−Y翰に沿う断面でのエネルギーバンド
図を示す。第6図は第2発明の実施例を示し、第4図と
同一構成部分には同一符号を付し、その説明を省略する
Next, to explain the second embodiment of the present invention, FIG. 6 shows a configuration diagram and an energy band diagram of the second embodiment of the present invention. Same figure (A)
17) X-X[1I cross-sectional view along lk-, the same figure (C) shows an energy band diagram in the cross-section along the Y-Y plane of the same figure (B). FIG. 6 shows an embodiment of the second invention, and the same components as those in FIG. 4 are given the same reference numerals, and the explanation thereof will be omitted.

第6図(A>、(B)において、31はn+拡散層で、
各pn接合部間に形成されており、前記第2図の拡散1
113に相当する。また、32は保護用絶縁膜で、前記
保護用絶11g!14に相当し、n′″拡@lli21
の一部だけを露出させる開口部を有する。33はアルミ
ニウム(AIl)からなる電極で、前記電極15に相当
し、n+拡散1!2i上に形成される。
In FIG. 6 (A>, (B)), 31 is an n+ diffusion layer,
The diffusion 1 shown in FIG. 2 is formed between each pn junction.
It corresponds to 113. Further, 32 is a protective insulating film, and the protective insulating film 11g! Corresponds to 14, n′″ expansion @lli21
has an opening that exposes only a portion of the Reference numeral 33 denotes an electrode made of aluminum (AIl), which corresponds to the electrode 15 and is formed on the n+ diffusion 1!2i.

 本実施例も第1実施例と同一の基板2oを有するから
、基板20のエネルギーバンド図は第6図に示す如く、
前記第4図(C)に示したエネルギーバンド図と同一で
ある。これにより、p型のHO,−x Cd x T 
e基板2oの裏面に入射した赤外光により発生した信号
電荷は第6図(B)に34で示す如く基板裏面から表面
へ直道し、基板表面で拡散されるも、n9拡散131と
基板2゜とによるDn接合で排出される。
Since this embodiment also has the same substrate 2o as the first embodiment, the energy band diagram of the substrate 20 is as shown in FIG.
This is the same energy band diagram as shown in FIG. 4(C) above. As a result, p-type HO, −x Cd x T
The signal charge generated by the infrared light incident on the back surface of the e-substrate 2o travels straight from the back surface to the front surface as shown at 34 in FIG. 6(B), and is diffused on the surface of the substrate. It is discharged at the Dn junction due to ゜.

これにより、本実施例も第1実施例と同様の特長を有す
る。更に本実施例では、M1.SI極構造の電1i33
に電圧1135からの電圧を印加して電極33の直下の
半導体基板20の表面を反転状態にすると、反転状態の
領域も電荷排出I能を有するから実効的に電荷排出用の
pn接合面積を増加させることができる。
As a result, this embodiment also has the same features as the first embodiment. Furthermore, in this embodiment, M1. SI pole structure electric 1i33
When the surface of the semiconductor substrate 20 directly under the electrode 33 is turned into an inverted state by applying a voltage from voltage 1135 to can be done.

しかも、この基板表面の反転領域の面積は電極33への
印加電圧に応じて変化する。そこで、入射赤外光の強度
に応じて電圧源35の電圧を可変し、入射赤外光の強疫
が強いときは電極33への印加電圧を大に調整すること
により、表面反転領域が拡大し、より過剰となっている
(t@電荷を略吸収することができる。従って、本実施
例によれば、プルーミングも防止することができる。
Moreover, the area of the inverted region on the substrate surface changes depending on the voltage applied to the electrode 33. Therefore, by varying the voltage of the voltage source 35 according to the intensity of the incident infrared light and increasing the voltage applied to the electrode 33 when the intensity of the incident infrared light is strong, the surface inversion area can be expanded. However, it is possible to substantially absorb the excess charge (t@). Therefore, according to this embodiment, pluming can also be prevented.

次に第2実施例の製造方法について第7図と共に説明す
る。同図中、第6図と同一構成部分には同一符号を付し
である。第7図(A)は第5図(A)に示した製造工程
と同一であり、基板20上にn拡散l!21を形成する
。次に第7図(B)に示す如く、前記レジスト27を除
去した後、隣接するn+拡散層21の間の基板20の表
面を露出させるようにバターニングされたレジスト38
、 を新たに基板20上に設け、このレジスト38をマ
スクとしてB+イオンを高濃度イオン注入してn′″拡
散I!i31を形成する。
Next, the manufacturing method of the second embodiment will be explained with reference to FIG. In the figure, the same components as in FIG. 6 are designated by the same reference numerals. FIG. 7(A) is the same as the manufacturing process shown in FIG. 5(A), and n-diffused l! on the substrate 20. 21 is formed. Next, as shown in FIG. 7(B), after removing the resist 27, a resist 38 is patterned to expose the surface of the substrate 20 between adjacent n+ diffusion layers 21.
, are newly provided on the substrate 20, and using this resist 38 as a mask, B+ ions are implanted at a high concentration to form an n'' diffusion I!i31.

次にレジスト38を除去した後、第5図(8)に示した
製造工程と同一方法により第7図(C)に示す如<Zn
S膜32を形成した後、第5図(C)に示した製造工程
と同一方法により第7図(D)に示す如く開口部32a
を開孔する。ただし、開口部32aLtn+ff、敗層
21及び31のうち、光電変換部を形成する方のn+拡
散WJ21の一部分のみを露出させる。
Next, after removing the resist 38, the manufacturing process shown in FIG. 7(C) is performed using the same manufacturing process as shown in FIG.
After forming the S film 32, an opening 32a is formed as shown in FIG. 7(D) using the same manufacturing process as shown in FIG. 5(C).
Drill a hole. However, among the opening 32aLtn+ff and the failed layers 21 and 31, only a portion of the n+ diffusion WJ21 forming the photoelectric conversion section is exposed.

次に第7図(E)に示す如く、ZnSl132のうちn
9拡散層31の上方の位置にAllからなる金属電極3
3を例えば膜厚0.5ミーで形成する。
Next, as shown in FIG. 7(E), n of ZnSl132
9 A metal electrode 3 made of All at a position above the diffusion layer 31
3 is formed with a film thickness of 0.5 mm, for example.

続いて、同図(F)に示す如くフォトリソグラフィ工程
によりinによる信号電荷取り出し電極23をパターニ
ングし、最後に同図(G)に示す如くAuからなる金属
電極39を蒸着によって最も外側の電極33の外側に形
成する。この電極39はpn接合部で光電変換が行なえ
るよう接地される。
Subsequently, as shown in the figure (F), the signal charge extraction electrode 23 by in is patterned by a photolithography process, and finally, as shown in the figure (G), a metal electrode 39 made of Au is vapor-deposited to form the outermost electrode 33. Form outside of. This electrode 39 is grounded at the pn junction so that photoelectric conversion can be performed.

なお、第7図(E)に示す電極33の工程はなくてもよ
い。この場合はMIS電極を有さないこととなるが、そ
の場合でも基板表面で拡散された信号電荷はn+虱@1
g31と基板20とのpn接合に流入し排出されるから
、画lii間のクロストークを減少させることができる
Note that the step of forming the electrode 33 shown in FIG. 7(E) may be omitted. In this case, there is no MIS electrode, but even in that case, the signal charge diffused on the substrate surface is n + lice @1
Since it flows into the pn junction between g31 and the substrate 20 and is discharged, crosstalk between the pixels can be reduced.

また、以上の実施例では基板20はHg1−xCdxT
eとして説明したが、II−VI、 I−V。
Further, in the above embodiment, the substrate 20 is Hg1-xCdxT
II-VI, IV.

IV−Vl族半導体の三元系で構成してもよい。It may be composed of a ternary system of IV-Vl group semiconductors.

(発明の効果) 上述の如く、本発明によれば、基板表面でのみ信号電荷
が拡散するようにし、かつ、充電変換部の間に設けた再
結合領域又はpn接合の排出領域により基板表面で拡散
した信号電荷を吸収、排出するよ−うにしたので、画素
間でのクロストークを防止することができ、従りて、従
来に比べて画素ピッチを狭くでき、かつ、分離溝も形成
しないから従来に比べてより小型、多画素化が可能であ
る等の特長を有するものである。
(Effects of the Invention) As described above, according to the present invention, the signal charges are diffused only on the substrate surface, and the signal charges are diffused on the substrate surface by the recombination region provided between the charge conversion parts or the discharge region of the pn junction. Since the diffused signal charge is absorbed and discharged, crosstalk between pixels can be prevented, and the pixel pitch can be narrower than in the past, and no separation grooves are formed. It has features such as being smaller and capable of increasing the number of pixels compared to conventional devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は第1R明の原]!I!説明図、第2図は第2発
明の原理説明図、 第3図は半導体基板がn型のときの本発明の原理説明図
、 第4図は本発明の第1実施例の構成図及びエネルギーバ
ンド図、 IIS図は水元明の第1実施例の各製造工程でのIIi
iii図、 第6図は本発明の第2実施例の構成図及びエネルギーバ
ンド図、 第7図は本発明の第2実施例の各製造工程での断面図、 第8図は従来の光検知器の各例の要部Is造図である。 図において、 10は半導体基板、 11は逆導電型層、 12は再結合領域、 13は排出領域となる拡散層、 14はj1!!縁膜、 15は電極、 16は表面反転領域 を示す。 特許出願人 富 士 通 株式会社 1、″″−。−1 56=aO 1PI /11   h。 $19A4R理置刈面 第1図
Figure 1 shows the 1R Akinohara]! I! Explanatory drawings, FIG. 2 is a diagram explaining the principle of the second invention, FIG. 3 is a diagram explaining the principle of the present invention when the semiconductor substrate is n-type, and FIG. 4 is a configuration diagram and energy diagram of the first embodiment of the present invention. The band diagram and IIS diagram are IIi at each manufacturing process of Akira Mizumoto's first example.
Figure iii, Figure 6 is a configuration diagram and energy band diagram of the second embodiment of the present invention, Figure 7 is a cross-sectional view at each manufacturing process of the second embodiment of the present invention, and Figure 8 is a conventional photodetector. This is a diagram of the main parts of each example of the vessel. In the figure, 10 is a semiconductor substrate, 11 is a layer of opposite conductivity type, 12 is a recombination region, 13 is a diffusion layer that becomes a discharge region, and 14 is j1! ! 15 is an electrode, and 16 is a surface inversion region. Patent applicant: Fujitsu Ltd. 1, ″″−. −1 56=aO 1PI /11 h. $19A4R cutting surface diagram 1

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板(10)の表面に該半導体基板(10
)とは逆の導電型層(11)を所定間隔で複数形成し、
該半導体基板(10)と該逆導電型層(11)とにより
pn接合による光電変換部を形成する構造とした光検知
器において、 前記半導体基板(10)の深さ方向に連続的にエネルギ
ーギャップを大とし、該半導体基板(10)の過剰な少
数キャリアが該半導体基板(10)の表面方向に向かう
電位勾配を有するようにし、かつ、前記複数の逆導電型
層(11)の各々を取り巻くように光信号電荷の再結合
領域(12)を設けたことを特徴とする光検知器。
(1) The semiconductor substrate (10) is coated on the surface of the semiconductor substrate (10).
) a plurality of conductivity type layers (11) are formed at predetermined intervals,
In a photodetector having a structure in which the semiconductor substrate (10) and the opposite conductivity type layer (11) form a photoelectric conversion section by a pn junction, an energy gap is formed continuously in the depth direction of the semiconductor substrate (10). is made large so that excess minority carriers of the semiconductor substrate (10) have a potential gradient toward the surface of the semiconductor substrate (10), and surround each of the plurality of opposite conductivity type layers (11). A photodetector characterized in that a recombination region (12) for optical signal charges is provided.
(2)前記再結合領域(12)に代えて、前記複数の逆
導電型層(11)の各々を取り巻くように過剰な光信号
電荷の排出領域(13)を設けたことを特徴とする請求
項1記載の光検知器。
(2) In place of the recombination region (12), an excess optical signal charge discharge region (13) is provided so as to surround each of the plurality of opposite conductivity type layers (11). The photodetector according to item 1.
JP1288191A 1989-11-06 1989-11-06 Light detector Expired - Fee Related JPH0828493B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1288191A JPH0828493B2 (en) 1989-11-06 1989-11-06 Light detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1288191A JPH0828493B2 (en) 1989-11-06 1989-11-06 Light detector

Publications (2)

Publication Number Publication Date
JPH03148869A true JPH03148869A (en) 1991-06-25
JPH0828493B2 JPH0828493B2 (en) 1996-03-21

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ID=17726992

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