JPH03132274A - Liquid crystal display device - Google Patents
Liquid crystal display deviceInfo
- Publication number
- JPH03132274A JPH03132274A JP1270615A JP27061589A JPH03132274A JP H03132274 A JPH03132274 A JP H03132274A JP 1270615 A JP1270615 A JP 1270615A JP 27061589 A JP27061589 A JP 27061589A JP H03132274 A JPH03132274 A JP H03132274A
- Authority
- JP
- Japan
- Prior art keywords
- speed
- liquid crystal
- vertical
- drivers
- crystal display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 22
- 238000006243 chemical reaction Methods 0.000 claims abstract description 4
- 230000001360 synchronised effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 101100338016 Arabidopsis thaliana GSTU3 gene Proteins 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
Landscapes
- Shift Register Type Memory (AREA)
- Liquid Crystal Display Device Control (AREA)
- Transforming Electric Information Into Light Information (AREA)
- Controls And Circuits For Display Device (AREA)
- Liquid Crystal (AREA)
Abstract
Description
【発明の詳細な説明】
（イ） 産業上の利用分野
本発明は液晶テレビや液晶プロジェクタに適用される液
晶表示装置に関する。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a liquid crystal display device applied to liquid crystal televisions and liquid crystal projectors.
（ロ）従来の技術
現行のＮＴＳＣ方式の規格ではｌフィールドあなの走査
線数は２６２．５本であり、そのうち有効走査線数は２
４０本程度である。(b) Conventional technology According to the current NTSC standard, the number of scanning lines in the L field is 262.5, of which the number of effective scanning lines is 2.
There are about 40 pieces.
このため、現在実用化されている液晶テレビも走査線２
２０〜２４０本が一般的である。For this reason, LCD TVs currently in practical use also have two scanning lines.
20 to 240 pieces is common.
しかし、液晶テレビにおいても高精細、大画面化が進み
走査線数４４０〜４８０本のフルライン型のものが望ま
れてきた。However, even in liquid crystal televisions, high definition and large screens have progressed, and a full-line type with 440 to 480 scanning lines has been desired.
上述の様なフルライン型の液晶パネルを駆動する方法と
しては、通常のインターレース走査とＥＤ Ｔ Ｖ （
Ｅｘｔｅｎｄｅｄ ！２ｅｆｉｎｉｔｉｏｎ ＴＶ）と
称される高精細ＴＶ等に用いられる倍速線順次走査（ノ
ンインターレース走１１−）とが考えられる。There are two ways to drive a full-line liquid crystal panel as described above: normal interlaced scanning and ED TV (
Extended! One possible example is double-speed line sequential scanning (non-interlaced scanning 11-) used in high-definition TVs called 2efinition TVs.
従来、倍速順次走査を行なう場合、シフトレジスタより
なる垂直ドライバを液晶パネルの片側に配置して走査速
度を通常の２倍にすると共に水平ドライバのクロックも
２倍にすれば良い。Conventionally, when performing double-speed sequential scanning, it is sufficient to place a vertical driver consisting of a shift register on one side of the liquid crystal panel to double the normal scanning speed and also double the clock of the horizontal driver.
一方、インターレース走査を行なう場合、垂直ドライバ
を片側に配置したものではシフトレジスタの動作を１ラ
インおきの飛び越しシフト動作としなければならないた
め、ラッチ回路等が必要となる。このため、インターレ
ース走査を行なう場合は、走査線電極をパネルの左右に
１本おきに引出し２個の垂直ドライバで駆動する方が望
ましい。On the other hand, when performing interlaced scanning, if the vertical driver is arranged on one side, the shift register must perform an interlaced shift operation every other line, so a latch circuit or the like is required. For this reason, when performing interlaced scanning, it is preferable to draw out every other scanning line electrode on the left and right sides of the panel and drive them using two vertical drivers.
（ハ）発明が解決しようとする課題
上述の如く、倍速順次走査とインターレース走査とでは
望まれるドライバ構成が異なるため、従来、両者を同一
の液晶モジュール（液晶パネル及びドライバ）で実現し
たものはなかった。(c) Problems to be Solved by the Invention As mentioned above, the desired driver configurations are different for double-speed sequential scanning and interlaced scanning, so to date, there has been no one that has realized both using the same liquid crystal module (liquid crystal panel and driver). Ta.
（ニ）課題を解決するための手段
本発明はマトリクス型の液晶表示パネルと、この液晶表
示パネルの各奇数行に接続された第１垂直ドライバと、
前記液晶表示パネルの各偶数行に接続された第２垂直ド
ライバと、
前記液晶表示パネルの各列に接続され映像信号が印加さ
れる水平ドライバと、
前記第１及び第２垂直ドライバのシフト速度を２倍にす
る手段と、
前記映像信号を倍速変換する手段と、
前記水平ドライバのクロックを２倍にする手段とを備え
る。(d) Means for Solving the Problems The present invention comprises a matrix type liquid crystal display panel, a first vertical driver connected to each odd numbered row of the liquid crystal display panel, and a first vertical driver connected to each even numbered row of the liquid crystal display panel. a second vertical driver; a horizontal driver connected to each column of the liquid crystal display panel to which a video signal is applied; means for doubling the shift speed of the first and second vertical drivers; The apparatus includes means for converting the speed to double speed, and means for doubling the clock of the horizontal driver.
（ホ）作 用
本発明は前記第１及び第２垂直ドライバをフィールド毎
に交互に通常速度で動作させると共に、通常の映像信号
を通常速度で動作する前記水平ドライバに印加すること
によりインターレース走査を行ない、前記第１及び第２
垂直ドライバを１ライン毎に前記通常速度の２倍お速度
を動作させると共に、前記倍速変換手段により通常速度
の２倍にされた映像信号を前記通常速度の２倍で動作す
る前記水平ドライバに印加することにより倍速順次走査
を行なう。(E) Function The present invention performs interlaced scanning by alternately operating the first and second vertical drivers at normal speed for each field and applying a normal video signal to the horizontal driver operating at normal speed. conduct, said first and second
The vertical driver is operated at twice the normal speed for each line, and the video signal, which has been made twice the normal speed by the double speed conversion means, is applied to the horizontal driver, which operates at twice the normal speed. By doing so, double speed sequential scanning is performed.
（へ）実施例
以下、図面に従い本発明の一実施例を説明する。第１図
は本実施例装置のブロック図を示し、図中、（１）はフ
ルライン（４８０本）の液晶表示パネルであり、各行は
左右に交互に引出され、各列は上下に交互に引出されて
いる。（２）（３）は夫々、奇数行及び偶数行の走査電
極が接続される第１、第２垂直ドライバ、（４）（５）
は奇数列及び偶数列の信号電橋が接続される第１．第２
水平ドライバ、（６）は水平同期信号（Ｈｐ）及び垂直
同期信号（Ｖｐ）に基づき各種制御信号を発生する同期
制御回路、（７）はこの同期制御回路からの第１、第２
スタートパルス及び第１、第２クロツクパルスを夫々、
前記、第１、第２垂直ドライバ及び第１、第２水平ドラ
イバに、インターレース走査時と倍速順次走査時との切
換信号により切換えて出力する第１スイツチ、（８）は
映像信号を動きに応じて、ライン相関及びフレーム相関
を利用して順次走査化する倍速順次走査化回路であり、
ラインメモリ（８０）、フィールドメモリ（８１）、混
合回路（８２）及び時間圧縮回路（８３）で構成される
。この回路自身公知であり、例えば「テレビ技術′８９
年２月号ＪＰ１９〜Ｐ２３に記載されているので詳述は
省略する。（９）は、この倍速順次走査化回路（８）出
力と現映像信号とを前記切換信号により切換えて、第１
、第２水平ドライバ（４）（５）に供給する第２スイツ
チである。(f) Example Hereinafter, an example of the present invention will be described with reference to the drawings. Figure 1 shows a block diagram of the device of this embodiment. In the figure, (1) is a full-line (480 lines) liquid crystal display panel, each row is drawn out alternately left and right, and each column is drawn out alternately up and down. It's being pulled out. (2) and (3) are first and second vertical drivers to which odd-numbered rows and even-numbered rows of scanning electrodes are connected, respectively; (4) and (5)
is the first point where the signal bridges of the odd and even rows are connected. Second
horizontal driver; (6) is a synchronous control circuit that generates various control signals based on the horizontal synchronous signal (Hp) and vertical synchronous signal (Vp); (7) is the first and second signal from this synchronous control circuit;
The start pulse and the first and second clock pulses are respectively
The first switch (8) switches and outputs the video signal to the first and second vertical drivers and the first and second horizontal drivers according to a switching signal for interlaced scanning and double-speed sequential scanning. This is a double-speed sequential scanning circuit that performs sequential scanning using line correlation and frame correlation,
It is composed of a line memory (80), a field memory (81), a mixing circuit (82), and a time compression circuit (83). This circuit itself is well known, for example, "Television Technology '89
Since it is described in February issue JP19-P23, detailed explanation will be omitted. (9) switches the output of this double-speed sequential scanning circuit (8) and the current video signal using the switching signal, and
, a second switch that supplies the second horizontal drivers (4) and (5).
次に第２図及び第３図の水平及び垂直ドライバの駆動波
形図に従い上述の回路の動作を説明する。Next, the operation of the above-mentioned circuit will be explained according to the driving waveform diagrams of the horizontal and vertical drivers shown in FIGS. 2 and 3.
まず、通常のインターレース走査時は、第１及び第２ス
イツチ（７）（９）の接点は上側に位置しており、第２
スイツチ（９）はインターレース映像信号を選択して第
１、第２水平ドライバ（４）（５）へ供給する。First, during normal interlaced scanning, the contacts of the first and second switches (7) and (9) are located on the upper side, and the
A switch (9) selects the interlaced video signal and supplies it to the first and second horizontal drivers (4) and (5).
また、第１スイツチ（７）は同期制御回路（６）出力と
して第１スタートパルス（ＳＴＩ）、第１クロツクパル
ス（ＣＰＩ）を選択し通常速度で水平ドライバ（４）（
５）を駆動する。Further, the first switch (7) selects the first start pulse (STI) and the first clock pulse (CPI) as the output of the synchronous control circuit (6), and the horizontal driver (4) (
5) Drive.
更に、第】スイッチ（７）により選択した第２スタート
パルス（ＳＴ２０）（ＳＴ２１ ）及び第２クロツクパ
ルス（ＣＦ２Ｏ）（ＣＦ３Ｉ ）が夫々、第１、第２垂
直ドライバ（２）（３）に供給される。従って、第１垂
直ドライバ（２）は奇数フィールド時、シフトパルス（
ＣＩ ）（Ｇ３）・・・（Ｇ４７９）を出力し、第２垂
直ドライバ（３）は偶数フィールド時、シフトパルス（
Ｇ２）（Ｇ４）・・・（Ｇ４８０）を出力するためフル
ラインインターレース操作を実現する。Further, the second start pulses (ST20) (ST21) and the second clock pulses (CF2O) (CF3I) selected by the switch (7) are supplied to the first and second vertical drivers (2) and (3), respectively. Ru. Therefore, the first vertical driver (2) uses a shift pulse (
CI ) (G3)...(G479), and the second vertical driver (3) outputs a shift pulse (
G2) (G4)... (G480) to output full line interlace operation.
次に、倍速順次走査時は、第２スイツチ（９）は倍速順
次走査化回路（８）出力を選択して第１、第２水平ドラ
イバ（４）（５）へ供給する。Next, during double-speed sequential scanning, the second switch (9) selects the output of the double-speed sequential scanning circuit (8) and supplies it to the first and second horizontal drivers (4) and (5).
また、第１スイツチ（７）は第１スタートパルス（ＳＴ
Ｉ’）、第１２０ツクパルス（ＣＰＩ ’ ）を選択し
、倍速で第１、第２水平ドライバ（４）（５）を駆動す
る。Further, the first switch (7) is activated by the first start pulse (ST
I') and the 120th clock pulse (CPI') are selected to drive the first and second horizontal drivers (4) and (5) at double speed.
更に、第１、第２垂直ドライバ（２）（３）には第１ス
イツチ（７）により選択した第２スタートパレス（ＳＴ
２０’）ＧＳＴ２１°）が供給される。従って、第１垂
直ドライバ（２）出力（Ｇｌ）（Ｇ３）・・・と第２垂
直ドライバ（３）出力（０２）（Ｇ４）・・・は交互に
現われ、結果として各行が順次１／２）１ （Ｈは水平
走査期間）毎に選択される。ここで、各シフトパルス（
Ｇｌ）（Ｇ２）・・・のパルス幅はＩＨ期間であるのに
対して、各水平ドライバからは１／２Ｈ毎に新しい信号
が液晶パネルに供給されるため、前半の１／２Ｈに書込
まれた信号は引続く後半の１／２Ｈに書込まれる信号に
よりＨ換えられることになり、この後半の１７２Ｈに書
込まれた信号が１フイールド保持されることになる。即
ち、信号の書込みには１／２Ｈで良いのであるが、あえ
てパルス幅をＩＨとすることにより垂直ドライバに与え
る第２クロツクパルス（ＣＦ２Ｏ）（ＣＦ３Ｉ）を変更
することなく駆動できるのである。Furthermore, the first and second vertical drivers (2) and (3) are supplied with a second start pulse (ST) selected by the first switch (7).
20') GST21°) is supplied. Therefore, the first vertical driver (2) output (Gl) (G3)... and the second vertical driver (3) output (02) (G4)... appear alternately, and as a result, each row is sequentially halved. )1 (H is the horizontal scanning period). Here, each shift pulse (
While the pulse width of Gl) (G2)... is the IH period, a new signal is supplied to the liquid crystal panel from each horizontal driver every 1/2H, so writing is performed in the first half of 1/2H. The signal written in the second half of 172H is subsequently changed to H by the signal written in the second half of 172H, and the signal written in the second half of 172H is held for one field. That is, 1/2H is sufficient for signal writing, but by intentionally setting the pulse width to IH, driving can be performed without changing the second clock pulses (CF2O) (CF3I) given to the vertical driver.
この様にして高画質の倍速順位走査を実現する。In this way, double-speed sequential scanning with high image quality is realized.
（ト）発明の効果
上述の如く同一のフルライン型の液晶モジュールを用い
て、インターレース走査及び倍速線順次走査を実現でき
るため、簡単な切換えによりＨＤＴＶ等の高画質ＴＶ方
式に対応できる。(G) Effects of the Invention As described above, since interlaced scanning and double-speed line sequential scanning can be realized using the same full-line liquid crystal module, it is possible to support high-definition TV systems such as HDTV by simple switching.
また、両走査を行なうに際して、各ドライバのシフトレ
ジスタは単純なシフト動作だけで済むため、安価に回路
が実現できる。Further, when performing both scans, the shift register of each driver requires only a simple shift operation, so the circuit can be realized at low cost.
図面はいずれも本発明の一実施例に関し、第１図は本実
施例装ｍの回路ブロック図、第２図は水平ドライバの駆
動波形図、第３図は垂直ドライバの駆動波形図である。
（１）・・・液晶表示パネル、（２）（３）・・・第１
、第２垂直ドライバ、（４）（５）・・・第１、第２水
平ドライバ、（６）・・・同期制御回路、（７）（９）
・・・第１、第２スイツチ、（８）・・・倍速順次走査
化回路。The drawings all relate to one embodiment of the present invention; FIG. 1 is a circuit block diagram of the device of this embodiment, FIG. 2 is a drive waveform diagram of a horizontal driver, and FIG. 3 is a drive waveform diagram of a vertical driver. (1)...Liquid crystal display panel, (2)(3)...First
, second vertical driver, (4) (5)...first and second horizontal drivers, (6)...synchronous control circuit, (7) (9)
. . . first and second switches, (8) . . . double-speed sequential scanning circuit.
Claims (1)
ライバと、 前記液晶表示パネルの各偶数行に接続された第２垂直ド
ライバと、 前記液晶表示パネルの各列に接続され映像信号が印加さ
れる水平ドライバと、 前記第１及び第２垂直ドライバのシフト速度を２倍にす
る手段と、 前記映像信号を倍速変換する手段と、 前記水平ドライバのクロックを２倍にする手段とを備え
、前記第１及び第２垂直ドライバをフィールド毎に交互
に通常速度で動作させると共に、通常の映像信号を通常
速度で動作する前記水平ドライバに印加することにより
インターレース走査を行ない、前記第１及び第２垂直ド
ライバを１ライン毎に前記通常速度の２倍の速度で動作
させると共に、前記倍速変換手段により通常速度の２倍
にされた映像信号を前記通常速度の２倍で動作する前記
水平ドライバに印加することにより倍速順次走査を行な
うことを特徴とする液晶表示装置。(1) A matrix-type liquid crystal display panel, a first vertical driver connected to each odd-numbered row of the liquid crystal display panel, a second vertical driver connected to each even-numbered row of the liquid crystal display panel, and the liquid crystal display. a horizontal driver connected to each column of the panel to which a video signal is applied; means for doubling the shift speed of the first and second vertical drivers; means for doubling the speed of the video signal; means for doubling the clock, by alternately operating the first and second vertical drivers at the normal speed for each field and applying a normal video signal to the horizontal driver operating at the normal speed. Interlaced scanning is performed, the first and second vertical drivers are operated line by line at twice the normal speed, and the video signal doubled from the normal speed by the double speed conversion means is converted to the normal speed. A liquid crystal display device characterized in that double-speed sequential scanning is performed by applying voltage to the horizontal driver that operates at twice the speed of the horizontal driver.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1270615A JP2623012B2 (en) | 1989-10-18 | 1989-10-18 | Liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1270615A JP2623012B2 (en) | 1989-10-18 | 1989-10-18 | Liquid crystal display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03132274A true JPH03132274A (en) | 1991-06-05 |
| JP2623012B2 JP2623012B2 (en) | 1997-06-25 |
Family
ID=17488556
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1270615A Expired - Fee Related JP2623012B2 (en) | 1989-10-18 | 1989-10-18 | Liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2623012B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002258809A (en) * | 2001-03-02 | 2002-09-11 | Seiko Epson Corp | Semiconductor integrated circuit and image display device |
| WO2005001804A1 (en) * | 2003-06-30 | 2005-01-06 | Sony Corporation | Flat display unit |
| JP2005018066A (en) * | 2003-06-23 | 2005-01-20 | Samsung Electronics Co Ltd | Liquid crystal display device and its driving method |
| JP2006064964A (en) * | 2004-08-26 | 2006-03-09 | Toshiba Matsushita Display Technology Co Ltd | Flat display apparatus and driving method for the same |
| JP2006154811A (en) * | 2004-11-26 | 2006-06-15 | Samsung Sdi Co Ltd | Scan driver and organic light emitting display for selectively performing progressive scanning and interlaced scanning |
| JP2006330263A (en) * | 2005-05-25 | 2006-12-07 | Toshiba Matsushita Display Technology Co Ltd | Flat-panel display device and driving method for flat-panel display device |
| JP2008225424A (en) * | 2007-03-14 | 2008-09-25 | Samsung Electronics Co Ltd | Liquid crystal display |
-
1989
- 1989-10-18 JP JP1270615A patent/JP2623012B2/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002258809A (en) * | 2001-03-02 | 2002-09-11 | Seiko Epson Corp | Semiconductor integrated circuit and image display device |
| JP2005018066A (en) * | 2003-06-23 | 2005-01-20 | Samsung Electronics Co Ltd | Liquid crystal display device and its driving method |
| US8274460B2 (en) | 2003-06-23 | 2012-09-25 | Samsung Electronics Co., Ltd. | Display driving device and method and liquid crystal display apparatus having the same |
| WO2005001804A1 (en) * | 2003-06-30 | 2005-01-06 | Sony Corporation | Flat display unit |
| JP2006064964A (en) * | 2004-08-26 | 2006-03-09 | Toshiba Matsushita Display Technology Co Ltd | Flat display apparatus and driving method for the same |
| JP2006154811A (en) * | 2004-11-26 | 2006-06-15 | Samsung Sdi Co Ltd | Scan driver and organic light emitting display for selectively performing progressive scanning and interlaced scanning |
| US7692619B2 (en) | 2004-11-26 | 2010-04-06 | Samsung Mobile Display Co., Ltd. | Scan driver and organic light emitting display for selectively performing progressive scanning and interlaced scanning |
| JP2006330263A (en) * | 2005-05-25 | 2006-12-07 | Toshiba Matsushita Display Technology Co Ltd | Flat-panel display device and driving method for flat-panel display device |
| JP2008225424A (en) * | 2007-03-14 | 2008-09-25 | Samsung Electronics Co Ltd | Liquid crystal display |
| US8823622B2 (en) | 2007-03-14 | 2014-09-02 | Samsung Display Co., Ltd. | Liquid crystal display |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2623012B2 (en) | 1997-06-25 |
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