JPH03125440A - Electronic parts - Google Patents
Electronic partsInfo
- Publication number
- JPH03125440A JPH03125440A JP1263367A JP26336789A JPH03125440A JP H03125440 A JPH03125440 A JP H03125440A JP 1263367 A JP1263367 A JP 1263367A JP 26336789 A JP26336789 A JP 26336789A JP H03125440 A JPH03125440 A JP H03125440A
- Authority
- JP
- Japan
- Prior art keywords
- film
- lead
- reinforcing member
- chip
- flatness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 16
- 229910000679 solder Inorganic materials 0.000 claims abstract description 12
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 238000007789 sealing Methods 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 abstract description 4
- 229920000647 polyepoxide Polymers 0.000 abstract description 4
- 239000010949 copper Substances 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052802 copper Inorganic materials 0.000 abstract description 2
- 239000007769 metal material Substances 0.000 abstract description 2
- 239000012779 reinforcing material Substances 0.000 abstract 1
- 239000010931 gold Substances 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
（イ）産業上の利用分野
この発明は、いわゆるＴＡＢ （Ｔａｐｅ Ａｕｔｏｍ
ａｔｅｄＢｏｎｄｉｎｇ）形量子部品に関し、詳しく言
えばそのアウターリードの平坦性確保に関する。[Detailed description of the invention] (a) Industrial application field This invention is applicable to so-called TAB (Tape Auto
atedBonding) type quantum component, and more specifically, it relates to ensuring the flatness of its outer lead.
（ロ）従来の技術 従来のＴＡＢ形電子電子部品例を第４図に示す。(b) Conventional technology An example of a conventional TAB type electronic component is shown in FIG.
このＴＡＢ形電子電子部品１１フィルム１２、リード１
３、ソルダーレジスト１４、チップ１５、樹脂１７等よ
り構成される。フィルム１２は、中央に開口部１２ａを
有すると共に、リード１３が形成されている。このリー
ド１３において、開口部１２ａ内に突出している部分を
インナーリード１３ａ、フィル１８１２の外周縁より突
出している側をアウターリード１３ｂと呼ぶ。フィルム
１２上には、ソルダーレジスト１４が印刷され、微細な
パターンのり一ド１３が被覆保護される。インナーリー
ド１３ａには、バンプ１６を介してチップ１５がボンデ
ィングされ、さらにインナーリード１３ａ１チツプ１５
は、樹脂１７で封止されて、絶縁保護される。This TAB type electronic component 11 film 12, lead 1
3. Consists of solder resist 14, chip 15, resin 17, etc. The film 12 has an opening 12a in the center and has leads 13 formed therein. In this lead 13, a portion protruding into the opening 12a is called an inner lead 13a, and a side protruding from the outer peripheral edge of the fill 1812 is called an outer lead 13b. A solder resist 14 is printed on the film 12, and a fine pattern of glue 13 is covered and protected. A chip 15 is bonded to the inner lead 13a via a bump 16, and the chip 15 is bonded to the inner lead 13a1.
is sealed with resin 17 to provide insulation protection.
（ハ）発明が解決しようとする課題
上記従来のＴＡＢ形電子電子部品１１回路基板１９に実
装され、回路基板１９上の導体パターン１９ａとアウタ
ーリード１３ｂとがはんだ付けされる。(C) Problems to be Solved by the Invention The above conventional TAB type electronic component 11 is mounted on a circuit board 19, and the conductor pattern 19a on the circuit board 19 and the outer lead 13b are soldered.
ところが、ソルダーレジスト１４が硬化する際に、それ
自体が収縮するため、フィルム１２がうねるように変形
する。さらに、樹脂１７が硬化する際にも、フィルム１
２がうねるように変形する。However, when the solder resist 14 hardens, it shrinks, causing the film 12 to deform in an undulating manner. Furthermore, even when the resin 17 is cured, the film 1
2 deforms in a undulating manner.
その結果アウターリード１３ｂの平坦性が川なわれ、回
路基板１９への実装が困難となる。特に、ＴＡＢ形電子
電子部品型になれば、その分フィルムのうねりも大きく
なり、この問題は一層顕著なものとなる。As a result, the flatness of the outer lead 13b deteriorates, making mounting on the circuit board 19 difficult. In particular, if the TAB type electronic component type is used, the waviness of the film will be correspondingly large, and this problem will become even more remarkable.
この発明は、上記に鑑みなされたもので、アウターリー
ドの平坦性を確保し、実装が容易となるＴＡＢ形電子電
子部品供を目的としている。The present invention was made in view of the above, and aims to provide a TAB type electronic component that ensures flatness of the outer lead and facilitates mounting.
（ニ）課題を解決するための手段及び作用この発明の電
子部品の構成を一実施例に対応する第１図を用いて説明
すると、開口部２ａを有するフィルム２と、このフィル
ム２上に形成され、インナー側３ａが前記開口部２ａ内
に突出し、アウター側３ｂがフィルム２外周縁より突出
するり一ド３と、前記フィルム２上に形成され、このリ
ード３を被覆保護するソルダーレジス！・４と、前記リ
ード３のインナー側３ａにボンディングされるチ・ンプ
５と、このチップ５及び前記リード３のインナー側３ａ
とを封止する樹脂７とよりなるものにおいて、前記フィ
ルム２上に、補強部材８を接着したことを特徴とするも
のである。この補強部材８を接着することによりフィル
ム２を補強すると共に矯正し、ソルダーレジスト４及び
樹脂７硬化時のフィルム２のうねりを防止し、アウター
リード３ｂの平坦性を確保する。(d) Means and operation for solving the problems The structure of the electronic component of the present invention will be explained using FIG. 1 corresponding to one embodiment. A lead 3 whose inner side 3a projects into the opening 2a and whose outer side 3b projects from the outer peripheral edge of the film 2, and a solder resist formed on the film 2 to cover and protect the lead 3! 4, a chip 5 bonded to the inner side 3a of the lead 3, and this chip 5 and the inner side 3a of the lead 3.
A reinforcing member 8 is bonded onto the film 2. By adhering this reinforcing member 8, the film 2 is reinforced and corrected, preventing the film 2 from waviness when the solder resist 4 and the resin 7 are cured, and ensuring the flatness of the outer lead 3b.
（ホ）実施例
この発明の一実施例を第１図乃至第３図に基づいて以下
に説明する。(e) Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 to 3.
第１図は、実施例ＴＡＢ形電子電子部品中央縦断面図、
第２図は、同ＴＡＢ形電子部品１の１部を破断して示す
平面図である。２は、フィルムであり、製造工程におい
ては、フィルムキャリアを構成し、実装前にこのフィル
ムキャリアより切り熱される。フィルム２の材質は、ボ
ンディング時の高温に耐えられるよう、ポリイミド系樹
脂のものが使用されている。このフィルム２の中央部に
は、開口部２ａが形成されている。FIG. 1 is a central vertical cross-sectional view of an example TAB type electronic component;
FIG. 2 is a partially cutaway plan view of the TAB type electronic component 1. Reference numeral 2 denotes a film, which constitutes a film carrier in the manufacturing process, and is heated by the film carrier before mounting. The film 2 is made of polyimide resin so that it can withstand high temperatures during bonding. An opening 2a is formed in the center of the film 2.
フィルム２上には、リード３が銅（Ｃｕ）で形成される
。リード３の開口部２ａ内に突出した部分はインナーリ
ード３ａとなり、またフィルム２外周縁より突出した部
分はアウターリード３ｂとなる。Leads 3 are formed of copper (Cu) on the film 2. The portion of the lead 3 that protrudes into the opening 2a becomes an inner lead 3a, and the portion that protrudes from the outer peripheral edge of the film 2 becomes an outer lead 3b.
フィルム２上には、ソルダーレジスト４が印刷形成され
、リード３の微細なパターン（幅５０μｍ）が保護され
る。ソルダーレジスト４硬化後、めっき処理が施され、
インナーリーＦ３ａ及びアウターリード３ｂが錫（Ｓｎ
）又は金（Ａｕ）でめっきされる。A solder resist 4 is printed on the film 2 to protect the fine pattern (width 50 μm) of the leads 3. After hardening the solder resist 4, plating is applied,
The inner lead F3a and the outer lead 3b are made of tin (Sn).
) or plated with gold (Au).
インナーリード３ａには、チップ５がボンディングされ
る。チップ５の図示しないアルミニウム（ＡＰ）電極上
には金（Ａｕ）よりなるハンプ６が形成され、図示しな
いサーモードツールを用いて、バンプ６をインナーリー
ド３ａに熱圧着して接合する。A chip 5 is bonded to the inner lead 3a. A bump 6 made of gold (Au) is formed on an aluminum (AP) electrode (not shown) of the chip 5, and the bump 6 is bonded to the inner lead 3a by thermocompression using a thermode tool (not shown).
ボンディング終了後、フィルム２上には補強部材８が接
着され、ソルダーレジスト４硬化時に生じたフィルム２
のうねりが矯正される。この補強部材８には、厚さ０．
１〜０．２ｍｍの平板状のものが使用される。なお、補
強部材８を金属材料（表面を絶縁処理しておく）で形成
すれば、チップ５の放熱効果も期待できる。After the bonding is completed, a reinforcing member 8 is bonded onto the film 2, and the film 2 generated when the solder resist 4 is cured is
The undulations are corrected. This reinforcing member 8 has a thickness of 0.
A flat plate with a diameter of 1 to 0.2 mm is used. Note that if the reinforcing member 8 is formed of a metal material (the surface of which is insulated), the heat dissipation effect of the chip 5 can also be expected.
チップ５と補強部材８との間には、エポキシ樹脂７が充
填され、チップ５とインナーリード３ａが封止され保護
される。このエポキシ系の樹脂７が硬化する際のフィル
ム２の変形は、補強部材８により抑えられる。従って、
アウターリード３ｂの平坦性が確保され、基板への実装
が容易となる。Epoxy resin 7 is filled between the chip 5 and the reinforcing member 8, and the chip 5 and inner leads 3a are sealed and protected. The reinforcing member 8 suppresses deformation of the film 2 when the epoxy resin 7 hardens. Therefore,
The flatness of the outer lead 3b is ensured, and mounting on the board becomes easy.
第３図は、変形例に係るＴＡＢ形電子電子部品１してお
り、この例ではフィルム２のソルダーレジスト４が形成
された側に、平面形状が枠状の補強部材８“を接着して
なるものであり、同様にアウターリード３ｂの平坦性を
確保することができる。FIG. 3 shows a TAB type electronic component 1 according to a modified example, in which a reinforcing member 8'' having a frame-like planar shape is adhered to the side of the film 2 on which the solder resist 4 is formed. Similarly, the flatness of the outer lead 3b can be ensured.
（へ）発明の効果
以」−４説明したように、この発明の電子部品は、フィ
ルム、Ｊ二に補強部材を接着したものであるから、アウ
ターリードの平坦性が確保され、基板への実装が容易と
なる利点を有している。(f) Effects of the Invention''-4 As explained above, since the electronic component of the present invention is made by bonding a reinforcing member to the film, the flatness of the outer lead is ensured, and mounting on the board is easy. It has the advantage of being easy to use.
第１図は、この発明の一実施例に係るＴＡＢ形電子電子
部品央縦断面図、第２閏は、同ＴΔ■３形電子部品の一
部を破断して示す平面図、第３図は、同ＴＡＢ形電子部
品の変形例を説明する中央縦断面図、第４図は、従来の
ＴＡＢ形電子電子部品央縦断面図である。
２：フィルム、 ３：リード、３ａ：インナー
リード、３ｂ＝アウターリード、４：ソルダーレジスト
、５：チップ、
７：樹脂、 ８：補強部材。FIG. 1 is a central vertical sectional view of a TAB type electronic component according to an embodiment of the present invention, the second leap is a partially cutaway plan view of the TAB type electronic component, and FIG. FIG. 4 is a central vertical sectional view of a conventional TAB type electronic component. 2: film, 3: lead, 3a: inner lead, 3b = outer lead, 4: solder resist, 5: chip, 7: resin, 8: reinforcing member.
Claims (1)
成され、インナー側が前記開口部内に突出しアウター側
がフィルム外周縁より突出するリードと、前記フィルム
上に形成され、このリードを被覆保護するソルダーレジ
ストと、前記リードのインナー側にボンディングされる
チップと、このチップ及び前記リードのインナー側とを
封止する樹脂とよりなる電子部品において、 前記フィルム上に、補強部材を接着したことを特徴とす
る電子部品。(1) A film having an opening, a lead formed on this film with an inner side protruding into the opening and an outer side protruding from the outer periphery of the film, and a solder resist formed on the film to cover and protect the lead. and an electronic component comprising a chip bonded to the inner side of the lead, and a resin sealing the chip and the inner side of the lead, characterized in that a reinforcing member is bonded onto the film. electronic components.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1263367A JPH0624212B2 (en) | 1989-10-09 | 1989-10-09 | Electronic parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1263367A JPH0624212B2 (en) | 1989-10-09 | 1989-10-09 | Electronic parts |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03125440A true JPH03125440A (en) | 1991-05-28 |
| JPH0624212B2 JPH0624212B2 (en) | 1994-03-30 |
Family
ID=17388506
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1263367A Expired - Fee Related JPH0624212B2 (en) | 1989-10-09 | 1989-10-09 | Electronic parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0624212B2 (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0529385A (en) * | 1991-07-25 | 1993-02-05 | Matsushita Electric Ind Co Ltd | Semiconductor device mounted on film carrier |
| US5442232A (en) * | 1992-12-28 | 1995-08-15 | Kabushiki Kaisha Toshiba | Thin semiconductor package having many pins and likely to dissipate heat |
| US5581121A (en) * | 1993-03-29 | 1996-12-03 | Staktek Corporation | Warp-resistant ultra-thin integrated circuit package |
| US5644161A (en) * | 1993-03-29 | 1997-07-01 | Staktek Corporation | Ultra-high density warp-resistant memory module |
| US5659198A (en) * | 1992-01-31 | 1997-08-19 | Kabushiki Kaisha Toshiba | TCP type semiconductor device capable of preventing crosstalk |
| US5801437A (en) * | 1993-03-29 | 1998-09-01 | Staktek Corporation | Three-dimensional warp-resistant integrated circuit module method and apparatus |
| US5811877A (en) * | 1994-08-30 | 1998-09-22 | Hitachi, Ltd. | Semiconductor device structure |
| US5945732A (en) * | 1997-03-12 | 1999-08-31 | Staktek Corporation | Apparatus and method of manufacturing a warp resistant thermally conductive integrated circuit package |
Citations (8)
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|---|---|---|---|---|
| JPS5116877A (en) * | 1974-07-31 | 1976-02-10 | Sharp Kk | |
| JPS54124473U (en) * | 1978-02-17 | 1979-08-31 | ||
| JPS568863A (en) * | 1979-07-02 | 1981-01-29 | Mitsubishi Electric Corp | Substrate for semiconductor device |
| JPS5739562A (en) * | 1980-08-22 | 1982-03-04 | Citizen Watch Co Ltd | Mounting structure for ic |
| JPS63117436A (en) * | 1986-11-06 | 1988-05-21 | Toshiba Corp | Film carrier |
| JPS6430240A (en) * | 1987-07-27 | 1989-02-01 | Seiko Epson Corp | Semiconductor device |
| JPH01135050A (en) * | 1987-11-20 | 1989-05-26 | Hitachi Ltd | Semiconductor device |
| JPH0382047A (en) * | 1989-08-24 | 1991-04-08 | Nec Corp | Film carrier semicodcutor device |
-
1989
- 1989-10-09 JP JP1263367A patent/JPH0624212B2/en not_active Expired - Fee Related
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5116877A (en) * | 1974-07-31 | 1976-02-10 | Sharp Kk | |
| JPS54124473U (en) * | 1978-02-17 | 1979-08-31 | ||
| JPS568863A (en) * | 1979-07-02 | 1981-01-29 | Mitsubishi Electric Corp | Substrate for semiconductor device |
| JPS5739562A (en) * | 1980-08-22 | 1982-03-04 | Citizen Watch Co Ltd | Mounting structure for ic |
| JPS63117436A (en) * | 1986-11-06 | 1988-05-21 | Toshiba Corp | Film carrier |
| JPS6430240A (en) * | 1987-07-27 | 1989-02-01 | Seiko Epson Corp | Semiconductor device |
| JPH01135050A (en) * | 1987-11-20 | 1989-05-26 | Hitachi Ltd | Semiconductor device |
| JPH0382047A (en) * | 1989-08-24 | 1991-04-08 | Nec Corp | Film carrier semicodcutor device |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0529385A (en) * | 1991-07-25 | 1993-02-05 | Matsushita Electric Ind Co Ltd | Semiconductor device mounted on film carrier |
| US5659198A (en) * | 1992-01-31 | 1997-08-19 | Kabushiki Kaisha Toshiba | TCP type semiconductor device capable of preventing crosstalk |
| US5652184A (en) * | 1992-12-28 | 1997-07-29 | Kabushiki Kaisha Toshiba | Method of manufacturing a thin semiconductor package having many pins and likely to dissipate heat |
| US5442232A (en) * | 1992-12-28 | 1995-08-15 | Kabushiki Kaisha Toshiba | Thin semiconductor package having many pins and likely to dissipate heat |
| US5801437A (en) * | 1993-03-29 | 1998-09-01 | Staktek Corporation | Three-dimensional warp-resistant integrated circuit module method and apparatus |
| US5644161A (en) * | 1993-03-29 | 1997-07-01 | Staktek Corporation | Ultra-high density warp-resistant memory module |
| US5581121A (en) * | 1993-03-29 | 1996-12-03 | Staktek Corporation | Warp-resistant ultra-thin integrated circuit package |
| US5828125A (en) * | 1993-03-29 | 1998-10-27 | Staktek Corporation | Ultra-high density warp-resistant memory module |
| US5843807A (en) * | 1993-03-29 | 1998-12-01 | Staktek Corporation | Method of manufacturing an ultra-high density warp-resistant memory module |
| US5864175A (en) * | 1993-03-29 | 1999-01-26 | Staktek Corporation | Wrap-resistant ultra-thin integrated circuit package fabrication method |
| US5895232A (en) * | 1993-03-29 | 1999-04-20 | Staktek Corporation | Three-dimensional warp-resistant integrated circuit module method and apparatus |
| US6194247B1 (en) | 1993-03-29 | 2001-02-27 | Staktek Group L.P. | Warp-resistent ultra-thin integrated circuit package fabrication method |
| US5811877A (en) * | 1994-08-30 | 1998-09-22 | Hitachi, Ltd. | Semiconductor device structure |
| US5945732A (en) * | 1997-03-12 | 1999-08-31 | Staktek Corporation | Apparatus and method of manufacturing a warp resistant thermally conductive integrated circuit package |
| US6190939B1 (en) | 1997-03-12 | 2001-02-20 | Staktek Group L.P. | Method of manufacturing a warp resistant thermally conductive circuit package |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0624212B2 (en) | 1994-03-30 |
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