JPH03117029A - Analog/digital converter - Google Patents
Analog/digital converterInfo
- Publication number
- JPH03117029A JPH03117029A JP25424289A JP25424289A JPH03117029A JP H03117029 A JPH03117029 A JP H03117029A JP 25424289 A JP25424289 A JP 25424289A JP 25424289 A JP25424289 A JP 25424289A JP H03117029 A JPH03117029 A JP H03117029A
- Authority
- JP
- Japan
- Prior art keywords
- conversion
- section
- reference voltage
- analog
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 43
- 230000003321 amplification Effects 0.000 claims abstract description 28
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 28
- 238000001514 detection method Methods 0.000 claims abstract description 12
- 238000005259 measurement Methods 0.000 claims description 11
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000000737 periodic effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はアナログ・デジタル変換装置に関し、特にアナ
ログ電圧をデジタル信号に変換する計測用のアナログ・
デジタル変換装置に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an analog-to-digital conversion device, and particularly to an analog-to-digital conversion device for measurement that converts an analog voltage into a digital signal.
The present invention relates to a digital conversion device.
第２図は従来のアナログ・デジタル（Ａ／Ｄ）変換装置
の一例を示すブロック図である。FIG. 2 is a block diagram showing an example of a conventional analog-to-digital (A/D) converter.
第２図において、複数の入力ごとに接続されたアナログ
の増幅部１１ａ〜ｌｌｎとこの増幅部１１ａ〜１１．
ｎの増幅率を変える利得調整器１２ａ〜１２ｎと、増幅
器１１ａ〜１１ｎの出力をＡ／Ｄ変換部１４に供給する
セレクタ１３と、セレクタ１３及びＡ／Ｄ変換部１４を
制御し、入力のアナログ電圧を変換しデジタル信号を出
力させる制御部１５とを有し、増幅部１１ａ〜ｌｌｎに
て入力レンジに応じて利得調整器１２ａ〜１２ｎにより
決定された増幅率で計測信号を増幅し、セレクタ１３に
て制御部１５より指示されたチャネルの入力をＡ／Ｄ変
換部１４へ入力する。Ａ／Ｄ変換部１４は入力されたア
ナログ信号をＡ／Ｄ変換し出力する。制御部１５はＡ／
Ｄ変換の全体動作を制御するものであり、利得調整は人
為的に利得調整器１２を可変して行う方式でああっな。In FIG. 2, analog amplifying sections 11a to 11.
gain adjusters 12a to 12n that change the amplification factor of n; a selector 13 that supplies the outputs of the amplifiers 11a to 11n to the A/D converter 14; It has a control section 15 that converts the voltage and outputs a digital signal, and the amplification sections 11a to lln amplify the measurement signal with an amplification factor determined by the gain adjusters 12a to 12n according to the input range, and the selector 13 The input of the channel instructed by the control unit 15 is input to the A/D conversion unit 14. The A/D converter 14 A/D converts the input analog signal and outputs the result. The control unit 15 is A/
It controls the overall operation of D conversion, and gain adjustment is performed by artificially varying the gain adjuster 12.
上述した従来のＡ／Ｄ変換装置は、連続的に増幅率を可
変可能な増幅器を入力数分有し、各アナログ電圧に対す
るデジタル変換値の調整を各増幅器の増幅率調整にて行
う方式となっているので、初期及び、定期点検時に増幅
率の校正を行う必要が有るという欠点がある。The conventional A/D converter described above has a number of input amplifiers that can continuously vary the amplification factor, and the digital conversion value for each analog voltage is adjusted by adjusting the amplification factor of each amplifier. Therefore, there is a drawback that it is necessary to calibrate the amplification factor during initial and periodic inspections.
本発明のアナログ・デジタル変換装置は、アナログ電圧
をデジタル値に変換するアナログ・デジタル変換装置に
おいて、複数の計測レンジに対応する前記アナログ電圧
を入力するセレクタ部と、前記計測レンジ毎の基準電圧
を発生する基準電圧部と、増幅率を設定する増幅部と、
前記基準電圧のＡ／Ｄ変換値により前記アナログ電圧の
Ａ／Ｄ変換誤差を検出する検出部と、前記Ａ／Ｄ変換値
を前記検出部からの値により変換誤差を補正する変換補
正部とを含み、入力毎に計測レンジを切り換えて自動的
に補正を行うことを特徴とする。An analog-to-digital conversion device of the present invention is an analog-to-digital conversion device for converting an analog voltage into a digital value, and includes a selector unit for inputting the analog voltage corresponding to a plurality of measurement ranges, and a reference voltage for each measurement range. a reference voltage section that generates, an amplification section that sets the amplification factor,
a detection unit that detects an A/D conversion error of the analog voltage using an A/D conversion value of the reference voltage; and a conversion correction unit that corrects the conversion error of the A/D conversion value using a value from the detection unit. It is characterized by automatically performing correction by switching the measurement range for each input.
次に、本発明について図面を参照して説明する。第１図
は本発明の一実施例のブロック図である。Next, the present invention will be explained with reference to the drawings. FIG. 1 is a block diagram of one embodiment of the present invention.
本実施例は、複数の計測レンジに対応するアナログ電圧
を入力するセレクタ部２と、計測レンジ毎の基準電圧を
発生する基準電圧発生部１と、増幅部３の増幅率を設定
する増幅率設定部４と、基準電圧のＡ／Ｄ変換電圧のＡ
／Ｄ変換値によりアナログ電圧のＡ／Ｄ変換誤差を検出
する検出部６と、Ａ／Ｄ変換値を検出部６からの値によ
り変換誤差を補正する変換補正部７とを有して構成され
る。This embodiment includes a selector section 2 that inputs analog voltages corresponding to a plurality of measurement ranges, a reference voltage generation section 1 that generates a reference voltage for each measurement range, and an amplification factor setting that sets the amplification factor of an amplification section 3. part 4, and A of the A/D conversion voltage of the reference voltage.
The converter includes a detection section 6 that detects an A/D conversion error of an analog voltage using a /D conversion value, and a conversion correction section 7 that corrects the conversion error of the A/D conversion value using a value from the detection section 6. Ru.
次に動作について説明する。Next, the operation will be explained.
制御部８からの信号にてセレクタ部２は基準電圧発生部
１の１つの基準電圧入力を増幅部３に接続すると共に増
幅率設定部４の増幅率の設定を行う、増幅率設定部４の
設定に応じて増幅部３で増幅し、Ａ／Ｄ変換部５へ出力
する。Ａ／Ｄ変換部５は、制御部８からの制御信号によ
り増幅部３からの入力電圧をデジタル値に変換し検出部
６へ出力する。また、基準電圧発生部１からの基準電圧
を増幅部３に接続して同様にデジタル値に変換する。検
出部６はＡ／Ｄ変換部５から入力された２つのデジタル
値からＡ／Ｄ変換誤差を算出し補正値を変換補正部７へ
出力する。これまでの動作を増幅率設定部４の増幅率毎
に行いＡ／Ｄ変換補正値の算出を行う。制御部８からの
信号にてセレクタ部２は順次計測するアナログ電圧入力
を増幅部３へ接続すると共に、増幅率設定部４は制御部
８の制御にて増幅部３の増幅率を可変し、Ａ／Ｄ変換部
５にてＡ／Ｄ変換したデジタル値を変換補正部７へ出力
すると変換補正部７では制御部８の制御にて検出部６で
の補正値にて計測値の補正を行いデジタル値の出力を行
う。In response to a signal from the control section 8, the selector section 2 connects one reference voltage input of the reference voltage generation section 1 to the amplification section 3, and sets the amplification factor of the amplification factor setting section 4. The amplification section 3 amplifies the signal according to the settings and outputs it to the A/D conversion section 5. The A/D conversion section 5 converts the input voltage from the amplification section 3 into a digital value according to a control signal from the control section 8 and outputs the digital value to the detection section 6 . Further, the reference voltage from the reference voltage generating section 1 is connected to the amplifying section 3 and similarly converted into a digital value. The detection unit 6 calculates an A/D conversion error from the two digital values input from the A/D conversion unit 5 and outputs a correction value to the conversion correction unit 7. The above operations are performed for each amplification factor of the amplification factor setting section 4 to calculate an A/D conversion correction value. The selector section 2 connects the sequentially measured analog voltage inputs to the amplification section 3 in response to a signal from the control section 8, and the amplification factor setting section 4 varies the amplification factor of the amplification section 3 under the control of the control section 8. When the A/D converter 5 outputs the A/D converted digital value to the conversion correction unit 7, the conversion correction unit 7 corrects the measured value using the correction value from the detection unit 6 under the control of the control unit 8. Outputs digital values.
以上説明したように本発明は、複数の計測レンジに対応
する基準電圧を有し、計算により自動的にレンジ毎の本
変換補正を行うことにより、Ａ１Ｄ変換装置の初期調整
及び、定期的に利得の調整を行う必要がなくなるという
効果がある。As explained above, the present invention has reference voltages corresponding to a plurality of measurement ranges, and by automatically performing main conversion correction for each range through calculation, initial adjustment of the A1D conversion device and periodic gain adjustment are performed. This has the effect of eliminating the need to make adjustments.
第１図は本発明の一実施例のブロック図、第２図は従来
のＡ／Ｄ変換装置の一例のブロック図である。
１・・・基準電圧発生部、２・・・セレクタ部、３・・
・増幅部、４・・・増幅率設定部、５・・・Ａ／Ｄ変換
部、６・・・検出部、７・・・変換補正部、８・・・制
御部。FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional A/D conversion device. 1... Reference voltage generation section, 2... Selector section, 3...
- Amplification section, 4... Amplification factor setting section, 5... A/D conversion section, 6... Detection section, 7... Conversion correction section, 8... Control section.
Claims (1)
タル変換装置において、複数の計測レンジに対応する前
記アナログ電圧を入力するセレクタ部と、前記計測レン
ジ毎の基準電圧を発生する基準電圧部と、増幅率を設定
する増幅部と、前記基準電圧のＡ／Ｄ変換値により前記
アナログ電圧のＡ／Ｄ変換誤差を検出する検出部と、前
記Ａ／Ｄ変換値を前記検出部からの値により変換誤差を
補正する変換補正部とを含み、入力毎に計測レンジを切
り換えて自動的に補正を行うことを特徴とするアナログ
・デジタル変換装置。An analog-to-digital converter that converts an analog voltage into a digital value includes a selector section that inputs the analog voltage corresponding to a plurality of measurement ranges, a reference voltage section that generates a reference voltage for each measurement range, and an amplification factor. an amplification section for setting, a detection section for detecting an A/D conversion error of the analog voltage based on an A/D conversion value of the reference voltage, and a conversion error correcting for the A/D conversion value using a value from the detection section. What is claimed is: 1. An analog-to-digital converter comprising: a conversion correction section that automatically performs correction by switching a measurement range for each input;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25424289A JPH03117029A (en) | 1989-09-28 | 1989-09-28 | Analog/digital converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25424289A JPH03117029A (en) | 1989-09-28 | 1989-09-28 | Analog/digital converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03117029A true JPH03117029A (en) | 1991-05-17 |
Family
ID=17262251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25424289A Pending JPH03117029A (en) | 1989-09-28 | 1989-09-28 | Analog/digital converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03117029A (en) |
-
1989
- 1989-09-28 JP JP25424289A patent/JPH03117029A/en active Pending
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