JPH0258213A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0258213A JPH0258213A JP20902388A JP20902388A JPH0258213A JP H0258213 A JPH0258213 A JP H0258213A JP 20902388 A JP20902388 A JP 20902388A JP 20902388 A JP20902388 A JP 20902388A JP H0258213 A JPH0258213 A JP H0258213A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- section
- exposure
- resist
- peripheral section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 16
- 230000002093 peripheral effect Effects 0.000 abstract description 8
- 238000000034 method Methods 0.000 abstract description 7
- 238000001514 detection method Methods 0.000 abstract description 3
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 210000000078 claw Anatomy 0.000 description 13
- 239000002184 metal Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 241000257465 Echinoidea Species 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 241001385733 Aesculus indica Species 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、半導体装置の製造方法及びに製造装置に関す
るものである。特にパターンを形成すべきウェハーの全
面にフォトレジストを付したウェハーの周辺部を選択的
に減光する事に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method and apparatus for manufacturing a semiconductor device. In particular, it relates to selectively dimming the peripheral area of a wafer on which a photoresist is applied over the entire surface of the wafer on which a pattern is to be formed.
［従来の技術］
従来の半導体装置の製造方法は特開昭６１−７９２２７
の様にフォトレジストを全面に塗布したウェハーの周辺
部を選択的に露光するものであった。[Prior art] A conventional method for manufacturing a semiconductor device is disclosed in Japanese Patent Application Laid-Open No. 61-79227.
The method involved selectively exposing the periphery of a wafer whose entire surface was coated with photoresist.
〔発明が解決しよ５とする課題］
しかし、従来の技術は固くてもろい樹脂を用いているポ
ジタイプフォトレジストに対してのもので、ウェハーの
周辺部を全周露光するものであった。[Problems to be Solved by the Invention] However, the conventional technique is for a positive type photoresist using a hard and brittle resin, and the periphery of the wafer is exposed all around.
しかし、ウェハーに付したフォトレジストがポジタイプ
ではな（ネガタイプフォトレジストの場合で、さらには
ウェハーの周辺部の全周を露光する必要がな（一部のみ
で十分な場合があり、従来の技術では適切な処理ができ
ない。第５図に示したよ５に、１：１反射投影型露光装
ｆ（たとえば、キャノン製ミラープロジェクションアラ
イナ−ＭＰＡ−６００ＦＡ）の場合、ウェハーに付した
フォトレジストに所定のパターン形成を行なっための露
光の時、焦点（ＩＦＯσＵＳ）を合わすためにウェハー
を露光装置のウェハーディスクに３本または４本あるツ
メ１１に押えつけて行なっていた。第４図に６本ツメ１
１の場合のツメによる未露光部１３とウニ・・−１の位
置関係を示した。このツメ１１０所は、金属で出来てい
てば光される事がなくネガタイプフォトレジストの場合
は現像すると、ツメ１１が当る部分はネガタイプフォト
レジストはなくなるわけである。この場合、工程がパッ
シベーション膜のエツチングとすると第５図のように、
ウェハー上に形成された半導体装置１４のパターンの一
部１５の上のパッシベーション膜を除去する事になり、
このエツチングによって半導体装置１４の金属配線層パ
ターンの下にある、絶縁膜をある程度のオーバーエツチ
ングすることによってエツチングすることになり、前記
金属配線層パターンが短かい場合は、ウニ・・−より剥
離し４１を性異物が発生する事になる。この発生した前
記導電性異物がウェハーに付着すると、金属配線層の上
ならば金属配線層のパターンの短絡となり半導体装置の
不良の原因となる。また、短絡とならなくとも、ウェハ
ー上の突起物としてフォト・リングラフィ工程における
フォトレジストの膜厚にむらを生じさせ正常なフォトリ
ングラフィ工程のパターン形成を阻害しやはり形成され
たパターンの短絡や断線等のパターン欠陥をもたらし、
歩留りの低下を引き起こすものである。However, the photoresist applied to the wafer is not a positive type photoresist (in the case of a negative type photoresist), and furthermore, it is not necessary to expose the entire periphery of the wafer (sometimes only a portion is sufficient, and conventional techniques Appropriate processing cannot be performed.As shown in Fig. 5, in the case of a 1:1 reflection projection type exposure system f (for example, Canon mirror projection aligner MPA-600FA), a predetermined pattern is applied to the photoresist attached to the wafer. During exposure for formation, the wafer was pressed against three or four claws 11 on the wafer disk of the exposure device in order to adjust the focus (IFOσUS).
The positional relationship between the unexposed area 13 due to the claw and the sea urchin...-1 in case 1 is shown. If this claw 110 is made of metal, it will not be exposed to light, and if it is a negative type photoresist, when it is developed, the negative type photoresist will disappear from the area where the claw 11 touches. In this case, if the process is etching of the passivation film, as shown in Figure 5,
The passivation film on a part 15 of the pattern of the semiconductor device 14 formed on the wafer is removed.
This etching over-etches the insulating film under the metal wiring layer pattern of the semiconductor device 14 to a certain extent, and if the metal wiring layer pattern is short, it may be peeled off by sea urchins. 41, a foreign body will occur. If the generated conductive foreign matter adheres to the wafer, if it is on the metal wiring layer, it will short-circuit the pattern of the metal wiring layer, causing defects in the semiconductor device. In addition, even if a short circuit does not occur, protrusions on the wafer can cause unevenness in the thickness of the photoresist in the photo phosphorography process, inhibiting normal pattern formation in the photo phosphorography process, and causing short circuits in the formed pattern. This results in pattern defects such as wire breaks,
This causes a decrease in yield.
また、前記ツメによる未露光部１５の部分はウェハーの
周辺部から５〜６ｒｒｒｍと長い物であり、従来の技術
によってウニ／・−の周辺部を５〜６脳選択的に露光し
てフォトレジストを除去すると、特に４インチ（１００
ｏ＋ｍ）ウェハーの場合は、半導体装置を形成できる領
域が８８ｍｍから９０１ｓという事になり、ウェハー１
枚の中に形成できる半導体装置の数が減少してしまいと
ても許用できるものではない。In addition, the unexposed part 15 due to the claw is long, 5 to 6 rrrm from the periphery of the wafer, and the periphery of the sea urchin/. Removal of 4 inches (100
o+m) wafer, the area in which a semiconductor device can be formed is from 88 mm to 901 seconds, so wafer 1
This reduces the number of semiconductor devices that can be formed in a single sheet, and is therefore not acceptable.
本発明はこのような従来の技術の問題点を）・イ決する
もので、その目的は半導体装置のウェハーからの取れ数
を減らさずに導電性異物による歩留り低下を防止する技
術を提供することにある。The present invention solves these problems of the conventional technology, and its purpose is to provide a technology that prevents a decrease in yield due to conductive foreign matter without reducing the number of semiconductor devices that can be removed from a wafer. be.
［課頭を解決するための手段］
本発明の半導体装置の製造方法は、ウェハーの周辺部の
一部のみ選択的に露光する事により前述の問題を解決す
る。[Means for Solving the Problem] The method for manufacturing a semiconductor device of the present invention solves the above-mentioned problem by selectively exposing only a portion of the periphery of the wafer.
［実施例］
第１図は本発明の実施例の構成図である。回転している
ウェハー１のファセット部６を７アセノト検出部４で検
出しその信号を受けたコントロール部９がクエ・・−１
の１７＋（辺部２の所定の位置が来たらシャッター６を
開く信号を送ってシャッター６を開として露光部５より
ＵＶ光が照射され、ウェハー１の全面に付したネガタイ
プフォトレジストのウェハー１の周辺部２の所定の６ケ
所が露光され現像後においてもネガタイプフォトレジス
トは１：１反射投影型露光装置（キャノンｉＪ！ＩＭ
Ｐ Ａ（５００１ＦＡ）のツメの当たる、本来ならＵＶ
光照射されずに現像後ネガタイプフォトレジストが残ら
なかった所が残るようになった。第２図にウェハー周辺
部のツメによる未露光部と露光部の関係を示した。８閣
角の露光部５でツメによる未露光部１５０所のみを露光
した露光領域１６である。[Embodiment] FIG. 1 is a block diagram of an embodiment of the present invention. The facet part 6 of the rotating wafer 1 is detected by the 7acenoto detection part 4, and the control part 9 receives the signal.
17+ (When the predetermined position of the side part 2 is reached, a signal is sent to open the shutter 6, the shutter 6 is opened, UV light is irradiated from the exposure part 5, and the negative type photoresist applied to the entire surface of the wafer 1 is exposed. Even after six predetermined locations in the peripheral area 2 are exposed and developed, the negative type photoresist is still exposed using a 1:1 reflection projection type exposure device (Canon iJ! IM).
The claw of P A (5001FA) should be UV.
After development, areas where no negative type photoresist remained remained without being irradiated with light. FIG. 2 shows the relationship between the unexposed area and the exposed area due to the tabs at the periphery of the wafer. This is an exposure area 16 in which only 150 unexposed areas due to claws are exposed in the exposure area 5 of 8 squares.
破線で示した所が従来の技術で行なったポジタイプフォ
トレジストのウェハーの周辺部の３ｗＩＲの選択的露光
により形成されたパターン形成のない領域である。半導
体装置１４は、この破線の所まで形成されているが、本
実施例による露光の露光領域１６では、ツメによる未露
光部の左右に若干の影Ｕを与えるのみで、半導体装置の
取れ数もウェハーの周辺部を５〜６間選択的１ｃａ光す
る場合に比べれは微減少である。また、もう１つの目的
もウェハーのツメ５１が当たる所を露光する事によりツ
メの部分にもネガタイプフォトレジストを形成テキ、パ
ッシベーション膜のエツチング時に発生する金属配線層
パターンの剥離による導電性異物も防止する事ができた
。The area indicated by the broken line is an area in which no pattern is formed, which is formed by selective exposure of 3wIR at the periphery of a positive type photoresist wafer using the conventional technique. The semiconductor device 14 is formed up to this broken line, but in the exposure area 16 of the exposure according to this embodiment, only a slight shadow U is cast on the left and right sides of the unexposed area by the claw, and the number of semiconductor devices removed is also reduced. This is a slight decrease compared to the case where 1 ca light is selectively applied to the periphery of the wafer for 5 to 6 days. Another purpose is to form a negative type photoresist on the wafer by exposing the part of the wafer where the claw 51 hits, and also to prevent conductive foreign matter caused by peeling off of the metal wiring layer pattern that occurs during etching of the passivation film. I was able to do it.
［発明の効果］
以上述べたように本発明によれば、ウェハーの周辺部の
一部のみを選択的に露光することにより導電性異物の発
生の防止を可能にし、歩留勺の低下もな（なる。また、
半導体装置の取れ数の減少も抑止するという効果を有す
るものである。また、本発明の効果をウェハーの周辺部
の一部の特に１：１反射投影型露光装置のツメの所を露
光する事について述べたが、実施例のよ５に１つの露光
部ではなくツメの数だけ露光部を用いてツメの位置に当
たる所を一度に露光する事によりスループットの向上を
計れるという多重露光部に応用できるものであり、露光
部の数や方式、形式、形状により本発明の効果は影響を
受けるものではない。[Effects of the Invention] As described above, according to the present invention, by selectively exposing only a part of the periphery of the wafer, it is possible to prevent the generation of conductive foreign matter, and there is no decrease in yield. (Naru.Also,
This also has the effect of suppressing a decrease in the number of semiconductor devices produced. In addition, although the effect of the present invention has been described with respect to exposing a part of the periphery of the wafer, particularly the tab of a 1:1 reflection projection type exposure device, the effect of the present invention has been described with respect to exposing a part of the periphery of the wafer, especially the tab of a 1:1 reflection projection type exposure device. The present invention can be applied to a multiple exposure section where throughput can be improved by exposing the area corresponding to the claw position at once using the number of exposure sections. Effects are unaffected.
笛１図は本発明の実施例の構成図。
第２図は本発明の実施例のウェハー周辺部のツメによる
未しに元部と露光部の関係の概要図。
第３図は１：１反射投影型パ光装置のツメによる未ｄ元
部とウェハーの関係のａ！Ｅｆｆ図。
第４図は１：１反射投影型送光装置のツｈのウェハー内
配置側口。
第５図はウェハーの周辺部の概要図。
１………ウエハー
２・・・・・・・・・周辺部
６・・・・・・・・・ファセット部
４・・・・・・・・・ファセット検出部５・・・・・・
・・・露光部
６・・・・・・・・・シャッター
７・・・・・・・・・ＵＶ光源
８・・・・・・・・・石英７アイバー
９・・・・・・・・・コントロール部
１０ ・・・・・・
１１・・・・・・ツメ（断面）
１２・・・・・ウェハーチャック
１５・・・・・・ツメによる未露光部
１４・・・・・・半導体装置
１５・・・・・・パッシベーション膜欠落部１６・・・
・・・露光領域Figure 1 is a configuration diagram of an embodiment of the present invention. FIG. 2 is a schematic diagram of the relationship between the base portion and the exposed portion using the tabs at the periphery of the wafer according to the embodiment of the present invention. Figure 3 shows the relationship between the undimensioned part and the wafer due to the claw of the 1:1 reflective projection type optical device. Eff diagram. Figure 4 shows the side opening of the 1:1 reflective projection type light transmitting device located inside the wafer. FIG. 5 is a schematic diagram of the periphery of the wafer. 1...Wafer 2...Peripheral section 6...Facet section 4...Facet detection section 5...
...Exposure section 6...Shutter 7...UV light source 8...Quartz 7 Eye bar 9...・Control part 10...11...Claw (cross section) 12...Wafer chuck 15...Unexposed area 14 due to the claw...Semiconductor device 15...Passivation film missing part 16...
...Exposure area
Claims (1)
ジストを付した前記ウェハーの周辺部を選択的に露光す
る工程において、前記露光をウェハーの周辺部の一部の
み行なう事を特徴とする半導体装置の製造方法。(1) A semiconductor device characterized in that, in the step of selectively exposing the periphery of the wafer on which a photoresist is applied to the entire surface of the wafer on which a pattern is to be formed, the exposure is performed only on a part of the periphery of the wafer. manufacturing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20902388A JPH0258213A (en) | 1988-08-23 | 1988-08-23 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20902388A JPH0258213A (en) | 1988-08-23 | 1988-08-23 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0258213A true JPH0258213A (en) | 1990-02-27 |
Family
ID=16565988
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20902388A Pending JPH0258213A (en) | 1988-08-23 | 1988-08-23 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0258213A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62278705A (en) * | 1986-05-26 | 1987-12-03 | 多木化学株式会社 | Transparent conducting material |
| JPH02288221A (en) * | 1989-04-27 | 1990-11-28 | Nec Kyushu Ltd | Peripheral exposure device for semiconductor substrate |
| US7553474B2 (en) | 2004-08-17 | 2009-06-30 | Nissan Chemical Industries, Ltd. | Method for producing metal oxide sol |
-
1988
- 1988-08-23 JP JP20902388A patent/JPH0258213A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62278705A (en) * | 1986-05-26 | 1987-12-03 | 多木化学株式会社 | Transparent conducting material |
| JPH0586605B2 (en) * | 1986-05-26 | 1993-12-13 | Taki Chemical | |
| JPH02288221A (en) * | 1989-04-27 | 1990-11-28 | Nec Kyushu Ltd | Peripheral exposure device for semiconductor substrate |
| US7553474B2 (en) | 2004-08-17 | 2009-06-30 | Nissan Chemical Industries, Ltd. | Method for producing metal oxide sol |
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