JPH0247856B2 - - Google Patents

Info

Publication number
JPH0247856B2
JPH0247856B2 JP57019641A JP1964182A JPH0247856B2 JP H0247856 B2 JPH0247856 B2 JP H0247856B2 JP 57019641 A JP57019641 A JP 57019641A JP 1964182 A JP1964182 A JP 1964182A JP H0247856 B2 JPH0247856 B2 JP H0247856B2
Authority
JP
Japan
Prior art keywords
silicon carbide
sintered body
thermal conductivity
powder
beryllium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57019641A
Other languages
Japanese (ja)
Other versions
JPS57164540A (en
Inventor
Yukio Takeda
Kosuke Nakamura
Yasuo Matsushita
Tokio Oogoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57019641A priority Critical patent/JPS57164540A/en
Publication of JPS57164540A publication Critical patent/JPS57164540A/en
Publication of JPH0247856B2 publication Critical patent/JPH0247856B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29075Plural core members
    • H01L2224/2908Plural core members being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor

Abstract

PURPOSE:To improve thermal stability by mounting circuit elements on a substrate made of sintered insulation material which has the expansion coefficient similar to silicon and the specified thermal conductivity at room temperature. CONSTITUTION:Circuit elements are mounted on a substrate made of electrical insulation material which has the thermal expansion coefficient similar to silicon and the thermal conductivity not less than 0.25Cal/cm.sec. deg.C. In such case, beryllium oxide powder is added to silicon carbide powder and mixed, and the mixture is formed by compression. The formed body is then sintered in a graphite die. The sintered body of high density, high thermal conductivity, high electrical resistance and low thermal expansion coefficient can be obtained when the content of beryllium to the silicon carbide powder is 0.1-3.5wt%, AnSi-element 11 is directly soldered to the substrate 15 made of the sintered silicon carbide which contains 0.5wt% of beryllium to compose a semiconductor powder module, so that an electric device of very simply composition can be obtained.

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は、新規な半導体装置に係り、特に高熱
伝導性電気絶縁性を有する基板を用いた半導体装
置に関する。 近年、半導体工業の進歩は目ざましく、大規模
集積回路等に使用される絶縁基板には半導体チツ
プ等の回路構成要素が増々高密度に搭載されるよ
うになつてきた。さらに大容量、小型化に対する
要請も大きくなり、使用する絶縁基板は熱放散性
の良い材料が要求されるようになつてきた。従
来、絶縁基板としてアルミナ焼結体が使用されて
いる。アルミナ基板は熱放散性があまり良くない
のでこうした目的を達成するためには、より熱放
散の大きい絶縁基板の開発が要請されるようにな
つてきた。絶縁基板材料としては、 (1) 電気絶縁性が大きいこと、 (2) 熱伝導率が大きいこと、 (3) 熱膨脹係数がシリコンの熱膨脹係数に近いこ
と、 (4) 機械的強度が大きいこと、 などが要求される。 炭化ケイ素焼結体は、その熱膨脹係数が約4×
10-6/℃で、アルミナのそれの約8×10-6/℃に
比べて小さく、シリコンの熱膨脹係数約3.3×
10-6/℃に近い。また曲げ強さ50Kg/mm2以上を有
し、アルミナのそれの約20Kg/mm2に比べると極め
て高強度であることが知られている。更に熱伝導
率は0.1〜0.3cal/cm・sec・℃でアルミナの約3
倍以上の値を有する。これらの点から、炭化ケイ
素は電気絶縁性の大きいものが開発されると、大
規模集積回路などの絶縁基板用材料として極めて
有用である。 炭化ケイ素は炭素とケイ素から成る−族化
合物半導体である。このため、電気絶縁性を有す
る高密度焼結体を得ることは困難と考えられてお
り、事実、こうしたものはこれまで見当らなかつ
た。 炭化ケイ素は共有結合性の大きい化合物である
ため、硬く強靭で、1500℃以上の高温でも耐酸化
性、耐食性に優れた安定な物質であることは良く
知られているが、この強い共有結合性のため高密
度焼結が困難な材料であつた。 そこで高密度炭化ケイ素焼結体を得るために種
種の焼結助剤が用いられてきた。 例えば、アルミニウムや鉄を添加してホツトプ
レスすることにより、炭化ケイ素の理論密度の98
%の密度を有する焼結体が得られることが知られ
ている〔Alliegro et al.J.Am.Ceram.Soc.,39,
386〜389(1956)〕。また、ホウ素と炭素を用いて、
ホツトプレス法または無加圧法で高密度の焼結体
を得る方法が知られている(特開昭49−99308
号)。これらはいずれもガスタービン用部品等の
耐熱構造材を提供することを目的とするものであ
る。これらの焼結助剤を用いた炭化ケイ素焼結体
においては焼結体の電気抵抗率の値はいずれも
100Ω・cm以下で、電気絶縁材料としては使用す
ることができない。 また、炭化ケイ素にBeを添加して焼結したも
のが、特開昭53−67711号、特開昭55−32796号公
報およびその対応米殿特許第4172109号に示され
ているが、これは原料の炭化ケイ素粉末中に0.5
〜5重量%の過剰炭素を含むものを用いて焼結し
た高強度材料に関するもので、とくにこうした過
剰炭素はその焼結体の電気絶縁性を著しく損い電
気絶縁材料としては用いることができない。 本発明の目的は放熱性の大きい半導体装置を提
供するにある。 本発明は、ベリリウムを0.1〜3.5重量%含み、
残部が実質的に炭化ケイ素である電気絶縁性焼結
体からなる基体の表面上に、半導体素子が金属に
よつて接合され、前記半導体素子接合面の前記基
体上に配線層が形成され、前記半導体素子と前記
配線層とは、金属線によつて電気的に接続されて
いることを特徴とする半導体装置にある。 また、焼結体はAl0.1重量%以下、B0.1重量%
以下、遊離炭素0.4重量%以下であることが好ま
しい。 また、焼結体はα型炭化ケイ素を主成分とする
のが好ましい。 本発明の、0.1〜3.5重量%のベリリウムを含
み、アルミニウム含有量0.1重量%以下、ホウ素
含有量0.1重量%以下である焼結体からなる基体
は室温における熱伝導率0.4cal/cm・sec・℃以
上、電気抵抗率107Ω・cm以上を有し、理論密度
の90%以上の密度が得られるので、放熱性の高い
半導体装置が得られる。 また、本発明の半導体装置は、遊離炭素0.4重
量%以下の炭化ケイ素粉末にBeOを添加した微
粉末を加工成形し、非酸化性雰囲気中、1850℃〜
2500℃でホツトプレスして焼結体中のベリリウム
が0.1〜3.5重量%で、アルミニウム0.1重量%以
下、ホウ素0.1重量%以下で、室温において、熱
伝導率0.4cal/cm・sec・℃以上、電気抵抗率107
Ω・cm以上で、かつ理論密度の90%以上に焼結さ
れた基体に半導体素子を載置するのが好ましい。 室温の電気抵抗率を107Ω・cm以上にするには
0.1以上とすることが好ましく、シリコン半導体
素子を載置した装置では、焼結体の熱膨脹係数を
4×10-6℃以下にするには3.5重量%以下のベリ
リウム量とすることが好ましい。 ベリリウムはBeOとして添加するのが良い。
BeOとしては約0.5〜14重量%添加することによ
り焼結体中に0.1〜3.5重量%含ませることができ
る。但し焼結時の雰囲気、温度によつて多少変
る。 また、本発明において、炭化ケイ素粉末中に
0.4重量%を越える遊離炭素を含まないようにす
るのが好ましい。0.4重量%を越える遊離炭素は
熱伝導率、特に電気抵抗率を著しく低下させる。 本発明において上記酸化ベリリウムおよび炭化
ケイ素粉末は、平均10μm、好ましくは2μm以下
の粒径を有する微粉末を用い、これをホツトプレ
スすることにより焼結するのがよい。焼結体中の
アルミニウムまたはホウ素は両者とも0.1重量%
以下が好ましい。アルミニウムが上記より多く含
まれると焼結体の電気抵抗率が107Ω・cmより小
さくなり好ましくない。また、ホウ素が上記より
多く含まれると熱伝導率が0.4cal/cm・sec・℃
より小さくなつてしまう。 なお、熱伝導率が0.5cal/cm・sec・℃以上の
ものを得たいときは、炭化ケイ素はその主成分が
α型SiCである粉末を用いて焼結するのが良い。 酸化ベリリウムを含有する炭化ケイ素粉末の焼
結は非酸化性雰囲気で行うのが良い。酸化性雰囲
気では炭化ケイ素粉末表面が酸化し高密度な焼結
体が得られにくい。 好ましい焼結温度は1850〜2500℃、更に好まし
くは1900〜2300℃である。高密度な焼結体を得る
には1850℃以上、炭化ケイ素の昇華及び過焼成を
防止し、緻密な磁器を得るには2500℃以下がよ
い。焼結時に試料を高圧で加圧するホツトプレス
法で加圧する荷重は使用するダイスの材質によつ
て決められ、黒鉛製では約700Kg/cm2まで圧力を
加えることができる。 しかし、一般にはこうした大きな圧力を加えな
くとも高密度な焼結体を得ることができる。通常
の圧力は100〜300Kg/cm2である。またサブミクロ
ンの粒径を有する炭化ケイ素粉末を使用すること
により、加圧しないでも緻密(理論値90%)な焼
結体を得ることができる。 実験例 1 平均粒径2μmの炭化ケイ素粉末に粒径10μm以
下の酸化ベリリウム粉末を0.1〜20重量%添加し
混合した、次いで混合粉末を室温で1000Kg/cm2
圧力を加えて成形体とした。成形体は1.60〜1.67
g/cm3の密度(炭化ケイ素の理論密度に対し50〜
52%の相対密度)を有する。次に成形体を黒鉛製
のダイスに入れ、減圧度1×10-5〜1×10-3torr
中でホツトプレス法により焼結した。焼結圧力は
300Kg/cm2で、加熱は室温から2000℃まで約2hで
昇温し、2000℃で1h保持したのち加熱電源を切
つて放冷した。圧力は温度が1500℃以下になつて
から解除した。上記によつて製造した炭化ケイ素
焼結体の特性とベリリウムの含有量との関係を第
1図〜第4図に示す。 第1図〜第4図の結果より、炭化ケイ素粉末に
含有するベリリウムの量が0.1〜3.5重量%の範囲
の場合に高密度で高熱伝導率、高電気抵抗率、低
熱膨脹係数(4×10-6/℃以下)を併せ有する焼
結体が得られる。 実験例 2 炭化ケイ素粉末に対し酸化ベリリウム粉末を4
重量%添加した混合粉末を実験例1と同様にして
ホツトプレス法により焼結体を得た。このときの
焼結体に含まれるベリリウムの含有量は約1重量
%であつた。本実験例においてはホツトプレス条
件を変えて焼結体を作製した。第1表は得られた
焼結体の特性とホツトプレス条件との関係を示す
もので、温度1850〜2500℃、圧力100Kg/cm2以上
で焼結することにより、理論密度の90%以上、
0.4cal/cm・sec・℃以上の熱伝導率、1011Ω・cm
以上の電気抵抗率および3.3×10-6/℃の熱膨脹
係数の焼結体を得た。 第7図は第1図、第2図及び第1表から求めた
熱伝導率と相対密度との関係を示す線図である。
図に示す如く、90%以上の相対密度で急激に熱伝
導率が向上する。図中の数字はBeの含有量であ
る。
The present invention relates to a novel semiconductor device, and particularly to a semiconductor device using a substrate having high thermal conductivity and electrical insulation properties. BACKGROUND OF THE INVENTION In recent years, the semiconductor industry has made remarkable progress, and circuit components such as semiconductor chips have been increasingly mounted on insulating substrates used in large-scale integrated circuits at an increasingly high density. Furthermore, there is a growing demand for larger capacity and smaller size, and the insulating substrate used is now required to be made of a material with good heat dissipation properties. Conventionally, an alumina sintered body has been used as an insulating substrate. Since alumina substrates do not have very good heat dissipation properties, in order to achieve these objectives, there has been a demand for the development of insulating substrates with higher heat dissipation. As an insulating substrate material, it has (1) high electrical insulation, (2) high thermal conductivity, (3) a coefficient of thermal expansion close to that of silicon, (4) high mechanical strength, etc. are required. The silicon carbide sintered body has a coefficient of thermal expansion of approximately 4×
10 -6 /℃, which is smaller than that of alumina, which is about 8×10 -6 /℃, and the coefficient of thermal expansion of silicon, which is about 3.3×
Close to 10 -6 /℃. It is also known to have a bending strength of 50 kg/mm 2 or more, which is extremely high compared to that of alumina, which is approximately 20 kg/mm 2 . Furthermore, the thermal conductivity is 0.1 to 0.3 cal/cm・sec・℃, which is about 3 that of alumina.
It has more than double the value. From these points, if silicon carbide with high electrical insulation properties is developed, it will be extremely useful as a material for insulating substrates such as large-scale integrated circuits. Silicon carbide is a - group compound semiconductor consisting of carbon and silicon. For this reason, it is considered difficult to obtain a high-density sintered body having electrical insulation properties, and in fact, such a body has not been found to date. Because silicon carbide is a compound with strong covalent bonds, it is well known that it is hard and strong, and is a stable substance with excellent oxidation and corrosion resistance even at high temperatures of 1500°C or higher. Therefore, it was a difficult material to sinter at high density. Therefore, various sintering aids have been used to obtain high-density silicon carbide sintered bodies. For example, by adding aluminum or iron and hot pressing, silicon carbide has a theoretical density of 98%.
% [Alliegro et al. J. Am. Ceram. Soc., 39,
386-389 (1956)]. Also, using boron and carbon,
A method of obtaining a high-density sintered body using a hot press method or a non-pressure method is known (Japanese Unexamined Patent Publication No. 49-99308
issue). All of these are intended to provide heat-resistant structural materials such as gas turbine parts. In silicon carbide sintered bodies using these sintering aids, the electric resistivity values of the sintered bodies are both
If it is less than 100Ω・cm, it cannot be used as an electrical insulating material. Furthermore, silicon carbide with Be added and sintered is shown in JP-A-53-67711, JP-A-55-32796, and its corresponding Yonedono Patent No. 4172109; 0.5 in the raw material silicon carbide powder
The present invention relates to a high-strength material sintered using a material containing up to 5% by weight of excess carbon; in particular, such excess carbon significantly impairs the electrical insulation properties of the sintered body, making it unsuitable for use as an electrically insulating material. An object of the present invention is to provide a semiconductor device with high heat dissipation. The present invention contains 0.1 to 3.5% by weight of beryllium,
A semiconductor element is bonded by metal onto the surface of a base body made of an electrically insulating sintered body, the remainder of which is substantially silicon carbide, and a wiring layer is formed on the base body on the semiconductor element bonding surface; The semiconductor device is characterized in that the semiconductor element and the wiring layer are electrically connected by a metal wire. In addition, the sintered body has Al0.1% by weight or less and B0.1% by weight.
Hereinafter, the free carbon content is preferably 0.4% by weight or less. Moreover, it is preferable that the sintered body has α-type silicon carbide as a main component. The substrate of the present invention, which is made of a sintered body containing 0.1 to 3.5% by weight of beryllium, having an aluminum content of 0.1% by weight or less, and a boron content of 0.1% by weight or less, has a thermal conductivity of 0.4 cal/cm・sec・at room temperature. ℃ or more, has an electrical resistivity of 10 7 Ω·cm or more, and has a density of 90% or more of the theoretical density, so a semiconductor device with high heat dissipation can be obtained. In addition, the semiconductor device of the present invention is produced by processing and molding a fine powder obtained by adding BeO to silicon carbide powder containing 0.4% by weight or less of free carbon, and processing and molding it at 1850°C to
When hot pressed at 2500℃, the beryllium in the sintered body is 0.1 to 3.5% by weight, aluminum is 0.1% by weight or less, boron is 0.1% by weight or less, thermal conductivity is 0.4cal/cm・sec・℃ or more at room temperature, and electrical conductivity is 0.1 to 3.5% by weight. Resistivity 10 7
It is preferable to place the semiconductor element on a base body sintered to a density of Ω·cm or more and 90% or more of the theoretical density. To increase the electrical resistivity at room temperature to 10 7 Ω・cm or more
The amount of beryllium is preferably 0.1 or more, and in order to make the thermal expansion coefficient of the sintered body 4×10 -6 ° C. or less in a device in which a silicon semiconductor element is mounted, the amount of beryllium is preferably 3.5% by weight or less. Beryllium is preferably added as BeO.
By adding about 0.5 to 14% by weight of BeO, it can be contained in the sintered body in an amount of 0.1 to 3.5% by weight. However, it varies somewhat depending on the atmosphere and temperature during sintering. In addition, in the present invention, silicon carbide powder contains
Preferably, it does not contain more than 0.4% by weight of free carbon. More than 0.4% by weight of free carbon significantly reduces thermal conductivity, especially electrical resistivity. In the present invention, the beryllium oxide and silicon carbide powders are preferably fine powders having an average particle size of 10 μm or less, preferably 2 μm or less, and are sintered by hot pressing. Aluminum or boron in the sintered body is both 0.1% by weight
The following are preferred. If aluminum is contained in a larger amount than above, the electrical resistivity of the sintered body becomes less than 10 7 Ω·cm, which is not preferable. Additionally, if more boron is contained than above, the thermal conductivity will be 0.4 cal/cm・sec・℃
It becomes smaller. In addition, when it is desired to obtain a thermal conductivity of 0.5 cal/cm·sec·°C or more, it is preferable to sinter silicon carbide using powder whose main component is α-type SiC. Sintering of silicon carbide powder containing beryllium oxide is preferably carried out in a non-oxidizing atmosphere. In an oxidizing atmosphere, the surface of silicon carbide powder is oxidized, making it difficult to obtain a high-density sintered body. The preferred sintering temperature is 1850-2500°C, more preferably 1900-2300°C. The temperature is preferably 1850°C or higher to obtain a high-density sintered body, and 2500°C or lower to prevent sublimation and over-firing of silicon carbide, and to obtain dense porcelain. The load applied in the hot press method, in which the sample is pressurized under high pressure during sintering, is determined by the material of the die used, and for graphite dies, pressures of up to approximately 700 kg/cm 2 can be applied. However, in general, a high-density sintered body can be obtained without applying such a large pressure. Typical pressure is 100-300Kg/ cm2 . Furthermore, by using silicon carbide powder having a submicron particle size, a dense sintered body (90% of the theoretical value) can be obtained without pressurization. Experimental Example 1 0.1 to 20% by weight of beryllium oxide powder with a particle size of 10 μm or less was added to silicon carbide powder with an average particle size of 2 μm and mixed.Then, the mixed powder was formed into a compact by applying a pressure of 1000 Kg/cm 2 at room temperature. . Molded body is 1.60~1.67
Density of g/ cm3 (50 to the theoretical density of silicon carbide)
52% relative density). Next, the compact is placed in a graphite die and the degree of vacuum is 1×10 -5 to 1×10 -3 torr.
It was sintered in a hot press method. The sintering pressure is
Heating was carried out at 300Kg/cm 2 , and the temperature was raised from room temperature to 2000°C in about 2 hours, and after being maintained at 2000°C for 1 hour, the heating power was turned off and allowed to cool. The pressure was released after the temperature dropped to below 1500°C. The relationship between the characteristics of the silicon carbide sintered body produced as described above and the beryllium content is shown in FIGS. 1 to 4. From the results shown in Figures 1 to 4, when the amount of beryllium contained in silicon carbide powder is in the range of 0.1 to 3.5% by weight, it has high density, high thermal conductivity, high electrical resistivity, and low coefficient of thermal expansion (4 × 10 -6 /℃ or less) can be obtained. Experimental example 2 Addition of beryllium oxide powder to silicon carbide powder
A sintered body was obtained using the hot pressing method using the mixed powder added in an amount of % by weight in the same manner as in Experimental Example 1. The content of beryllium contained in the sintered body at this time was about 1% by weight. In this experimental example, sintered bodies were produced by changing the hot pressing conditions. Table 1 shows the relationship between the properties of the obtained sintered body and the hot pressing conditions. By sintering at a temperature of 1850 to 2500°C and a pressure of 100 kg/cm 2 or more, 90% or more of the theoretical density,
Thermal conductivity of 0.4cal/cm・sec・℃ or higher, 10 11 Ω・cm
A sintered body with an electrical resistivity of 3.3×10 −6 /°C and a coefficient of thermal expansion of 3.3×10 −6 /°C was obtained. FIG. 7 is a diagram showing the relationship between thermal conductivity and relative density determined from FIGS. 1, 2, and Table 1.
As shown in the figure, the thermal conductivity increases rapidly at a relative density of 90% or more. The numbers in the figure are the Be content.

【表】【table】

【表】 実験例 3 炭化ケイ素の焼結体は実験例1と同様に製造し
た。本実験例においては酸化ベリリウムの添加量
を3重量%とし、焼結時の雰囲気をアルゴンガ
ス、ヘリウムガスおよび窒素ガスを使用した。得
られた焼結体中のベリリウムの含有量は0.9重量
%であつた。その特性は実験例1のベリリウム含
有量1重量%の焼結体とほぼ同じであつた。 実験例 4 平均粒径が0.2〜20μmの炭化ケイ素粉末に酸化
ベリリウムを2重量%添加して混合したのち、実
験例1と同様にしてホツトプレス法により焼結体
を製造した。第2表は炭化ケイ素原料粉末の平均
粒径と得られた焼結体の相対密度の関係である。
焼結体は炭化ケイ素原料粉末の平均粒径が10μm
以下であれば相対密度95%以下に緻密化する。ま
た、相対密度が95%以上に緻密化した焼結体は実
験例1のベリリウム含有量0.4重量%の場合と同
様な特性を示した。炭化ケイ素原料粉末の平均粒
径が10μmより大きく、緻密化が十分進行しなか
つた焼結体では熱伝導率が0.2cal/cm・sec・℃
以下、機械的強度が10Kg/mm2以下と小さい値であ
つた。
[Table] Experimental Example 3 A sintered body of silicon carbide was produced in the same manner as in Experimental Example 1. In this experimental example, the amount of beryllium oxide added was 3% by weight, and the atmosphere during sintering was argon gas, helium gas, and nitrogen gas. The content of beryllium in the obtained sintered body was 0.9% by weight. Its properties were almost the same as those of the sintered body of Experimental Example 1 with a beryllium content of 1% by weight. Experimental Example 4 After adding and mixing 2% by weight of beryllium oxide to silicon carbide powder having an average particle size of 0.2 to 20 μm, a sintered body was produced by hot pressing in the same manner as in Experimental Example 1. Table 2 shows the relationship between the average particle size of the silicon carbide raw material powder and the relative density of the obtained sintered body.
The average particle size of the silicon carbide raw material powder in the sintered body is 10 μm.
If it is below, it will be densified to a relative density of 95% or less. Furthermore, the sintered body whose relative density was densified to 95% or more showed the same characteristics as in Experimental Example 1 with a beryllium content of 0.4% by weight. In a sintered body in which the average particle size of the silicon carbide raw material powder is larger than 10 μm and densification has not progressed sufficiently, the thermal conductivity is 0.2 cal/cm・sec・℃
Below, the mechanical strength was a small value of 10 Kg/mm 2 or less.

【表】 実験例 5 実験例1と同じ炭化ケイ素粉末に酸化ベリリウ
ム粉末を2重量%添加し、さらに不純物としてカ
ーボンブラツク(粒径0.1μm以下の微粉末)を炭
化ケイ素に対して0.3〜1重量%添加して混合粉
末とした。混合粉末より実験例1に記載したもの
と同様にしてホツトプレス法により焼結体を得
た。第3表はカーボンブラツクの添加量と該焼結
体の特性との関係を示し、カーボンブラツクの添
加量が0.5重量%になると電気抵抗率106Ω・cmと
なる。
[Table] Experimental Example 5 2% by weight of beryllium oxide powder was added to the same silicon carbide powder as in Experimental Example 1, and carbon black (fine powder with a particle size of 0.1 μm or less) was added as an impurity by 0.3 to 1 weight per silicon carbide. % was added to form a mixed powder. A sintered body was obtained from the mixed powder by hot pressing in the same manner as described in Experimental Example 1. Table 3 shows the relationship between the amount of carbon black added and the properties of the sintered body. When the amount of carbon black added is 0.5% by weight, the electrical resistivity becomes 10 6 Ω·cm.

【表】 熱伝導率、電気抵抗率は室温で測定
熱膨脹係数は室温〜300℃の平均値
実験例 6 実験例5と同様にして不純物として添加したカ
ーボンブラツクに換えて窒化アルミニウム粉末
(粒径2μm以下の微粉末)を炭化ケイ素に添加し
て混合粉末とした。第4表にアルミニウムの含有
量と焼結体の特性との関係を示し、アルミニウム
の含有量が0.1重量%より多くなると電気抵抗率
が著しく小さくなる。
[Table] Thermal conductivity and electrical resistivity are measured at room temperature.
Thermal expansion coefficient is the average value from room temperature to 300℃ Experimental example 6 Similar to Experimental example 5, aluminum nitride powder (fine powder with a particle size of 2 μm or less) was added to silicon carbide instead of carbon black added as an impurity to make a mixed powder. And so. Table 4 shows the relationship between the aluminum content and the properties of the sintered body. When the aluminum content exceeds 0.1% by weight, the electrical resistivity becomes significantly small.

【表】 熱伝導率、電気抵抗率は室温で測定
熱膨脹係数は室温〜300℃の平均値
実験例 7 実験例5と同様にして不純物として添加したカ
ーボンブラツクに換えて窒化ホウ素粉末(粒径
5μm以下の微粉末)を炭化ケイ素に添加して混
合粉末とした。第5表はホウ素の含有量と該焼結
体の特性との関係を示し、ホウ素の含有量が0.1
重量%より多くなると熱伝導率が著しく小さくな
る。
[Table] Thermal conductivity and electrical resistivity are measured at room temperature. Thermal expansion coefficient is the average value between room temperature and 300℃. Experimental Example 7 In the same manner as in Experimental Example 5, boron nitride powder (particle size
A fine powder of 5 μm or less) was added to silicon carbide to form a mixed powder. Table 5 shows the relationship between the boron content and the properties of the sintered body.
When the amount exceeds % by weight, the thermal conductivity decreases significantly.

【表】 熱伝導率、電気抵抗率は室温で測定
熱膨脹係数は室温〜300℃の平均値
実験例 8 炭化ケイ素粉末は高周波熱プラズマ中で合成し
た粉末を使用した。該粉末は200Å〜0.2μmの粉
径を有する極めて微細な粉末である。該粉末の平
均粒径が1μmである酸化ベリリウム粉末を2重
量%添加して混合した。次いで該混合粉末に1000
Kg/cm2の圧力を加えて成形体としたのち、該成形
体を1×10-4torrの真空中で焼結した。室温から
2100℃まで約2hで昇温し、2100℃で0.5h保持した
のち、加熱電源を切つて放冷した。焼結体中のベ
リリウム含有量は約0.4重量%であつた。第6表
に該焼結体の特性を示す。焼結体は緻密化してお
り、高熱伝導率、高電気抵抗率及び小さい熱膨脹
係数を有している。
[Table] Thermal conductivity and electrical resistivity were measured at room temperature. Thermal expansion coefficient was the average value between room temperature and 300°C. Experimental Example 8 Silicon carbide powder was synthesized in high-frequency thermal plasma. The powder is an extremely fine powder with a powder diameter of 200 Å to 0.2 μm. 2% by weight of beryllium oxide powder having an average particle size of 1 μm was added and mixed. Then add 1000 to the mixed powder.
After applying a pressure of Kg/cm 2 to form a compact, the compact was sintered in a vacuum of 1×10 −4 torr. from room temperature
The temperature was raised to 2100°C in about 2 hours, and the temperature was maintained at 2100°C for 0.5 hours, and then the heating power was turned off and allowed to cool. The beryllium content in the sintered body was approximately 0.4% by weight. Table 6 shows the properties of the sintered body. The sintered body is dense and has high thermal conductivity, high electrical resistivity, and low coefficient of thermal expansion.

【表】 熱伝導率、電気抵抗率は室温で測定
熱膨脹係数は室温〜300℃の平均値
比較例 1 炭化ケイ素粉末に添加剤を加えないで実験例1
と同様にしてホツトプレス法により焼結体を得
た。該焼結体の特性は第7表に示す通りで、緻密
化していないため、熱伝導率、電気抵抗率、機械
的強度のいずれの値も小さい。
[Table] Thermal conductivity and electrical resistivity are measured at room temperature. Thermal expansion coefficient is the average value from room temperature to 300°C. Comparison example 1 Experimental example 1 without adding additives to silicon carbide powder
A sintered body was obtained by hot pressing in the same manner as above. The properties of the sintered body are as shown in Table 7, and since it is not densified, the values of thermal conductivity, electrical resistivity, and mechanical strength are all small.

【表】 熱伝導率、電気抵抗率は室温で測定
熱膨脹係数は室温〜300℃の平均値
比較例 2 炭化ケイ素粉末に添加剤として酸化アルミニウ
ムを2重量%添加混合した混合粉末を実験例1と
同様にして成形体としたのち、ホツトプレス法に
より焼結体を得た。焼結体は第8表に示す通り十
分に緻密化し、機械的強度は大きいが、熱伝導
率、電気抵抗率はいずれも小さい値を示してい
る。また、炭化アルミニウム、窒化アルミニウ
ム、リン酸アルミニウムを添加剤として使用した
場合にも第8表に示したものと同様な特性を示し
た。
[Table] Thermal conductivity and electrical resistivity are measured at room temperature. Thermal expansion coefficient is the average value between room temperature and 300°C. Comparative Example 2 Mixed powder made by adding 2% by weight of aluminum oxide as an additive to silicon carbide powder was used as Experimental Example 1. After forming a molded body in the same manner, a sintered body was obtained by hot pressing. As shown in Table 8, the sintered bodies were sufficiently densified and had high mechanical strength, but both thermal conductivity and electrical resistivity showed small values. Furthermore, properties similar to those shown in Table 8 were also exhibited when aluminum carbide, aluminum nitride, and aluminum phosphate were used as additives.

【表】 熱伝導率、電気抵抗率は室温で測定
熱膨脹係数は室温〜300℃の平均値
実施例 以上の実験例及び比較例をもとに、本発明にな
る半導体装置の具体的な適用例として、実験例1
で得たベリリウム含有量が0.5重量%の炭化ケイ
素焼結体を基板として用いた半導体パワーモジユ
ールで説明する。第5図は従来構造の組立断面図
である。導体4とヒートシンク6及びヒートシン
ク6と金属支持板8の間を有機絶縁物5及びアル
ミナ基板7絶縁し、またシリコン素子1とヒート
シンク6との熱膨脹係数の差によるひずみを緩和
するためにスペーサ3を介在させてある。第6図
は本発明の半導体パワーモジユールの組立断面図
である。上述の炭化ケイ素焼結体からなる基板1
5はシリコン素子11と直接ろう付けされてお
り、非常に簡単な構造の半導体装置が得られる。
また、基板15には配線層となる導体13が設け
られ、この配線層となる導体13と半導体素子1
1とはAlからなる金属細線12によつて電気的
に接続されている。 上記半導体装置を−60℃で30分保持したのち室
温にして5分保持し、さらに125℃に昇温して30
分保持するヒートサイクルを加えた。従来の半導
体装置(第5図)は20回のヒートサイクルで基板
にクラツクが発生するとともにハンダ付箇所には
がれが生じた。しかし、本発明の半導体装置(第
6図)は150回のヒートサイクル後でも異常が認
められなかつた。 以上、本発明の緻密で、高熱伝導率、高電気抵
抗率及び低熱膨脹係数を有する基板上に半導体素
子を載置した半導体装置は熱的安定性が高いとい
う優れた効果を有する。
[Table] Thermal conductivity and electrical resistivity are measured at room temperature. Thermal expansion coefficient is the average value between room temperature and 300°C. Example Based on the above experimental examples and comparative examples, specific application examples of the semiconductor device of the present invention As, Experimental Example 1
A semiconductor power module using the silicon carbide sintered body with a beryllium content of 0.5% by weight as a substrate will be explained. FIG. 5 is an assembled sectional view of the conventional structure. A spacer 3 is provided to insulate the organic insulator 5 and the alumina substrate 7 between the conductor 4 and the heat sink 6 and between the heat sink 6 and the metal support plate 8, and to alleviate the strain caused by the difference in coefficient of thermal expansion between the silicon element 1 and the heat sink 6. It is mediated. FIG. 6 is an assembled sectional view of the semiconductor power module of the present invention. Substrate 1 made of the above-mentioned silicon carbide sintered body
5 is directly brazed to the silicon element 11, resulting in a semiconductor device with a very simple structure.
Further, the substrate 15 is provided with a conductor 13 serving as a wiring layer, and the conductor 13 serving as the wiring layer and the semiconductor element 1
1 and is electrically connected by a thin metal wire 12 made of Al. The above semiconductor device was kept at -60℃ for 30 minutes, then brought to room temperature and kept for 5 minutes, and further heated to 125℃ for 30 minutes.
A heat cycle was applied for a minute hold. In the conventional semiconductor device (Figure 5), after 20 heat cycles, cracks appeared on the board and peeling occurred at the soldered areas. However, no abnormality was observed in the semiconductor device of the present invention (FIG. 6) even after 150 heat cycles. As described above, the semiconductor device of the present invention in which a semiconductor element is mounted on a dense substrate having high thermal conductivity, high electrical resistivity, and low coefficient of thermal expansion has an excellent effect of high thermal stability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はベリリウム含有量と焼結体の相対密度
との関係を示す図、第2図はベリリウム含有量と
焼結体の室温における熱伝導率との関係を示す
図、第3図はベリリウム含有量と焼結体の室温に
おける電気抵抗率との関係を示す図、第4図はベ
リリウム含有量と焼結体の室温〜300℃における
熱膨脹係数の平均値との関係を示す図、第5図は
従来法によるシリコン半導体装置の組立断面図、
第6図は本発明による基板を用いたシリコン半導
体装置の断面図、第7図は熱伝導率と相対密度と
の関係を示す線図である。 1,11……シリコン素子、2,12……アル
ミニウムリード線、3……モリブデンスペーサ、
4,13……導体、5……有機絶縁物、6……ヒ
ートシンク、7……アルミナ基板、8……支持
板、9,10,14……半田、15……炭化ケイ
素焼結体基板。
Figure 1 shows the relationship between the beryllium content and the relative density of the sintered body, Figure 2 shows the relationship between the beryllium content and the thermal conductivity of the sintered body at room temperature, and Figure 3 shows the relationship between the beryllium content and the thermal conductivity of the sintered body at room temperature. Figure 4 shows the relationship between beryllium content and the electrical resistivity of the sintered body at room temperature. The figure is a cross-sectional view of a silicon semiconductor device assembled using a conventional method.
FIG. 6 is a sectional view of a silicon semiconductor device using a substrate according to the present invention, and FIG. 7 is a diagram showing the relationship between thermal conductivity and relative density. 1, 11... Silicon element, 2, 12... Aluminum lead wire, 3... Molybdenum spacer,
4, 13... Conductor, 5... Organic insulator, 6... Heat sink, 7... Alumina substrate, 8... Support plate, 9, 10, 14... Solder, 15... Silicon carbide sintered body substrate.

Claims (1)

【特許請求の範囲】[Claims] 1 ベリリウムを0.1〜3.5重量%含み、残部が実
質的に炭化ケイ素である電気絶縁性焼結体からな
る基体の表面上に、半導体素子が金属によつて接
合され、前記半導体素子接合面の前記基体上に配
線層が形成され、前記半導体素子と前記配線層と
は、金属線によつて電気的に接続されていること
を特徴とする半導体装置。
1 A semiconductor element is bonded by metal onto the surface of a base made of an electrically insulating sintered body containing 0.1 to 3.5% by weight of beryllium, the remainder being substantially silicon carbide, 1. A semiconductor device, wherein a wiring layer is formed on a base, and the semiconductor element and the wiring layer are electrically connected by a metal wire.
JP57019641A 1982-02-12 1982-02-12 Electric device Granted JPS57164540A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57019641A JPS57164540A (en) 1982-02-12 1982-02-12 Electric device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57019641A JPS57164540A (en) 1982-02-12 1982-02-12 Electric device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP55075601A Division JPS5815953B2 (en) 1979-11-05 1980-06-06 Board for electrical equipment

Publications (2)

Publication Number Publication Date
JPS57164540A JPS57164540A (en) 1982-10-09
JPH0247856B2 true JPH0247856B2 (en) 1990-10-23

Family

ID=12004847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57019641A Granted JPS57164540A (en) 1982-02-12 1982-02-12 Electric device

Country Status (1)

Country Link
JP (1) JPS57164540A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6276525A (en) * 1985-09-30 1987-04-08 Toshiba Corp Molybdenum plate and its manufacture

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5254995U (en) * 1975-10-18 1977-04-20
JPS572591A (en) * 1980-06-06 1982-01-07 Hitachi Ltd Electrically insulating board and method of manufacturing same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5254995U (en) * 1975-10-18 1977-04-20
JPS572591A (en) * 1980-06-06 1982-01-07 Hitachi Ltd Electrically insulating board and method of manufacturing same

Also Published As

Publication number Publication date
JPS57164540A (en) 1982-10-09

Similar Documents

Publication Publication Date Title
US4571610A (en) Semiconductor device having electrically insulating substrate of SiC
US4585706A (en) Sintered aluminum nitride semi-conductor device
US4997798A (en) Process for producing aluminum nitride sintered body with high thermal conductivity
JP4360061B2 (en) Semiconductor device member and semiconductor device using the same
JPH054950B2 (en)
JPS5832073A (en) Sintered body
JPS6337065B2 (en)
JPS5831755B2 (en) Base for electrical insulation
JPH0247856B2 (en)
JPS5815953B2 (en) Board for electrical equipment
JPH0313190B2 (en)
JPS6236988B2 (en)
JPS631268B2 (en)
JP2677748B2 (en) Ceramics copper circuit board
JPS593436B2 (en) Charcoal-fired silicon powder composition for sintering
JPS6236989B2 (en)
JPH0470776B2 (en)
JPS59162177A (en) Electrically insulative silicon carbide powder composition
JP3204566B2 (en) Manufacturing method of heat sink material
JPS6227487B2 (en)
JPS6025389B2 (en) Electrically insulating silicon carbide powder composition
JP3038320B2 (en) Method for producing aluminum nitride sintered body for circuit board
JPS61281074A (en) High heat conductivity aluminum nitride sintered body
JPS6342414B2 (en)
JPS60239366A (en) Manufacture of aluminum nitride sintered body