JPH0232589A - Manufacture of printed wiring board - Google Patents
Manufacture of printed wiring boardInfo
- Publication number
- JPH0232589A JPH0232589A JP18186988A JP18186988A JPH0232589A JP H0232589 A JPH0232589 A JP H0232589A JP 18186988 A JP18186988 A JP 18186988A JP 18186988 A JP18186988 A JP 18186988A JP H0232589 A JPH0232589 A JP H0232589A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- resist
- resist film
- film
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000005530 etching Methods 0.000 claims abstract description 22
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 13
- 238000007747 plating Methods 0.000 claims abstract description 11
- 238000004070 electrodeposition Methods 0.000 claims abstract description 10
- 239000003054 catalyst Substances 0.000 claims abstract description 7
- 239000000126 substance Substances 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 14
- 229910000679 solder Inorganic materials 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 238000005553 drilling Methods 0.000 claims description 3
- 239000011889 copper foil Substances 0.000 abstract description 10
- 238000004806 packaging method and process Methods 0.000 abstract description 3
- 239000000463 material Substances 0.000 abstract description 2
- 238000010030 laminating Methods 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 6
- 239000004020 conductor Substances 0.000 description 5
- 229910000831 Steel Inorganic materials 0.000 description 4
- 239000010959 steel Substances 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011888 foil Substances 0.000 description 2
- 206010011732 Cyst Diseases 0.000 description 1
- 208000031513 cyst Diseases 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はプリント配線板の製造方法に係り、特に高密度
化に好適なプリント配線板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method of manufacturing a printed wiring board, and particularly to a method of manufacturing a printed wiring board suitable for increasing density.
従来、プリント配線板を簡易に製造する方法ととして、
特公昭５Ｂ−６３１９号に記載のような方法が知られて
いる。この公知化さｎた方法は、銅張積層板に穴あけし
、触媒付与、エツチングレジスト膜形成、エツチング、
エツチングレジスト膜除去、耐めっきソルダレジスト膜
形成、化学鋼めっきを順次行うものであり、エツチング
レジスト膜形成法としては、スクリーン印刷法またはド
ライフィルムを用いたテンティング法を採用していた。Conventionally, as a method for easily manufacturing printed wiring boards,
A method as described in Japanese Patent Publication No. 5B-6319 is known. This well-known method involves drilling holes in a copper-clad laminate, applying a catalyst, forming an etching resist film, etching,
Etching resist film removal, plating-resistant solder resist film formation, and chemical steel plating are sequentially performed, and the etching resist film formation method employs a screen printing method or a tenting method using a dry film.
上記従来技術におけるエツチングレジスト！形成法のう
ち、スクリーン印刷法では、最小導体幅（１２ｍｍ程度
のラフなパターンの形成が限度であり、また、スルーホ
ールランド部の大向に面した銅箔側面部にエツチングレ
ジスト膜を形成できないため、その部分がエツチングさ
れスルーホールの充分な接続信頼性が得られないという
懸念があった。Etching resist in the above conventional technology! Among the formation methods, the screen printing method is limited to forming a rough pattern with a minimum conductor width (approximately 12 mm) and cannot form an etching resist film on the side surface of the copper foil facing the large direction of the through-hole land. Therefore, there was a concern that that part would be etched and sufficient connection reliability of the through hole could not be obtained.
また、ドライフィルムを用いたテンティング法によるパ
ターン形成、エツチングの各工程ごとの断面図を第２図
、第５図に示すが、ドライフィルム８の解像力と密着性
の悪さから、最小導体幅α１ＬＬＩｍ程度のラフなパタ
ーンしか形成できなかった〔第２図（ａ）、（ｂ） ）
。スルーホールの接続信頼性については、ランド径と穴
径の差が（１２ｏｎｍ以上の場合は問題ないが、それよ
り小さくなると（例えば、小径バイアホール部）、エツ
チング時にドライフィルム８が局部的に剥離して、穴３
内にエツチング液が入り、上記スクリーン印刷法による
場合と同様にランド部銅箔２′の穴５内に面した部分が
エツチングされたしまう〔第３図（ａ）、（ｂ）〕可能
性がある。このため、化学銅めっき膜７を形成した場合
、スルーホールコーナ部の接続が不完全になるという懸
念があった〔８ｇ３図（Ｃ）〕。Furthermore, cross-sectional views of each step of pattern formation and etching by the tenting method using dry film are shown in FIGS. 2 and 5, but due to the poor resolution and adhesion of dry film 8, the minimum conductor width α1 Only a somewhat rough pattern could be formed [Figure 2 (a), (b)).
. Regarding the connection reliability of through holes, there is no problem if the difference between the land diameter and the hole diameter is 12 onm or more, but if it is smaller than that (for example, in small diameter via holes), the dry film 8 may peel off locally during etching. then hole 3
There is a possibility that the etching liquid will enter the etching solution and the portion of the land portion copper foil 2' facing the hole 5 will be etched (Fig. 3 (a), (b)), as in the case of the above-mentioned screen printing method. be. For this reason, when the chemical copper plating film 7 was formed, there was a concern that the connection at the corner of the through hole would be incomplete [Fig. 8g3 (C)].
本発明の目的は、最小導体幅５０μｍ程度の微細パター
ンの形成を可能にすることと、充分な接続信頼性を確保
しながらランド径と穴径の差がα１ｍｍ程度のスルーホ
ール（小径バイアホール）の形成を可能にすることで、
プリント配線板の実装密度を向上させることにある。The purpose of the present invention is to enable the formation of fine patterns with a minimum conductor width of about 50 μm, and to create through holes (small diameter via holes) with a difference between land diameter and hole diameter of about α1 mm while ensuring sufficient connection reliability. By enabling the formation of
The objective is to improve the mounting density of printed wiring boards.
上記目的を達成するため本発明は、銅張積層板に穴あけ
し、触媒付与、エツチングレジスト膜形成、エツチング
、エツチングレジスト膜除去、化学銅めっきを順次行っ
てプリント配線板を製造する方法において、上記エツチ
ングレジストとして電着型ＵＶレジストを用いたことを
特徴とする。To achieve the above object, the present invention provides a method for manufacturing a printed wiring board by sequentially performing the steps of drilling holes in a copper-clad laminate, applying a catalyst, forming an etching resist film, etching, removing the etching resist film, and chemical copper plating. A feature is that an electrodeposition type UV resist is used as the etching resist.
電着型ａｙレジストは、下層鋼箔面との密着性に優れ、
かつ、ドライフィルムのように積層板の穴開口部に膜を
形成する必要がないため、薄膜化が可能であり、したが
って、エツチングレジスト膜としての解像力を向上させ
ることができるので、より微細なパターン形成が可能で
ある。また、電着法によりレジスト膜を形成するため、
スルーホールランド部の大円に面した銅箔側面部にもレ
ジスト膜を形成できる。よってレジスト膜で銅箔側面部
を保護している点と、レジスト膜の密着性に優れている
点の効果として、ドライフィルムを用いた場合のような
、レジスト膜の局部的剥離によるエツチング液の侵入で
銅箔側面部がエツチングされてしまうことがないので、
ランド径と穴径の差がα１ｍｍ程度と小さくても、充分
な接続信頼性を持ったスルーホールを形成できる。Electrodeposition type AY resist has excellent adhesion to the underlying steel foil surface,
In addition, unlike dry film, there is no need to form a film on the hole openings of the laminate, so it is possible to make the film thinner, which improves the resolution of the etching resist film, allowing for finer patterns. Formation is possible. In addition, since the resist film is formed by electrodeposition,
A resist film can also be formed on the side surface of the copper foil facing the large circle of the through-hole land. Therefore, the advantage of the resist film protecting the side surfaces of the copper foil and the excellent adhesion of the resist film is that the etching solution can be removed by localized peeling of the resist film, unlike when using a dry film. Since the side surface of the copper foil will not be etched due to intrusion,
Even if the difference between the land diameter and the hole diameter is as small as α1 mm, a through hole with sufficient connection reliability can be formed.
以下１本発明の一実施例を第１図により・工程順に説明
する。Hereinafter, one embodiment of the present invention will be explained in order of steps with reference to FIG.
１、 基材１に銅箔２を積層した銅張積層板に穴３をあ
げ、穴壁面に触媒（例えば、ジグレイ社製キャタボジッ
ト４４）４を付与する〔第１図（ａ）〕。1. A hole 3 is formed in a copper-clad laminate in which a copper foil 2 is laminated on a base material 1, and a catalyst (for example, Catabosite 44 manufactured by JiGray) 4 is applied to the hole wall surface [FIG. 1(a)].
２ 電着型ＵＶＬ／シスト（例えば、ジグレイ社製イー
グルＥ／Ｐ２Ｏ００）を鋼箔２の穴５内に面した側面部
を含む全表面に電着法により被着し、電着型ＵＶレジス
ト膜５を形成する〔第１図（ｂ）〕。2 Electrodeposited UVL/cyst (for example, Eagle E/P2O00 manufactured by Jigray) is deposited on the entire surface of the steel foil 2, including the side surface facing inside the hole 5, to form an electrodeposition UV resist film. 5 [Fig. 1(b)].
五 露光・現像により、電着型ＵＶレジスト膜５′を所
定のパターンに形成する〔第１図（Ｃ）〕。5. Form an electrodeposition type UV resist film 5' in a predetermined pattern by exposure and development [FIG. 1(C)].
４、触媒４を溶解しないエツチング液（例えば、メルチ
ツクラス社ｍｌ！Ａプロセス）を用いて、銅箔２′を所
定のパターンに形成する〔第１図（ｄ）〕。4. Form the copper foil 2' into a predetermined pattern using an etching solution that does not dissolve the catalyst 4 (for example, ML!A process from Merchitz Klass Co., Ltd.) [FIG. 1(d)].
１ 電着型ＵＶレジスト膜５′を溶媒により溶解除去す
る〔第１図（θ）〕。1. The electrodeposited UV resist film 5' is dissolved and removed using a solvent [Fig. 1 (θ)].
＆ 穴５内およびスルーホールランド部以外の表面に耐
めっきソルダレジスト（例えば、日立製Ｈ３−０８）を
常法てより被着し、耐めっきソルダレジスト膜６を形成
する〔第１図（ｆ）〕。& Apply a plating-resistant solder resist (for example, Hitachi H3-08) to the inside of the hole 5 and the surface other than the through-hole land portion by a conventional method to form a plating-resistant solder resist film 6 [see Fig. 1 (f) )].
Ｚ 穴３内訃よびスルーホールランド部に化学鋼めっき
膜７を常法により形成する〔第１図（ｇ）〕。Z A chemical steel plating film 7 is formed on the inside of the hole 3 and on the through-hole land by a conventional method [FIG. 1(g)].
以上１．〜Ｚの工程によりプリント配線板を製造した。Above 1. A printed wiring board was manufactured through the steps of ~Z.
本実施例によれば、前述した理由から最小導体幅５０μ
ｍの微細パターンの形成と、小径バイアボール（ランド
径と穴径の差がαｊ ｍｍまで可能）の接続信頼性の確
保ができる。従来のドライフィルムを用いたテンティン
グ法では、最小導体幅α１ｍｍのパターン形成と、ラン
ド径と穴径の差がｃＬ２ｍｍのスルーホール形成が限度
であったので、本実施例により、プリント配線板の実装
密度を著しく向上させることができる。また、従来品に
あったスルーホールコーナ部の接続不完全などのパター
ン欠陥を著しく低減することができる。According to this embodiment, the minimum conductor width is 50μ for the reasons mentioned above.
It is possible to form a fine pattern of m and ensure connection reliability for small-diameter via balls (the difference between the land diameter and hole diameter can be up to αj mm). In the conventional tenting method using dry film, the limits were to form a pattern with a minimum conductor width of α1 mm and through holes with a difference of cL2 mm between the land diameter and hole diameter. Packaging density can be significantly improved. Furthermore, pattern defects such as incomplete connections at through-hole corners, which were present in conventional products, can be significantly reduced.
本発明によれば、微細パターンを形成することと、スル
ーホール部のランド径と穴径の差を小さくすることがで
きるので、プリント配線板の実装密度を著しく向上させ
ることができ、スルーホールの充分な接続信頼性を有す
る、より高実装密度のプリント配線板を簡易に製造する
ことが可能となる。According to the present invention, it is possible to form a fine pattern and to reduce the difference between the land diameter and the hole diameter of the through-hole portion, so the mounting density of the printed wiring board can be significantly improved, and the through-hole It becomes possible to easily manufacture a printed wiring board with sufficient connection reliability and higher packaging density.
第１図は本発明の一実施例の工程ごとの断面図、第２図
、第６図は従来例の工程ごとの断面図である。FIG. 1 is a sectional view of each step in an embodiment of the present invention, and FIGS. 2 and 6 are sectional views of each step of a conventional example.
Claims (1)
スト膜形成、エッチング、エッチングレジスト膜除去、
耐めっきソルダレジスト膜形成、化学銅めっきを順次行
ってプリント配線板を製造する方法において、上記エッ
チングレジストとして電着型ＵＶレジストを用いたこと
を特徴とするプリント配線板の製造方法。1. Drilling holes in copper-clad laminates, applying catalyst, forming etching resist film, etching, removing etching resist film,
A method for manufacturing a printed wiring board, characterized in that an electrodeposition type UV resist is used as the etching resist in the method of manufacturing a printed wiring board by sequentially forming a plating-resistant solder resist film and chemical copper plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18186988A JPH0232589A (en) | 1988-07-22 | 1988-07-22 | Manufacture of printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18186988A JPH0232589A (en) | 1988-07-22 | 1988-07-22 | Manufacture of printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0232589A true JPH0232589A (en) | 1990-02-02 |
Family
ID=16108269
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18186988A Pending JPH0232589A (en) | 1988-07-22 | 1988-07-22 | Manufacture of printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0232589A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07162131A (en) * | 1993-12-13 | 1995-06-23 | Nec Corp | Manufacture of printed wiring board |
| US5539181A (en) * | 1992-08-26 | 1996-07-23 | International Business Machines Corporation | Circuit board |
| JP2011222798A (en) * | 2010-04-12 | 2011-11-04 | Konica Minolta Ij Technologies Inc | Metal pattern manufacturing method and metal pattern |
-
1988
- 1988-07-22 JP JP18186988A patent/JPH0232589A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5539181A (en) * | 1992-08-26 | 1996-07-23 | International Business Machines Corporation | Circuit board |
| US5680701A (en) * | 1992-08-26 | 1997-10-28 | International Business Machines Corporation | Fabrication process for circuit boards |
| JPH07162131A (en) * | 1993-12-13 | 1995-06-23 | Nec Corp | Manufacture of printed wiring board |
| JP2011222798A (en) * | 2010-04-12 | 2011-11-04 | Konica Minolta Ij Technologies Inc | Metal pattern manufacturing method and metal pattern |
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