JPH02293722A - Active matrix type liquid crystal display device - Google Patents

Active matrix type liquid crystal display device

Info

Publication number
JPH02293722A
JPH02293722A JP1115493A JP11549389A JPH02293722A JP H02293722 A JPH02293722 A JP H02293722A JP 1115493 A JP1115493 A JP 1115493A JP 11549389 A JP11549389 A JP 11549389A JP H02293722 A JPH02293722 A JP H02293722A
Authority
JP
Japan
Prior art keywords
liquid crystal
electrode
electrodes
substrate
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1115493A
Other languages
Japanese (ja)
Inventor
Michiya Oura
大浦 道也
Tetsuya Hamada
哲也 濱田
Tadahisa Yamaguchi
山口 忠久
Kazuhiro Takahara
高原 和博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1115493A priority Critical patent/JPH02293722A/en
Publication of JPH02293722A publication Critical patent/JPH02293722A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

PURPOSE:To eliminate the DC components of the voltage impressed on liquid crystal cells and to prevent the generation of after-images by providing counter electrode corresponding to picture element electrodes on a 1st substrate onto a 2nd substrate and constituting the device in such a manner that both ends of the cells of the respective picture elements are connected via gate-source capacitors to scan buses. CONSTITUTION:The picture element electrodes E as well as TFTs 1, TFTs 2, the scan buses SB, and data buses DB are provided on the TFT substrate and the counter electrodes E' are provided in the position facing the picture element electrodes E on the counter substrate. In addition, striped common electrodes C are provided. The source picture element electrodes S' and drain electrodes D' of the TFTs 2 and bumps 3, 4, 5, 6 in the positions corresponding thereto are provided. The bumps 5, 6 are respectively brought into contact with the counter electrodes E' and the common electrodes C. The TFT substrate and the counter substrate are disposed to face each other after the formation in such a manner, then the bumps 3 and 5 and the bumps 4 and 6 are joined. Since both ends of the respective liquid crystal cells LC are connected to the scan buses SB via the gate-source capacitors CGS, CGS', the voltage impressed on the liquid crystal cells does not change.

Description

【発明の詳細な説明】 〔概 要〕 高画質表示を達成できるアクティブマトリクス型液晶表
示装置に関し、 液晶セルに掛かる電圧を完全な対象波形とすることがで
き、従って残像が発生しない液晶表示装置を提供するこ
とを目的とし、 対向配置された第1および第2の岱板間に液晶セルより
なる複数の画素を薄膜トランジスタと組み合わせて71
・リクス状に配列したアクティブマトリクス型液晶表示
装置の構成において、前記第1の基板上に、各画素対応
の画素電極と、該画素電極ごとに第1および第2の薄膜
トランジスタと、画素の行対応に配列された複数本のス
キャンバスと、画素の列対応に配列されたデータバスを
設け、且つ、前記第1の薄膜1・ランジスクの制御電極
,一方および他方の被制御電極をそれぞれ前記スキャン
バス,画素電極,データバスに接続するとともに、前記
第2の薄膜トランジスタの制御電極を前記スキャンバス
に接続し、前記第2の基板上に、前記画素電極に対応し
て対向電極と、各画素の行または列対応にストライプ状
のコモン電極とを設け、前記第2の薄膜トランジスタの
一方の被制御電極を前記対向電極と、他方の被制御電極
を前記コモン電極と、それぞれ柱状電極により接続して
なる構成とする。
[Detailed Description of the Invention] [Summary] Regarding an active matrix liquid crystal display device that can achieve high-quality display, the present invention provides a liquid crystal display device that can make the voltage applied to the liquid crystal cell a completely symmetrical waveform, and therefore does not cause afterimages. A plurality of pixels made of liquid crystal cells are combined with thin film transistors between first and second caps placed opposite each other.
- In the configuration of an active matrix liquid crystal display device arranged in a matrix, on the first substrate, a pixel electrode corresponding to each pixel, a first and second thin film transistor for each pixel electrode, and a pixel electrode corresponding to a row of pixels are provided. a plurality of scan canvases arranged in rows, and a data bus arranged in correspondence with columns of pixels; , a pixel electrode, and a data bus, and a control electrode of the second thin film transistor is connected to the scan canvas, and on the second substrate, a counter electrode corresponding to the pixel electrode and a row of each pixel are connected. Alternatively, striped common electrodes are provided corresponding to columns, and one controlled electrode of the second thin film transistor is connected to the opposing electrode, and the other controlled electrode is connected to the common electrode by columnar electrodes. shall be.

〔産業上の利用分野〕[Industrial application field]

本発明は、高画質表示を達成できるアクティブマトリク
ス型液晶表示装置に関する。
The present invention relates to an active matrix liquid crystal display device that can achieve high quality display.

アクティブマトリクス型液晶表示装置は、大容量表示に
おいてもコン1・ラストが低下しないため、ポケットT
V等への実用化が盛んになされている。
Active matrix liquid crystal display devices do not reduce contrast and last even when displaying large volumes, so Pocket T
It is being actively put into practical use in V, etc.

しかしながら残像という、長時間同一パターンを表示す
ると、そのパターンが焼きつくという現象があり、情報
端末等に用いる場合に問題となる。
However, there is a phenomenon called afterimage, in which the same pattern is burned in when the same pattern is displayed for a long time, which poses a problem when used in information terminals and the like.

残像の発生しない液晶表示装置が強く求められている。There is a strong demand for a liquid crystal display device that does not cause afterimages.

〔従来の技術〕[Conventional technology]

従来の液晶パネルの構成を第3図(a). (b)に示
す。
The configuration of a conventional liquid crystal panel is shown in Figure 3(a). Shown in (b).

同図(a)に示すように、一対の絶縁性基板の一方即ち
薄膜トランジスタ(TPT)基板上に、TFTl,画素
電極E.スキャンバスSB,データバスDBが形成され
、他方の絶縁性基板すなわち対向基板には、一面のべ夕
電極のコモン電極Cが形成されている。
As shown in FIG. 5A, a TFTl, a pixel electrode E. A scan bus SB and a data bus DB are formed, and a common electrode C, which is a flat electrode, is formed on the other insulating substrate, that is, the counter substrate.

この従来の液晶パネルの構成では、スキャンバスSBの
電位が正から負へ切り換わると、TFT1のゲートGと
ソースS間の容量CGSによるカップリングがあるため
、画素電極の電位が変化し、液晶セル電圧が変化する。
In this conventional liquid crystal panel configuration, when the potential of the scan canvas SB switches from positive to negative, there is coupling due to the capacitance CGS between the gate G and source S of TFT1, so the potential of the pixel electrode changes, and the liquid crystal Cell voltage changes.

この変化量ΔvL,は次式で表される。This amount of change ΔvL is expressed by the following equation.

ΔVLC=Cr.s/ (Ccs+Ctc)XΔ■,こ
こで、CLcは液晶容量,Δv6はゲート電圧の変化分
である。
ΔVLC=Cr. s/(Ccs+Ctc)XΔ■, where CLc is the liquid crystal capacitance and Δv6 is the change in gate voltage.

従来はこの変化分を、コモン電極からコモン電圧として
印加し、上記変化量Δ■LCを補償している。
Conventionally, this amount of change is applied as a common voltage from a common electrode to compensate for the amount of change Δ■LC.

一方液晶容量C .Cは、液晶にかかる電圧によって変
化するという特性がある。従って上式から分かるように
、変化量ΔVLCが変化し、最適なコモン電圧が変化し
てしまう。
On the other hand, liquid crystal capacitance C. C has a characteristic that it changes depending on the voltage applied to the liquid crystal. Therefore, as can be seen from the above equation, the amount of change ΔVLC changes, and the optimal common voltage changes.

しかし外部から印加するコモン電圧は一定であるので、
液晶に印加される電圧は非対象となり、完全に打ち消し
合うことができない。そのため直流成分が生じ、残像が
発生する。
However, since the common voltage applied externally is constant,
The voltages applied to the liquid crystal are asymmetrical and cannot cancel each other out completely. Therefore, a direct current component is generated and an afterimage is generated.

この残像の発生を防止するため、補助容量を設ける技術
があるが、基板上でクロスオーバーが生じるため、液晶
パネルの作製が困難となる。
In order to prevent the occurrence of this afterimage, there is a technique of providing an auxiliary capacitor, but since crossover occurs on the substrate, it becomes difficult to manufacture a liquid crystal panel.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来液晶表示装置はこのように残像が発生ずるため、情
報用端末等の用途に不都合がある。
Since the conventional liquid crystal display device produces such an afterimage, it is inconvenient for use in information terminals and the like.

本発明は、液晶セルに掛かる電圧を完全な対象波形とす
ることができ、従って残像が発生しない液晶表示装置を
提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display device in which the voltage applied to a liquid crystal cell can have a completely symmetrical waveform, and therefore no afterimage occurs.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、液晶セルごとに第1および第2の薄膜トラン
ジスタを設け、この2つの薄膜トランジスタおよび画素
電極を第1の基板(TPT基板)上に配置し、他方の基
板(対向基板)上に上記画素電極に対向して対向電極と
ストライプ状のコモン電極を設ける。
In the present invention, first and second thin film transistors are provided for each liquid crystal cell, these two thin film transistors and a pixel electrode are arranged on a first substrate (TPT substrate), and the above pixel is arranged on the other substrate (counter substrate). A counter electrode and a striped common electrode are provided opposite the electrode.

そして、第1の薄膜トランジスタの制御電極(ゲート電
極),一方の被制御電極(ソース電極)他方の被制御電
極(ドレイン電極)は、TFTi板上でそれぞれスキャ
ンバス,画素電極,データバスと接続し、第2の薄膜ト
ランジスタの制御電極は同じ<TFT基板上でスキャン
バスSBと接続するが、一方および他方の被制御電極は
、バンプのような柱状電極により対向w板上の対向電極
,コモン電極と接続する。
The control electrode (gate electrode), one controlled electrode (source electrode), and the other controlled electrode (drain electrode) of the first thin film transistor are connected to the scan canvas, pixel electrode, and data bus, respectively, on the TFTi board. , the control electrode of the second thin film transistor is connected to the scan canvas SB on the same <TFT substrate, but one and the other controlled electrodes are connected to the counter electrode and common electrode on the opposite w plate by columnar electrodes such as bumps. Connecting.

〔作 用〕[For production]

上述の如く構成したことにより、各画素ともセルの両端
が、ゲート・ソース間容量CG,を介してスキャンバス
SBに接続される。
With the above configuration, both ends of each pixel are connected to the scan canvas SB via the gate-source capacitance CG.

従って、スキャンバスの電位が正がら負に変わっても、
液晶セルの両端の電位は、共に同一方向に同じ値だけシ
フトするので、液晶セルに掛かる電圧に変化はない。
Therefore, even if the potential of the scan canvas changes from positive to negative,
Since the potentials at both ends of the liquid crystal cell are shifted by the same value in the same direction, there is no change in the voltage applied to the liquid crystal cell.

このように本発明では、従来構成の如<Casに起因す
る液晶セル電圧の低下がないため、直流成分は存在せず
、残像が発生しなくなる。
As described above, in the present invention, there is no drop in the liquid crystal cell voltage caused by <Cas as in the conventional configuration, so there is no direct current component and no afterimage occurs.

〔実 施 例〕〔Example〕

以下本発明の一実施例を第1図(a). (b)および
第2図により説明する。
An embodiment of the present invention is shown in FIG. 1(a) below. This will be explained with reference to (b) and FIG.

第1図(a), (b)に示す如く、TPT基板上に、
第1および第2のTFT]および第2のTPT2スキャ
ンバスSB,データハスDB,画素電極ILを設け、対
向基板上に、上記画素電極Eに対向する位置に対向電極
E“を設けるとともに、ス1〜ライブ状のコモン電極C
を設ける。
As shown in Figures 1(a) and (b), on the TPT substrate,
a scan canvas SB, a data space DB, and a pixel electrode IL, and a counter electrode E" is provided on the counter substrate at a position opposite to the pixel electrode E. ~ Live common electrode C
will be established.

更に、旧記TFT2のソース電極S”およびドレイン電
極D゛と、これらに対応ずる位置に、それぞれパンプ3
.4,5.6を設ける。バンプ56はそれぞれ対向電極
E“およびコモン電極Cに接続している。
Further, pumps 3 are provided at positions corresponding to the source electrode S'' and drain electrode D'' of the old TFT2, respectively.
.. 4, 5.6 will be provided. The bumps 56 are connected to the counter electrode E" and the common electrode C, respectively.

上記パンプ3〜6は、それぞれ高さ約3μmの柱状また
は半球状電極で、インジウム(I n)のような低融点
金属を用いて形成する。
The pumps 3 to 6 are columnar or hemispherical electrodes each having a height of about 3 μm, and are formed using a low melting point metal such as indium (In).

このように形成した後、TPT基板と対向基板を対向さ
せ、バンプ3とバンプ5.及びハンブ4とバンプ6を接
合する。良好な接触がとれなかった場合には、その箇所
をレーザ照射により接続することも可能である。
After forming in this way, the TPT substrate and the counter substrate are made to face each other, and bumps 3 and 5 are formed. Then, the hump 4 and the bump 6 are joined. If good contact cannot be made, it is also possible to connect the spot by laser irradiation.

上記構成とした本実施例の液晶表示パネルは、第2図に
示すように、各液晶セルL Cともその両端が、ゲート
・ソース間容量Ccs+  ccs’ を介してスキャ
ンバスSBに接続される。
In the liquid crystal display panel of this embodiment configured as described above, as shown in FIG. 2, both ends of each liquid crystal cell LC are connected to the scan canvas SB via a gate-source capacitance Ccs+ccs'.

従って、スキャンバスSBの電位が正から負に変わって
も、液晶セルの両端の電位は、共に同一方向に同じ値だ
けシフトするので、液晶セルに掛かる電圧は変化しない
Therefore, even if the potential of the scan canvas SB changes from positive to negative, the potentials at both ends of the liquid crystal cell shift by the same value in the same direction, so the voltage applied to the liquid crystal cell does not change.

このように本発明では、従来構成の如< Ccsに起因
する液晶セル電圧の低下がないため、直流成分は存在せ
ず、残像が発生しなくなる。
As described above, in the present invention, there is no drop in the liquid crystal cell voltage caused by Ccs as in the conventional configuration, so there is no DC component and no afterimage occurs.

〔発明の効果〕〔Effect of the invention〕

以上説明した如く本発明によれば、液晶セルに掛かる電
圧の直流成分が除かれるので、残像が発生しなくなる。
As explained above, according to the present invention, the DC component of the voltage applied to the liquid crystal cell is removed, so that no afterimage occurs.

また、本発明で付加したTPTは、今一つのTPTと同
一基板上に形成されるので、単にフォ1−マスクのパタ
ーンを変えるのみでよく、製造工程が複雑化することは
ない。
Further, since the TPT added in the present invention is formed on the same substrate as another TPT, it is sufficient to simply change the pattern of the photo mask, and the manufacturing process is not complicated.

第2図は本発明の原理説明図、 第3図(al, (blは従来の液晶パネルの構成図で
ある。
FIG. 2 is an explanatory diagram of the principle of the present invention, and FIG. 3 (al, (bl) is a configuration diagram of a conventional liquid crystal panel.

図において、■および2ばTPT (薄膜トランジスタ
)で、このうち2は新たにイ」加したT P T、3〜
6はバンブ、G,G’ は制御電極(ケー1・電極)、
S,S’ は第1の被制御電極(ソース電極)、D,D
”は第2の被制御電極(ドレイン)電極、Eは画素電極
、E゛は対向電極、SBはスキャンバス、DBはデータ
バス、Cはコモン電極を示す。
In the figure, ■ and 2 are TPT (thin film transistors), of which 2 are newly added T P T, 3 ~
6 is a bump, G, G' are control electrodes (K1/electrode),
S, S' are the first controlled electrodes (source electrodes), D, D
"" is the second controlled electrode (drain) electrode, E is the pixel electrode, E' is the counter electrode, SB is the scan canvas, DB is the data bus, and C is the common electrode.

Claims (1)

【特許請求の範囲】 対向配置された第1および第2の基板間に液晶セルより
なる複数の画素を薄膜トランジスタと組み合わせてマト
リクス状に配列したアクティブマトリクス型液晶表示装
置の構成において、 前記第1の基板上に、各画素対応の画素電極(E)と、
該画素電極ごとに第1および第2の薄膜トランジスタ(
1、2)と、画素の行対応に配列された複数本のスキャ
ンバス(SB)と、画素の列対応に配列されたデータバ
ス(DB)を設け、且つ、前記第1の薄膜トランジスタ
の制御電極(G)、一方および他方の被制御電極(S)
、(D)をそれぞれ前記スキャンバス、画素電極、デー
タバスに接続するとともに、前記第2の薄膜トランジス
タの制御電極(G’)を前記スキャンバスに接続し、 前記第2の基板上に、前記画素電極に対応して対向電極
(E’)と、各画素の行または列対応にストライプ状の
コモン電極(C)とを設け、前記第2の薄膜トランジス
タの一方の被制御電極を前記対向電極と、他方の被制御
電極を前記コモン電極と、それぞれ柱状電極(3、4、
5、6)により接続してなることを特徴とするアクティ
ブマトリクス型液晶表示装置。
[Scope of Claims] In the structure of an active matrix liquid crystal display device in which a plurality of pixels made of liquid crystal cells are combined with thin film transistors and arranged in a matrix between first and second substrates arranged oppositely, the first On the substrate, a pixel electrode (E) corresponding to each pixel,
A first and a second thin film transistor (
1, 2), a plurality of scan canvases (SB) arranged in correspondence with the rows of pixels, and a data bus (DB) arranged in correspondence with the columns of pixels, and a control electrode of the first thin film transistor. (G), one and the other controlled electrode (S)
, (D) are connected to the scan canvas, the pixel electrode, and the data bus, respectively, and a control electrode (G') of the second thin film transistor is connected to the scan canvas, and the pixel A counter electrode (E') is provided corresponding to the electrode, and a striped common electrode (C) is provided corresponding to the row or column of each pixel, and one controlled electrode of the second thin film transistor is connected to the counter electrode, The other controlled electrode is connected to the common electrode and the columnar electrodes (3, 4,
5, 6) An active matrix liquid crystal display device characterized by being connected by.
JP1115493A 1989-05-08 1989-05-08 Active matrix type liquid crystal display device Pending JPH02293722A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1115493A JPH02293722A (en) 1989-05-08 1989-05-08 Active matrix type liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1115493A JPH02293722A (en) 1989-05-08 1989-05-08 Active matrix type liquid crystal display device

Publications (1)

Publication Number Publication Date
JPH02293722A true JPH02293722A (en) 1990-12-04

Family

ID=14663879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1115493A Pending JPH02293722A (en) 1989-05-08 1989-05-08 Active matrix type liquid crystal display device

Country Status (1)

Country Link
JP (1) JPH02293722A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996000408A1 (en) * 1994-06-24 1996-01-04 Hitachi, Ltd. Active matrix type liquid crystal display device and its driving method
US6198464B1 (en) 1995-01-13 2001-03-06 Hitachi, Ltd. Active matrix type liquid crystal display system and driving method therefor
CN1315002C (en) * 1994-06-24 2007-05-09 株式会社日立制作所 Active matrix liquid crystal display system and its driving method
WO2012147950A1 (en) * 2011-04-28 2012-11-01 シャープ株式会社 Liquid crystal panel, liquid crystal display device, and television receiver

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996000408A1 (en) * 1994-06-24 1996-01-04 Hitachi, Ltd. Active matrix type liquid crystal display device and its driving method
US5854616A (en) * 1994-06-24 1998-12-29 Hitach, Ltd. Active matrix type liquid crystal display system and driving method therefor
US6028578A (en) * 1994-06-24 2000-02-22 Hitachi, Ltd. Active matrix type liquid crystal display system and driving method therefor
KR100360356B1 (en) * 1994-06-24 2003-02-17 가부시끼가이샤 히다치 세이사꾸쇼 Active Matrix Liquid Crystal Display
CN1315002C (en) * 1994-06-24 2007-05-09 株式会社日立制作所 Active matrix liquid crystal display system and its driving method
US6198464B1 (en) 1995-01-13 2001-03-06 Hitachi, Ltd. Active matrix type liquid crystal display system and driving method therefor
WO2012147950A1 (en) * 2011-04-28 2012-11-01 シャープ株式会社 Liquid crystal panel, liquid crystal display device, and television receiver

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