JPH02199830A - Method of checking stability of masking and etching processes making use of sem wave type - Google Patents

Method of checking stability of masking and etching processes making use of sem wave type

Info

Publication number
JPH02199830A
JPH02199830A JP1297237A JP29723789A JPH02199830A JP H02199830 A JPH02199830 A JP H02199830A JP 1297237 A JP1297237 A JP 1297237A JP 29723789 A JP29723789 A JP 29723789A JP H02199830 A JPH02199830 A JP H02199830A
Authority
JP
Japan
Prior art keywords
waveform
secondary electrons
electrons
sem
measured
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1297237A
Other languages
Japanese (ja)
Other versions
JP2537095B2 (en
Inventor
Sun-Woo Park
朴 善宇
Kwang-Shik Son
孫 光植
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of JPH02199830A publication Critical patent/JPH02199830A/en
Application granted granted Critical
Publication of JP2537095B2 publication Critical patent/JP2537095B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: To reduce a processing time by scanning a thin film in a process with electronic lines through the use of SEM and analyzing a waveform made by the discharge of secondary electrons generated on the surface of a fine pattern. CONSTITUTION: When a foreign matter exists in the bottom area of a thin film, etc., a charge-up phenomenon appearing in general is gradually reduced by SEM measuring technique. Thereby the waveform of the bottom area is raised in spite of reducing the number of primary electrons. Then at the time of making the primary electrons to scan the upper part of a sample, the waveform appearing from the thin film where mutually different matters are adjacent to each other generates the secondary electrons at a part the mutually different matters are adjacent to each other. Consequently a contrast difference appears according to the number of the generated secondary electrons and at the time of comparing this contrast difference by the height of waveforms, the thin film and the presence/absence of the foreign matter is recognized. At the time of making the electronic lines to scan a hole obtained by removing an oxide film layer 7 at the central upper part of a silicon substrate 1, the bottom area starts from the same height as a generation starting area. At the time of making the primary electronics to scan a residual hole at the layer 7 at the upper part of the silicon substrate 1, the bottom area of the measured waveform starts at a height lower than the generation starting area to show that the layer 7 remains. As a silicon wafer can be confirmed as it is without damaging by this, economy, time saving and the precision of a process are improved.

Description

【発明の詳細な説明】 確める測定方法に関し、特にSEN装備の電子線をシリ
コンウェーHの薄膜に走査し微細パターン表面からの2
次電子放出による波型を分析することにより、シリコン
ウェーHの損傷なした半導体工程のSEM波型を利用す
るマスキング及びエツチング工程の安定性N認方法に関
する。
[Detailed Description of the Invention] Regarding the measurement method for determining the
This invention relates to a method for verifying the stability of masking and etching processes using SEM waveforms of semiconductor processes in which silicon wafers H are not damaged by analyzing waveforms caused by secondary electron emission.

除去及び残存を確める方法と薄PIA’Jの形成と除去
進行状態を確認する方法があったが、該当薄膜等を工程
過程で採取し破れた断面を拡大検査することではじめて
可能であった。しかし従来の方法に依れば、工程過程の
時間遅延と半導体素子の消耗に依る経済性が低下し正し
い制御が困難に於いて、工程中の薄膜をその状態で破損
せずにSEX装備を使用し電子線を走査し、微細パター
ンの表面で生ずる2次電子放出に依る波型を分析するこ
とにより、工程時間の節約及び正確性とウェーHの消耗
を防ぎ効率と経済性を高めながらマスキング及びエツチ
ング工程の安定性検認方法を提供することにその目的を
有する。
There were methods to confirm the removal and persistence, and methods to confirm the formation of thin PIA'J and the progress of removal, but this was only possible by collecting the thin film during the process and inspecting the torn cross section under magnification. Ta. However, according to the conventional method, the economic efficiency decreases due to the time delay in the process and the consumption of semiconductor elements, and correct control is difficult. However, it is difficult to use SEX equipment without damaging the thin film being processed By scanning the electron beam and analyzing the waveform caused by secondary electron emission that occurs on the surface of the fine pattern, masking and The purpose is to provide a method for verifying the stability of an etching process.

本発明に依る半導体素子のマスキング及びエツチング工
程の安定性確認方法において、 工程状態を確認すべく対象試料上にSEMの電子線、即
ち、1次電子を走査させ、発生するチャージアップ部分
を含む2次電子の波型を測定し、 上記チャージアップ部分を平坦化させ得るa11次電子
の走査を段階的に減じて放出される上記2次電子波型を
測定し、上記最初に走査された1次電子により測定され
た2次電子の波型と、上記1次電子の走査数を段階的に
減し測定された2次電子の波型で始作頭域、底部領域及
び終了領域各々の波型間の変化分の差を測定し。
In the method for confirming the stability of the masking and etching process of semiconductor devices according to the present invention, an electron beam of an SEM, that is, primary electrons, is scanned over the target sample to confirm the process state, and 2 The waveform of the secondary electrons is measured, and the waveform of the secondary electrons emitted is measured by stepwise reducing the scanning of the primary electrons that can flatten the charge-up portion, and the waveform of the secondary electrons emitted is measured. The waveforms of secondary electrons measured by electrons and the waveforms of secondary electrons measured by decreasing the number of scans of the primary electrons in stages are the waveforms of each of the starting region, bottom region, and end region. Measure the difference in change between.

島 試料土の異物質の有否を検出するSEMの波型を利用す
るマスキング及びエツチング工程の安定性確認方法を特
徴と成す。
The present invention is characterized by a method for checking the stability of masking and etching processes that utilizes SEM waveforms to detect the presence or absence of foreign substances in island sample soil.

以下、本発明3添付する図面と参考にし詳細に説明をす
ると次の如くである。
Hereinafter, the present invention 3 will be described in detail with reference to the accompanying drawings.

第1図は、SEM装備を使用し薄膜を測定した波型の各
部分状態説明図で、大きくは始作領域と底部領域および
終了領域に区分されることが′できるが、2つのピーク
の間に1つの底部領域が存する。接続ポール(Cont
act Ho1e)を検査する場合波型の底部領域は接
続ホールの底部領域に該当することになるが、該底部領
域は比較的多くの1次電子が走査される際、図示される
如く試料で2次電子が発生されることに成るが、このご
とき2次電子はチャージアップ(Charge Up)
といわれる現象により常に上昇する推移を表すようにな
る。
Figure 1 is an explanatory diagram of the state of each part of the waveform obtained by measuring a thin film using SEM equipment. It can be roughly divided into a starting region, a bottom region, and an ending region, but between the two peaks. There is one bottom region. Connection pole (Cont
When inspecting act Hole), the bottom area of the waveform corresponds to the bottom area of the connection hole, but when a relatively large number of primary electrons are scanned, the bottom area of the sample is Secondary electrons will be generated, but these secondary electrons are charged up (Charge Up)
Due to a phenomenon called , it comes to represent a constantly rising trend.

上記説明の如(SEX装備を利用し測定された実際の波
型図に於いては底部領域で一般的に観測された波型のチ
ャージアップ現象をみることができ、2次電子が不足な
場所には陥没の地域が現わされていることが判る。した
がって本発明では試料に到る1次電子の数を徐々に減し
底部領域チャージアップ現象を減した後、減少された1
次電子に依り底部領域を均一化させた後にも底部領域が
上昇推勢になればt!続ホールの底部領域に異物質が存
在することを確めることが出来る様に応用されたもので
ある。
As explained above (in the actual waveform diagram measured using SEX equipment, the charge-up phenomenon of the waveform generally observed in the bottom region can be seen, and the area where secondary electrons are insufficient) It can be seen that a depressed area appears in the figure. Therefore, in the present invention, after gradually reducing the number of primary electrons reaching the sample and reducing the charge-up phenomenon in the bottom region, the reduced 1
If the bottom region continues to rise even after the bottom region is made uniform by the next electron, t! This method was applied to confirm the presence of foreign substances in the bottom region of the continuation hole.

即ち、2A、2B及び2C図はSEN装備を利用し試料
に判る1次電子の数を段階的に減して測定される2次電
子の波型を表したのである。即ち、第2A図に於いては
1次電子の数を5XIO”″(A)にした状態で、第2
B図は1次電子の数を1.8xlO(A)にした状態、
且つ第2C図は1次電子の数を0.8X 10””(A
)にした状態を図示したものである。第2A図は底部領
域に高くチャージアップされた波型、第2B図は底部領
域に低くチャージアップされた波型、第2C図は底部領
域にほぼ平坦なる波型の現われを認められるが、上記の
第2A図、第2B図及び第2C図は異物質の無い試料波
型を察し接続ホール等の底部領域の状態を現わしたもの
である。
That is, Figures 2A, 2B, and 2C represent the waveforms of secondary electrons measured by gradually reducing the number of primary electrons visible in the sample using SEN equipment. That is, in Fig. 2A, with the number of primary electrons set to 5XIO"" (A), the second
Diagram B shows the state where the number of primary electrons is 1.8xlO(A),
In addition, in Figure 2C, the number of primary electrons is 0.8X 10"" (A
). Figure 2A shows a highly charged waveform in the bottom region, Figure 2B shows a low charged waveform in the bottom region, and Figure 2C shows an almost flat waveform in the bottom region. FIGS. 2A, 2B, and 2C show the state of the bottom area of connection holes and the like by observing sample waveforms free of foreign substances.

上記方法で知り得る如く、もし測定をなそうとする薄膜
等の底部領域に異物質が存在する場合にはSEX測定技
術に依り一般的に現われるチャージアップ現象を徐々に
滅するために1次電子の数を減しても底部領域の波型が
上昇されるようになる。因って測定しようとする1Mの
底部領域に異物質が存することを容易に認めることが出
来るようになる。
As can be seen with the above method, if there is a foreign substance in the bottom region of the thin film, etc. to be measured, the primary electrons are Even if the number is reduced, the waveform in the bottom region is raised. Therefore, the presence of foreign substances in the bottom region of 1M to be measured can be easily recognized.

一方、相互に異る物質が接している薄膜から現われる波
型は1次電子を試料の上部に走査させる際、互いに異な
る物質が相い隣り合う部分で2次電子が発生する。従っ
て、発生された2次電子の数に従いコントる。
On the other hand, when a waveform appears from a thin film where different materials are in contact with each other, when primary electrons are scanned over the sample, secondary electrons are generated in areas where different materials are adjacent to each other. Therefore, control is performed according to the number of secondary electrons generated.

第3A図はシリコン基板(1) 中央上部の、例をあげ
て酸化11Jii!(7)が除去されたホールの断面を
表し、ここに電子線を走査させる際、第3C図の図示さ
れた波型と同じく底部領域は始作領域と同じ高さより始
めることを表したものである。また、第38図は、シリ
コン基板(1)上部の酸化膜層<7)の残りのホールの
断面を表し、1次電子を走査させる際、第3Cて拡大写
真でも観測が不可能である場合にも本発明に依る確認方
法で波型を分析することにより比較的詳しく知り得るこ
とが出来る。即ち、第4図はシリコン基板(1)上部に
第1ポリ層(2)と酸1ヒ物スペーサ(8)が有るホー
ルの断面図及びその波型を表したもので、ピークを把握
しIPOLY酸化物層(3)の縁部と第1ポリ層(2)
の縁部等を知り得ることが出来る。然る後バンパー、即
ち異物質の有る部分と酸化物スペーサ(8)の位置とは
波型分析を通じて確認が出来る。
Figure 3A shows an example of oxidation 11Jii! on the upper center of the silicon substrate (1). (7) represents the cross section of the removed hole, and when scanning the electron beam here, the bottom area starts from the same height as the starting area, similar to the waveform shown in Figure 3C. be. In addition, Fig. 38 shows the cross section of the remaining holes in the oxide film layer <7) on the top of the silicon substrate (1), and when scanning with primary electrons, it is impossible to observe even in the enlarged photograph in 3C. However, by analyzing the waveform using the confirmation method according to the present invention, relatively detailed information can be obtained. That is, Figure 4 shows a cross-sectional view of a hole with a first poly layer (2) and an acid-1 arsenide spacer (8) on the top of a silicon substrate (1), and its waveform. Edges of oxide layer (3) and first poly layer (2)
It is possible to know the edges etc. After that, the location of the bumper, ie, the part with the foreign material, and the oxide spacer (8) can be confirmed through waveform analysis.

また、表面の拡大写真では知ることの出来ない、観測を
成したいとする物質が他の物質で履われている場合に本
発明のSEM装備を利用する確認方法に依り波型を観測
することにより異物質や薄膜の存在4否を確認できる。
In addition, if the material you wish to observe is covered with another material, which cannot be seen from an enlarged photograph of the surface, it is possible to observe the waveform using the confirmation method using the SEM equipment of the present invention. The presence or absence of foreign substances or thin films can be confirmed.

即第5図は、シリコン基板(1)上部に第1ポリ層(2
)を沈着し、その上にIPOLY酸化物層(3)を均一
なる厚さで成した試料の断面図及びその波型を表したも
ので、実際に断面で見る如く異物質が有る部分a−b、
c−d、 e−f及びg−h”は異物質のない部分″b
−c及びf−g”よりやや高く成る。このような上部面
をSEM装備で測定した波型は図示の如くである。これ
を分析して見れば第5図の如く、異物質が有る部分はピ
ーク波型が表われることにより、結果的に第1ポリ層(
2)上部に異物質があることを認めることが出来る。(
ここにおいて異物質の無い部分の正常的な波型はピーク
波型のす、c、f及びgが表われない)。
Figure 5 shows a first poly layer (2) on top of a silicon substrate (1).
) is deposited on top of which an IPOLY oxide layer (3) is formed with a uniform thickness, and its waveform is shown. b,
c-d, e-f and g-h” are foreign substance-free parts “b”
-c and f-g". The waveform measured by SEM equipment on such an upper surface is as shown in the figure. If you analyze this, you can see that there is a foreign substance in the area as shown in Figure 5. As a result, the first poly layer (
2) It can be recognized that there is a foreign substance in the upper part. (
Here, the peak waveforms (S, C, F, and G do not appear) are normal waveforms in areas without foreign substances.

また、ホールの壁面と同一なる物質がエツジ工程の後で
も安全に除かれなか、否かの4否を波型分析を通じ確認
が出来る。即ち、第6A図はハ シリコンウェーM(1)上部にBPSG (6)と第1
ポリ層(2)を沈着しその上にフォトレジストN(9)
を沈着させた後ホールの面積程フォトレジスト(9)を
安全に除いた状態の断面図である。第6B図はホール内
部にフォトレジストが少し残っている状態の断面図で、
これらに対し、本発明の確認方法により各々波型を測定
した結果、第6C図と第6D図と同じ波型を得ることか
出来た。従って、本発明によりこの2つの波型を比較し
てみれば、底面部分波型の上昇する比率が顕著に区別さ
れることを分る如く薄膜が安全に除かれるかその残存の
可否を明らかに知り得る。
In addition, it can be confirmed through waveform analysis whether the same material as the wall of the hole can be safely removed even after the edge process. That is, in FIG. 6A, BPSG (6) and the first
Deposit a poly layer (2) on top of which photoresist N (9)
FIG. 3 is a cross-sectional view with the photoresist (9) safely removed to cover the area of the hole after the photoresist (9) has been deposited. Figure 6B is a cross-sectional view of a state where a small amount of photoresist remains inside the hole.
As a result of measuring the waveforms of these using the confirmation method of the present invention, it was possible to obtain the same waveforms as those shown in FIGS. 6C and 6D. Therefore, if we compare these two waveforms according to the present invention, we can see that the increasing ratio of the bottom partial waveform is significantly different, which makes it clear whether the thin film can be safely removed or whether it remains. I can know.

また、本発明の確認方法によれば、ウェット(lilE
T)、ドライ(DRY)エッチ等により成るホールの縁
部の巾を知ることが出来る。即ち、第7A図はウェット
とドライ接続エッチより成るホール上部の一定部分が除
かれる状態の断面図で、電子線を走査し測定された波型
は第7B図と同じ。
Furthermore, according to the confirmation method of the present invention, wet (liilE)
T), the width of the edge of the hole formed by dry etching, etc. can be known. That is, FIG. 7A is a cross-sectional view with a certain portion above the hole formed by wet and dry connection etching removed, and the waveform measured by scanning with an electron beam is the same as FIG. 7B.

測定された波型のピークの位!より第7A図の外径と内
径を測定することが出来る。
The peak position of the measured waveform! From this, the outer diameter and inner diameter shown in FIG. 7A can be measured.

上記の如く本発明の確認方法として波型を測定の結果、
従来のSEN装備を使用し拡大写真で表面を検査できな
かったことを本発明によればハ 簡単に明らかな確認を成すことが出来、シリコンウェー
バを破損することなしにそのままの状態で確認すること
だ出来るため経済性及び時間の節約と工程の正確性を高
めることが出来る。
As described above, as a method for confirming the present invention, the waveform was measured, and the results were as follows.
According to the present invention, it is possible to easily and clearly confirm the surface inspection using enlarged photographs using conventional SEN equipment, and it is possible to confirm the silicon wafer in its original state without damaging it. This can save economic efficiency, save time, and improve process accuracy.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、薄膜に対するSEXの測定波型の型態からチ
ャージアップ状態を示す波型図。 第2A[N、2B図及び2CI]は、1次電子の数を段
階的に減少することによる2次電子の波型図。 第3A図は、酸化膜が除去されたホールの断面図。 第3B図は、酸化膜が残っているホールの断面図。 第3C図は、本発明の方法により第3A図の酸化膜が除
かれたホールで5E)4による測定波型図。 第3D図は、本発明の方法により第3B図の酸化膜が存
在するホールでSEMによる測定波型図。 第4M2は、第1ポリ層とスペーサが有するホールの断
面とその波型口。 第5図は、IPOLY酸化物層内部に異物質がある棒の
断面とその波型図。 第6A図は、フォトレジストが除去されたホールの断面
図。 第6B図は、フォトレジストが残っているホールの断面
図。 第6C図は、本発明の方法により第6A図のフォトレジ
ストが除かれたホールの測定波型図。 第6D図は、本発明の方法により第6B図のフォトレジ
ストが残っているホールの測定波型図。 第7A図は、ウェット、ドライエッチによりホール上部
が一部除がれな断面図。 第7B図は本発明の方法により第7A図のSEMに依る
測定波型図。 1:シリコン基板 2:第1ポリ層(薄膜2) 3 : IPOLYPi化物層(INTERPOLY 
0XIDE LAYEl’(1)4;第2ポリ層 5二負荷(LO^D)酸化物層 6  :  BPSG  (BORO−PHO5PO5
ILICA  GL八へ5)7:a化膜層 8ニスペーサ(SPACER)酸fヒ物9:フォトレジ
スト
FIG. 1 is a waveform diagram showing a charge-up state based on the SEX measurement waveform type for a thin film. 2A [N, 2B and 2CI] is a waveform diagram of secondary electrons obtained by decreasing the number of primary electrons in stages. FIG. 3A is a cross-sectional view of the hole from which the oxide film has been removed. FIG. 3B is a cross-sectional view of the hole where the oxide film remains. FIG. 3C is a waveform diagram measured by 5E)4 in a hole from which the oxide film of FIG. 3A has been removed by the method of the present invention. FIG. 3D is a waveform diagram measured by SEM in the hole where the oxide film of FIG. 3B is present by the method of the present invention. 4th M2 is the cross section of the hole in the first poly layer and the spacer and its corrugated opening. FIG. 5 is a cross section of a rod with foreign substances inside the IPOLY oxide layer and its waveform diagram. FIG. 6A is a cross-sectional view of the hole from which the photoresist has been removed. FIG. 6B is a cross-sectional view of the hole with remaining photoresist. FIG. 6C is a measured waveform diagram of a hole from which the photoresist of FIG. 6A is removed by the method of the present invention. FIG. 6D is a measured waveform diagram of holes left in the photoresist of FIG. 6B by the method of the present invention. FIG. 7A is a cross-sectional view in which the upper part of the hole is partially removed by wet and dry etching. FIG. 7B is a waveform diagram measured by the SEM of FIG. 7A according to the method of the present invention. 1: Silicon substrate 2: First poly layer (thin film 2) 3: IPOLY Pi compound layer (INTERPOLY
0XIDE LAYEl' (1) 4; 2nd poly layer 5 double loading (LO^D) oxide layer 6: BPSG (BORO-PHO5PO5
ILICA GL 8 5) 7: a film layer 8 spacer (SPACER) acid f arsenic 9: photoresist

Claims (3)

【特許請求の範囲】[Claims] (1)半導体素子のマスキング及びエッチング工程の安
定性確認方法において、 工程状態を確認しうる対象試料上にSEMの電子線、即
ち、一次電子を走査させて発生するチャージアップ部分
を含む2次電子の波型を測定し、 上記チャージアップ部分を平坦化させ得る様1次電子の
走査数を段階的に減し放出される上記2次電子波型を測
定し、上記最初に走査される1次電子に依り測定される
2次電子の波型と、上記1次電子の走査数を段階的に減
し測定される2次電子の波型での始作領域、底部領域及
び終了領域各々の波型の間の変化分に対する差を比較し
試料上の異物質の有無を検出するSEMの波型を用いる
マスキング及びエッチング工程の安全性確認方法。
(1) In a method for confirming the stability of masking and etching processes for semiconductor devices, secondary electrons containing charge-up portions are generated by scanning an SEM electron beam, that is, primary electrons, over a target sample whose process status can be confirmed. The waveform of the secondary electrons emitted is measured by decreasing the number of scans of the primary electrons step by step so as to flatten the charge-up portion, and the waveform of the secondary electrons emitted is measured. The waveform of secondary electrons measured by electrons, and the waveforms of the secondary electrons measured by decreasing the number of scans of the primary electrons in stages, in each of the starting region, bottom region, and end region. A method for confirming the safety of masking and etching processes using SEM waveforms to detect the presence or absence of foreign substances on a sample by comparing differences in changes between molds.
(2)第1項において、 上記段階的に減し、走査される上記1次電子の走査数は
1段階で5×10^−^1^2(A)、2段階に1.8
×10^−^1^2(A)及び3段階に0.8×10^
−^1^2(A)に段階的に減し測定することを特徴と
するSEMの波型を用いるマスキング及びエッチング工
程の安定性確認方法。
(2) In the first term, the number of scans of the primary electrons to be decreased and scanned in stages is 5 x 10^-^1^2 (A) in one stage, and 1.8 in two stages.
×10^-^1^2 (A) and 0.8 × 10^ in 3 stages
- A method for confirming the stability of a masking and etching process using an SEM waveform, which is characterized by stepwise reduction in measurement to ^1^2 (A).
(3)第1項において、 上記2次電子の波型での上記始作領域、底部領域及び終
了領域各々の波型の高さに対する変化分に従いマスクパ
ターンの形像及び角部分を検出することを特徴とするS
EMの波型を利用するマスキング及びエッチング工程の
安定性の確認方法。
(3) In item 1, detecting the shape and corner portion of the mask pattern according to changes in the waveform height of each of the starting region, bottom region, and end region in the waveform of the secondary electrons. S characterized by
A method of confirming the stability of masking and etching processes using EM waveforms.
JP1297237A 1988-11-15 1989-11-14 Masking and etching process stability confirmation method using SEM wave pattern Expired - Fee Related JP2537095B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019880014996A KR920001876B1 (en) 1988-11-15 1988-11-15 Method of confirming stability of masking and etching process using sem waveshape
KR88-14996 1988-11-15

Publications (2)

Publication Number Publication Date
JPH02199830A true JPH02199830A (en) 1990-08-08
JP2537095B2 JP2537095B2 (en) 1996-09-25

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Application Number Title Priority Date Filing Date
JP1297237A Expired - Fee Related JP2537095B2 (en) 1988-11-15 1989-11-14 Masking and etching process stability confirmation method using SEM wave pattern

Country Status (2)

Country Link
JP (1) JP2537095B2 (en)
KR (1) KR920001876B1 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231931A (en) * 1985-08-05 1987-02-10 Nippon Telegr & Teleph Corp <Ntt> Electron beam radiation device and test and measurement by said device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231931A (en) * 1985-08-05 1987-02-10 Nippon Telegr & Teleph Corp <Ntt> Electron beam radiation device and test and measurement by said device

Also Published As

Publication number Publication date
KR900008611A (en) 1990-06-04
KR920001876B1 (en) 1992-03-06
JP2537095B2 (en) 1996-09-25

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