JPH02191350A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02191350A JPH02191350A JP1320182A JP32018289A JPH02191350A JP H02191350 A JPH02191350 A JP H02191350A JP 1320182 A JP1320182 A JP 1320182A JP 32018289 A JP32018289 A JP 32018289A JP H02191350 A JPH02191350 A JP H02191350A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead
- lead frame
- bath
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000011347 resin Substances 0.000 claims abstract description 37
- 229920005989 resin Polymers 0.000 claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 12
- 239000007788 liquid Substances 0.000 claims abstract description 9
- 238000007789 sealing Methods 0.000 claims description 8
- 238000003825 pressing Methods 0.000 claims 1
- 238000000465 moulding Methods 0.000 description 5
- 238000001721 transfer moulding Methods 0.000 description 3
- 238000005336 cracking Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 238000010125 resin casting Methods 0.000 description 1
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
く技術分野〉
本発明は半導体装置の製造方法に関し、特に半導体チッ
プの樹脂封止方法の改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a method for manufacturing a semiconductor device, and particularly to an improvement in a method for resin-sealing a semiconductor chip.
〈従来技術〉
半導体装置は、回路素子を作り込んだチップ自体及び該
チップをリードフレームにポンディングしたワイヤボン
ディング部を保護し、且つ外型を所定の形状に仕上げる
ため、従来から大きくはガラス封止方式又は樹脂封止方
式のいずれかが採用されている。後者の樹脂封止方式に
はトランスファモールド型、液状樹脂注型及び液状樹脂
デイツプ型等があシ、これらの封止方式の中で液状樹脂
デイプ型が最も簡単な設備で実施することができ、量産
性の面からも優れている。しかし液状樹脂デイツプ方式
で封止された装置は、樹脂の最終形状は樹脂の表面張力
を利用したものであるため、形状の規制等の制御が施こ
されず、不揃になるという欠点があった。<Prior art> Semiconductor devices have traditionally been made with glass seals in order to protect the chip itself containing circuit elements and the wire bonding part where the chip is bonded to the lead frame, and to finish the outer mold into a predetermined shape. Either a sealing method or a resin sealing method is adopted. The latter resin sealing method includes transfer molding, liquid resin casting, liquid resin dip type, etc. Among these sealing methods, liquid resin dip type can be carried out with the simplest equipment. It is also excellent in terms of mass production. However, devices sealed using the liquid resin dip method have the disadvantage that the final shape of the resin is determined by utilizing the surface tension of the resin, so there is no control such as regulating the shape, resulting in irregularities. Ta.
昨今の電子部品はよシ薄型・小型・軽量であることが要
求され、半導体装置についても薄い外型をもつことが要
求されるため、外型特に厚み規制することができるトラ
ンスファモールド或いは液状樹脂注型が用いられている
。しかし厚さ規制ができるｙ面、樹脂封止方式では次の
ような問題がある。Today's electronic components are required to be thinner, smaller, and lighter, and semiconductor devices are also required to have a thin outer mold. type is used. However, the y-plane resin sealing method, which allows thickness regulation, has the following problems.
■ 厚み規制を施すために樹脂の注入が困難で、時間が
かかカ、また注入時に巻き込まれた気泡等が抜けきれず
製品としての歩留が悪い。■ Injecting resin is difficult and time consuming due to thickness regulations, and the yield of the product is poor because air bubbles caught during injection cannot be removed.
■ 厚さが限られるため、注入する樹脂とフレームとの
位置決めが困難で、フレーム露出という事態に至る惧れ
がある。■ Due to the limited thickness, it is difficult to position the resin to be injected and the frame, which may lead to the frame being exposed.
またトランスファモールドにおいても次のような問題が
ある。Transfer molding also has the following problems.
■ 設備が大がかりになって、市場の要求に対応するの
に時間が掛る。■ Equipment becomes large-scale and it takes time to respond to market demands.
■ モールド後、樹脂パリの除去、金型の掃除等に手間
が掛る。■ After molding, it takes time to remove resin particles and clean the mold.
■ 樹脂層が薄いため、モールド後に金型から離型する
際、製品を破損し易い。■ Because the resin layer is thin, the product is easily damaged when removed from the mold after molding.
■ モールド作業において、チップを封止するために要
する樹脂量に比べて廃棄される樹脂量が多く経済性が悪
い。■ In the molding process, the amount of resin that is discarded is large compared to the amount of resin required to seal the chip, making it uneconomical.
〈発明の目的〉
本発明は上記従来の樹脂封止型半導体装置の製造方法に
おける問題点に濫みてなされたもので、ディッピング方
式等の簡単な樹脂封止構造において外型の厚み規制を施
すことができる製造方法を提供する。<Purpose of the Invention> The present invention has been made in view of the problems in the conventional resin-sealed semiconductor device manufacturing method described above, and it is an object of the present invention to regulate the thickness of the outer mold in a simple resin-sealed structure such as a dipping method. We provide a manufacturing method that allows
〈実施例〉
第１図は、２本のリード端子１ａ、１ｂ１ｆ：１対とし
て一定ピッチでリード端子が多数形成されたリードフレ
ーム１を示し、該リードフレーム１の一方リード端子１
ａの先端にはＬＥＤ等の半導チップ２がダイボンドされ
、該チップ２の電極と他方のリード端子１ｂとの間には
ワイヤ３がポンディングされて電気的接続されている。<Example> Fig. 1 shows a lead frame 1 in which a large number of lead terminals are formed at a constant pitch as a pair of two lead terminals 1a and 1b1f.
A semiconductor chip 2 such as an LED is die-bonded to the tip of a, and a wire 3 is bonded between the electrode of the chip 2 and the other lead terminal 1b for electrical connection.
上述のようにリードフレームｌにダイボンドされたチッ
プ２及びワイヤ３は、第２図に示す如く各リード端子対
を単位として樹脂４によって封止され、外部から保護さ
れる。該樹脂封止のための工程は、ダイボンド及びワイ
ヤボンドされたリードフレーム１を、液状樹脂５を溜め
た槽の中に、少なくともチップ２の部分が浸漬するよう
に沈めて行われる。The chips 2 and wires 3 die-bonded to the lead frame 1 as described above are sealed with resin 4 in units of lead terminal pairs as shown in FIG. 2, and are protected from the outside. The process for resin sealing is performed by submerging the die-bonded and wire-bonded lead frame 1 into a tank containing liquid resin 5 so that at least a portion of the chip 2 is immersed.
樹脂溜め槽から引き上げた状態では、第３図に示す如く
樹脂５の粘性、表面張力等によった球面状を呈する。従
って次に強制的に成型するため、第４図に示す如く間隔
でか形成され九治具６，６間に、上記樹脂溜め槽から引
き上げられたリードフレームｌ’ｔ−１間隔ｌに樹脂部
４が位置するように挾み込んで硬化させる。硬化後リー
ドフレーム１を治具６．６から外し、樹脂の外型を第５
図に示す如く間隔ｌの平行な平面をもった形状４′に加
工する。When lifted out of the resin reservoir, it assumes a spherical shape due to the viscosity, surface tension, etc. of the resin 5, as shown in FIG. Therefore, in order to perform forced molding next time, the resin parts are formed at intervals l't-1 between the nine jigs 6 and 6, as shown in FIG. Insert it so that 4 is in the position and let it harden. After curing, the lead frame 1 is removed from the jig 6.6, and the outer mold of the resin is
As shown in the figure, it is processed into a shape 4' having parallel planes spaced apart by l.
く効 果〉
以上本発明によれば、樹脂モールドの特徴を損うことな
く、また大掛シな設備を要することなく、−括して多数
の半導体装置の外型を揃えてその薄型化を図ることがで
きる。また従来のトランスファモールドのようにパリを
生じることもなく、簡単な作業によって行うことができ
るものである。Effects> As described above, according to the present invention, the outer molds of a large number of semiconductor devices can be made uniform and their thickness can be reduced without impairing the characteristics of the resin mold or requiring large-scale equipment. can be achieved. Further, unlike conventional transfer molding, no cracking occurs, and the molding can be performed by simple operations.
第１図乃至第５図は本発明による一実施例の半導体装置
製造工程を説明するため正面図及び側面図である。
１：リードフレーム
２：チップ
３：ワ
イヤ
４：樹脂
５：液状樹脂
６：治具1 to 5 are a front view and a side view for explaining the manufacturing process of a semiconductor device according to an embodiment of the present invention. 1: Lead frame 2: Chip 3: Wire 4: Resin 5: Liquid resin 6: Jig
Claims (1)
成したリードフレームのそれぞれ一方のリード端に半導
体チップをボンディングし、該半導体チップ上の電極と
他の各リード端との間をワイヤにより電気的接続してな
り、リードフレームのこれらリード端を液状樹脂溜めに
浸漬し引上げて各１対のリード端子のリード端部にそれ
ぞれ樹脂球を形成し、前記樹脂球の樹脂が硬化する過程
で前記樹脂球を平板押圧することにより、前記各１対の
リード端子のリード端部に平行平面を有する樹脂封止体
を形成してなることを特徴とする半導体装置の製造方法
。1. Bond a semiconductor chip to each lead end of a lead frame in which a large number of lead terminals each consisting of a pair of two lead terminals are formed, and connect a wire between the electrode on the semiconductor chip and each other lead end. The lead ends of the lead frame are immersed in a liquid resin reservoir and pulled up to form resin balls at the lead ends of each pair of lead terminals, and the resin of the resin balls hardens. A method for manufacturing a semiconductor device, characterized in that a resin sealing body having a parallel plane is formed at the lead end portion of each pair of lead terminals by pressing the resin ball into a flat plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1320182A JPH02191350A (en) | 1989-12-08 | 1989-12-08 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1320182A JPH02191350A (en) | 1989-12-08 | 1989-12-08 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02191350A true JPH02191350A (en) | 1990-07-27 |
Family
ID=18118614
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1320182A Pending JPH02191350A (en) | 1989-12-08 | 1989-12-08 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02191350A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5670629A (en) * | 1979-11-14 | 1981-06-12 | Fujitsu Ltd | Method of sheathing resin for electronic part |
| JPS5795605A (en) * | 1980-12-05 | 1982-06-14 | Tdk Electronics Co Ltd | Method of coating electronic part |
| JPS5887834A (en) * | 1981-11-20 | 1983-05-25 | Ricoh Elemex Corp | Resin sealing of semiconductor device |
-
1989
- 1989-12-08 JP JP1320182A patent/JPH02191350A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5670629A (en) * | 1979-11-14 | 1981-06-12 | Fujitsu Ltd | Method of sheathing resin for electronic part |
| JPS5795605A (en) * | 1980-12-05 | 1982-06-14 | Tdk Electronics Co Ltd | Method of coating electronic part |
| JPS5887834A (en) * | 1981-11-20 | 1983-05-25 | Ricoh Elemex Corp | Resin sealing of semiconductor device |
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