JPH02159722A - Device for abrading wafer and positioning jig used for such device - Google Patents
Device for abrading wafer and positioning jig used for such deviceInfo
- Publication number
- JPH02159722A JPH02159722A JP63313848A JP31384888A JPH02159722A JP H02159722 A JPH02159722 A JP H02159722A JP 63313848 A JP63313848 A JP 63313848A JP 31384888 A JP31384888 A JP 31384888A JP H02159722 A JPH02159722 A JP H02159722A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- center
- plate
- polishing
- orientation flat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005498 polishing Methods 0.000 claims description 63
- 239000004065 semiconductor Substances 0.000 claims description 17
- 239000004744 fabric Substances 0.000 claims description 8
- 238000000034 method Methods 0.000 abstract description 14
- 235000012431 wafers Nutrition 0.000 description 97
- 230000000694 effects Effects 0.000 description 6
- 238000003825 pressing Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000007517 polishing process Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000004745 nonwoven fabric Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000006061 abrasive grain Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000008119 colloidal silica Substances 0.000 description 1
- 239000000110 cooling liquid Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Landscapes
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
【発明の詳細な説明】
「産業上の利用分野Ｊ
本発明は、メカノケミカルポリッシング法に基づいて半
導体ウェーハな高精度に鏡面研磨する為の毎葉式研磨装
置及び該装置に使用される位置決め治具に係り、オリフ
ラを持つ不完全円形又は僅かにテーパな有する半導体ウ
ェー／＼を高平坦状に鏡面研磨する為の毎葉式研磨装置
及び該装置に使用される位置決め治具に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field J] The present invention relates to a single-leaf type polishing device for highly accurate mirror polishing of semiconductor wafers based on a mechanochemical polishing method, and a positioning tool used in the device. The present invention relates to a single-leaf type polishing device for mirror-polishing an incompletely circular or slightly tapered semiconductor wafer with an orientation flat to a highly flat surface, and a positioning jig used in the device.
「従来の技術」
従来より、ダイオード、トランジスタ、ＩＣ（集積回路
）、ＬＳＩ（大規模集積回路）等の半導体装置を製造す
る為の基体となるべき半導体つ工−ハは、シリ、コン、
ゲルマニウム等の半ｉ体単結晶インゴットをスライスし
てウェーハ化した後、更にラップ並びにエツチングし、
次いでその少なくとも一側表面をいわゆるメカノケミカ
ルポリッシング法と呼ばれる研磨方法（機械的研磨と化
学（電解）研磨を組み合わせた研磨方法）に基づいて鏡
面研磨する事により形成される。``Prior art'' Traditionally, semiconductor manufacturing, which is the base for manufacturing semiconductor devices such as diodes, transistors, ICs (integrated circuits), and LSIs (large-scale integrated circuits), has been made using silicon, silicon, silicon, etc.
After slicing a semi-i-body single crystal ingot of germanium etc. into wafers, it is further lapped and etched,
Next, at least one surface thereof is mirror-polished using a so-called mechanochemical polishing method (a polishing method that combines mechanical polishing and chemical (electrolytic) polishing).
かかる研磨装置は例えば第２図に示すように、」二面に
研磨布１が貼設され外部よりの駆動力を受けて回転する
ターンテーブルと、該研磨布貼設面上に接触対峙し、下
面に半導体ウェーハ３を固定させたプレート４と、加圧
軸５１を利用して該プレート４の上面側より押圧力を付
勢するマウントヘッドとからなり、研磨布面上に数百ｇ
／ｃｒｎ’前後の押圧力でウェーハを圧接させた状態で
、５ｉ０２等の砥粒な含む化学研磨剤を分散させつつ前
記定盤とプレートを回転させながら、ウェーハと研磨布
間に生せしめる相対的摺擦連動により鏡面研磨を行うよ
うに構成している。Such a polishing apparatus, for example, as shown in FIG. 2, has a turntable which has polishing cloths 1 pasted on its two sides and rotates under external driving force, and is in contact with and confronts the surface on which the polishing cloths are pasted; Consisting of a plate 4 with a semiconductor wafer 3 fixed to its lower surface, and a mount head that applies a pressing force from the upper surface of the plate 4 using a pressure shaft 51, several hundred grams are applied onto the surface of the polishing cloth.
While the wafer is pressed against the wafer with a pressing force of around /crn', the surface plate and the plate are rotated while dispersing a chemical polishing agent containing abrasive grains such as 5i02, and a relative force is created between the wafer and the polishing cloth. It is configured to perform mirror polishing by interlocking sliding and rubbing.
そして前記装置においては量産性の向上を図る為に、従
来より前記プレート４に保持固定させるウェーハな、プ
レートの回転軸として機能する加圧軸５１を中心として
対称位置に複数枚配置するように構成していた（以下複
葉式という、尚第２図は本発明の詳細な説明に利用する
ために、ウェーハを一枚貼付した状態が画かれている。In order to improve mass productivity, the apparatus is conventionally configured to arrange a plurality of wafers held and fixed on the plate 4 at symmetrical positions with respect to the pressurizing shaft 51, which functions as the rotation axis of the plate. (hereinafter referred to as a "biplane type"; FIG. 2 shows a state in which a single wafer is attached for the purpose of explaining the present invention in detail.
）しかしながら前記プレート４に複数のウェーハを保持
固定させる構造では、近年のようにウェーハの大口径化
が進むに比例してプレートが大型化し、該プレートに均
等に押圧力を付勢するのが困難になるとともに、該プレ
ートと研磨布間の平行度維持も困難になり、結果として
ウェーハ表面の鏡面仕上げ精度が低下し、更に前記プレ
ートに固定されるウェーハ相互間には通常微小な厚肉差
があるので、プレート自体が傾動したり、押圧力の圧力
分布差が生じ、鏡面仕上げ精度の向上に困難がある。) However, in the structure in which a plurality of wafers are held and fixed on the plate 4, as the diameter of wafers has increased in recent years, the size of the plate has increased in proportion, and it has become difficult to apply pressing force evenly to the plate. Along with this, it becomes difficult to maintain the parallelism between the plate and the polishing cloth, resulting in a decrease in the mirror finish accuracy of the wafer surface, and furthermore, there is usually a minute difference in thickness between the wafers fixed to the plate. As a result, the plate itself may tilt or a difference in the pressure distribution of the pressing force may occur, making it difficult to improve mirror finishing accuracy.
このような背景により、ウェーハの大口径化に対応する
為に、前記プレートに複数のウェー／＼を固定する車な
く、プレートの回転軸と同心状に一枚のウェーハのみを
、言い換えればプレートの回転軸とウェーハの半径中心
を一致させて一枚のウェーハのみをプレートに固定させ
る方法に移行しつつある。（以下毎葉式という）
［発明が解決しようとする課題」
しかしながら前記のような毎葉式研磨方法を採用した場
合、従来の複葉式では現出されなかった種々の問題点が
現出してくる。Against this background, in order to cope with the increase in the diameter of wafers, there is no wheel for fixing multiple wafers to the plate, and only one wafer is fixed concentrically to the rotation axis of the plate. There is a shift to a method in which only one wafer is fixed to a plate by aligning the rotational axis with the radial center of the wafer. (hereinafter referred to as the biplane polishing method) [Problems to be solved by the invention] However, when the above-mentioned biplane polishing method is adopted, various problems that do not occur with the conventional biplane polishing method arise. .
即ちその第１点は、ウェーハのは゛とんどはつ工−ハの
表裏両面が高度な平行度を維持しているものではなく、
僅かにテーパ状になっているものが多い為に、該−枚の
ウェーハのみをプレートに固定させた場合、複葉式にお
けるテーパの修正効果はなく、材料ウェーハのテーパが
研磨後にも残存してしまうため、高平坦度で且つ高平行
度なウェーハ研磨が不可能になる。The first point is that most wafers do not maintain a high degree of parallelism on both the front and back sides of the wafer.
Since most of the wafers are slightly tapered, if only this wafer is fixed to the plate, there will be no taper correction effect in the biplane type, and the taper of the material wafer will remain even after polishing. Therefore, it becomes impossible to polish a wafer with high flatness and high parallelism.
又前記半導体ウェーハは、必ずしも真円状の薄板ではな
く、その一部にオリエンテーションフラット（以下オリ
フラという）と呼ばれる弓形状の切欠きを有する為、プ
レートの回転中心に真円と仮想したときのウェーハの幾
何学上の中心（以下仮想中心という）を一致させて、上
方より抑圧力を付勢しながらプレートを研磨布上に自公
転させた場合においても前記オリフラから起因してつ工
−ハ面での研磨圧力にアンバランスが生じ、この結果、
研磨代がウェーハ面内で不均一となり、前記と同様にウ
ェーハ表面の高平坦度で且つ高平行度なウェーハ研磨が
不可能になる。In addition, the semiconductor wafer is not necessarily a perfectly circular thin plate, but has a bow-shaped notch called an orientation flat (hereinafter referred to as an orientation flat) in a part thereof, so the wafer is hypothetically a perfect circle at the center of rotation of the plate. Even when the geometric centers (hereinafter referred to as virtual centers) of the plates are made to coincide with each other and the plate is rotated on its axis on the polishing cloth while applying a suppressing force from above, the machining surface due to the orientation flat is An imbalance occurs in the polishing pressure at the
The polishing stock becomes non-uniform within the wafer surface, making it impossible to polish the wafer with high flatness and parallelism on the wafer surface, as described above.
尚、前記のような問題は複葉式研磨方法の場合において
は、各ウェーハはプレート回転軸を中心として対称に配
置されている為に、各ウェー／＼間で上記アンバランス
を打ち消し、オリフラによる研磨圧のウェーハ内つェー
へ間の不均一がなくなる。Incidentally, in the case of the biplane polishing method, the above-mentioned problem arises because each wafer is arranged symmetrically around the plate rotation axis, so the above-mentioned unbalance between each wafer is canceled out, and polishing using an orientation flat is performed. This eliminates uneven pressure within the wafer.
本発明は、かかる従来技術の欠点に鑑み、いわゆる毎葉
式研磨方法を採用するウェーハ研磨装置において、前記
ウェーハ表面に僅かなテーバな有するウェーハ又はオリ
フラを有する半導体ウェーハな研磨する場合でも、ウェ
ー／＼表面を高平坦度で且つ高平行度なウェーハ研磨が
可能なウェーハ研磨装鐙及び該装置に使用される位置決
め治具を提供する事を目的とする。In view of the shortcomings of the prior art, the present invention provides a wafer polishing apparatus that employs a so-called per-wafer polishing method, which is capable of polishing a wafer or semiconductor wafer having a slight taper or orientation flat on the wafer surface. The object of the present invention is to provide a wafer polishing device capable of polishing a wafer with high flatness and parallelism on the surface, and a positioning jig used in the device.
［課題を解決する為の手段」
本発明はかかる技術的課題を達成する為に、いわゆる毎
葉式の研磨装置において、前記一のウェーハを保持する
プレートの回転中心（一般にはプレート荷重中心と合致
する）とウェー／＼仮想中心とを合致させて固定する事
なく、前記ウェー／Ｘのテーバの最大傾斜方向に平行な
直・掻上で、プレートの回転中心が該ウェーハの厚肉方
向に仮想中心より僅かに偏位するよう、またオリフラを
有するウェーハにおいては、オリフラを２等分する直径
上でプレートの回転中心が該オリフラと反対の方向に仮
想中心より僅かに偏位するようウェーハを固定した事を
特徴とするものであり、そしてその偏位最愛はほぼ［交
＝Ｔ・Ｒ／８Ｓ］に合致するように、（Ｔ：テーパ量、
Ｒ：ウェー／＼の半径、Ｓ二つェーハ中心における設定
研磨量）またオリフラを有するウェーハに対してはその
偏位最愛゛を下記式に合致するように設定する。[Means for Solving the Problems] In order to achieve such technical problems, the present invention provides a so-called per-leaf type polishing apparatus in which the rotation center of the plate holding the one wafer (generally coincides with the plate load center) is used. Without aligning and fixing the wafer/X virtual center with the wafer/ Fix the wafer so that it is slightly offset from the center, or in the case of a wafer with an orientation flat, so that the center of rotation of the plate is slightly offset from the virtual center in the direction opposite to the orientation flat on the diameter that bisects the orientation flat. It is characterized by the following: (T: taper amount,
R: radius of wafer/\, S: set polishing amount at the center of the wafer) Also, for a wafer having an orientation flat, its deviation maximum is set to match the following formula.
（２０：オリフラ挟角 Ｒ：ウェーハ半径、Ｌ：オリフ
ラ長）
そして第２発明においては前記ウェーハとプレート間の
位置決めを容易にする為の治具に関するもので、前記プ
レートとウェー／＼の内いずれか一方を固定する手段と
、他方を前記ウエーノ＼の任意の直径方向に沿って微小
移動される移動手段からなる事を特徴とするものである
。(20: Orientation flat included angle, R: Wafer radius, L: Orientation flat length) The second invention relates to a jig for facilitating positioning between the wafer and the plate, and which one of the plate and the wafer/\\ It is characterized by comprising a means for fixing one side, and a means for moving the other side minutely along an arbitrary diametrical direction of the ueno\.
「作用」
かかる技術手段によれば、オリフラを有する半導体ウェ
ーハをプレート上に固定させる場合においてはウェーハ
上に加わる荷重が均一となり、この結果従来技術のよう
にプレートの回転中心につ工−ハの仮想中心を一致させ
たときにオリフラ側が余計に研磨される事が防止され、
これにより鏡面ウェーハの平行度及び平面度が悪化した
りすることがなく、高平担度の研磨加工が可能となる。"Operation" According to this technical means, when a semiconductor wafer having an orientation flat is fixed on a plate, the load applied to the wafer becomes uniform, and as a result, unlike the prior art, the load applied to the wafer is uniform. This prevents the orientation flat side from being unnecessarily polished when the virtual centers are aligned.
This prevents the parallelism and flatness of the mirror-finished wafer from deteriorating, making it possible to perform polishing with a high degree of flatness.
又僅かにテーバ状になっている半導体ウェー／＼をプレ
ート上に固定させる場合においても、前記テーパ量を加
味してウェー／＼の厚い部分に研磨荷重が余計加わるよ
うにプレートの回転中心に対し、ウェーハの仮想中心を
偏位させた為に、研磨終了後平行度及び平面度の優れた
鏡面ウェー／＼を得ることが出来る。Also, when fixing a slightly tapered semiconductor wafer /\ on a plate, it should be adjusted relative to the center of rotation of the plate so that additional polishing load is applied to the thicker part of the wafer /\, taking into consideration the amount of taper. Since the virtual center of the wafer is shifted, a mirror-finished wafer with excellent parallelism and flatness can be obtained after polishing.
「実施例」
以下１図面を参照して本発明の好適な実施例を例示的に
詳しく説明する。ただしこの実施例に記載されている構
成部品の寸法、材質、形状、その相対配置等は特に特定
的な記載がない限りは、この発明の範囲をそれのみに限
定する趣旨ではなく、単なる説明例に過ぎない。``Example'' A preferred embodiment of the present invention will be described in detail below by way of example with reference to one drawing. However, unless otherwise specifically stated, the dimensions, materials, shapes, relative arrangements, etc. of the components described in this example are not intended to limit the scope of this invention, but are merely illustrative examples. It's nothing more than that.
第１図は第２発明の実施例に係るウェーハ決め装置で、
プレー日外径より大なる一辺を有する正方形状の定盤１
１と、該定盤１１の隣接する二辺のほぼ中央位置に突設
した一対の方形ブロック１２．１３と、該方形ブロック
１２．１３に、その中心線を定盤１１中心を通るＸ、Ｙ
軸線と一致させて取付けたマイクロメータへラド１４．
．１５と、前記定盤ｌｌ上に載設されるウェーハ３位置
決め用の穴開きシート１６からなる。FIG. 1 shows a wafer deciding device according to an embodiment of the second invention,
Square-shaped surface plate 1 with one side larger than the outside diameter of the play date
1, a pair of rectangular blocks 12.13 protruding from approximately the center of two adjacent sides of the surface plate 11, and an X, Y axis whose center line passes through the center of the surface plate 11.
Rad to the micrometer installed in line with the axis 14.
．． 15, and a perforated sheet 16 for positioning the wafer 3 placed on the surface plate ll.
マイクロメータへラド１４．１５は前記方形ブロック１
２．１３に穿孔された取付孔１２１にきっちり嵌着され
軸目盛１４１が刻設されたスリーブ１４２と、該スリー
ブ１４２内に設けた螺子状に沿って螺子状に回転自在に
嵌合され、その先端に円周目盛１４３が刻設された筒状
シンプル１４４と、該シンプル１４４に一体的に連結さ
れ、該シンプル１４４の回転により進退するスピンドル
１４５よりなり、そして前記スピンドル１４５を方形ブ
ロック１２．１３より定盤１１中心側に突設させ、その
先端面がプレート４側壁面に当接可能に構成するととも
に、スリーブ１４２側に前記スピンドル１４５所定の位
置で位置決めする為のストッパ（不図示）を設ける。Micrometer Rad 14.15 is the square block 1
The sleeve 142 is tightly fitted into the mounting hole 121 drilled in 2.13 and has a shaft scale 141 engraved thereon. It consists of a cylindrical simple 144 with a circumferential scale 143 engraved on its tip, and a spindle 145 that is integrally connected to the simple 144 and moves forward and backward as the simple 144 rotates, and the spindle 145 is connected to a rectangular block 12.13. The spindle 145 is protruded toward the center of the surface plate 11 so that its tip surface can come into contact with the side wall surface of the plate 4, and a stopper (not shown) for positioning the spindle 145 at a predetermined position is provided on the sleeve 142 side. .
そして前記穴開きシート１８は、中心部にウェーハ３′
がきっちり収納可能な直径をもって円形状に開口した穴
１１１ｆｌ・を有し、且つ該ウェーハ３厚肉より僅かに
小なる厚肉を有する正方形状のプラスチック製シー）１
Ｂで形成するとともに、隣接する二辺からなる基準辺１
６２，１８３を前記方形ブロック１２．１３内壁面に当
接する事により、定盤１１上の所定位置に位置決めして
載設されるとともに、該位置決めにより前記穴ｔｅｔ中
心とＸ−Ｙ軸の交点が一致するように構成する。The perforated sheet 18 has a wafer 3' in the center.
A square plastic sheet (1) having a circular opening hole (111fl) with a diameter that allows the wafer to be tightly accommodated, and having a thickness slightly smaller than the thickness of the wafer (3).
A reference side 1 formed by B and consisting of two adjacent sides
62, 183 are placed in a predetermined position on the surface plate 11 by abutting against the inner wall surface of the rectangular block 12.13, and the intersection of the center of the hole tet and the X-Y axis is Configure to match.
次にがかる治具を用いたウェーハ３°とプレート４間の
位置決め方法について説明するに、先ず前記位置決めシ
ー）１Ｂを方形ブロック１２．１３を利用して定盤！１
の所定位置に載設した後、前もって表裏両面間のテーパ
量を測定したウェーハ３を鏡面となる側を下にして収納
する６次に下記ｌ）式に基づいて求めたウェーハ中心Ｃ
との偏心最愛を算出した後、該偏心量文に基づいて前記
マイクロメータヘッド１４．１５のシンプル１４４を回
転しながら、前記ｌ）式に対応する目盛位置までスピン
ドル１４５先端を進退させてストッパによりロックした
後、ヘッド１４．１５と一体化されたプレート４を上方
より降ろしながら、前記スピンドル１４５先端にプレー
ト４外周面を当接させて位置規制を行いつつ、ウェーハ
３裏面に圧着させ、真空吸着その他の公知の手段を利用
して両者間を固着させる。これによりプレート４の回転
中心Ｐとウェーハ３の偏心位置Ｈが合致する。Next, to explain the positioning method between the wafer 3° and the plate 4 using the jig, first, move the positioning sheet 1B to the surface plate using the square blocks 12 and 13. 1
After placing the wafer 3 in a predetermined position, the amount of taper between the front and back surfaces has been measured in advance, and the wafer 3 is stored with the mirror surface side down.
After calculating the eccentricity value, the tip of the spindle 145 is advanced or retreated to the scale position corresponding to the above equation l) while rotating the simple 144 of the micrometer head 14.15 based on the eccentricity quantity statement, and the stopper After locking, the plate 4 integrated with the head 14.15 is lowered from above, and the outer peripheral surface of the plate 4 is brought into contact with the tip of the spindle 145 to regulate the position, and the plate 4 is pressed onto the back surface of the wafer 3, and vacuum suction is performed. The two are fixed together using other known means. As a result, the center of rotation P of the plate 4 and the eccentric position H of the wafer 3 coincide.
文＝Ｔ−Ｒ／８Ｓ ・・・・・・１）ここで、Ｔは
ウェーハ端の最大と最小のウェーハ厚さの差、Ｒはウェ
ーハの半径、Ｓばウェーハ中心における研磨除去量
半導体ウェーハの研磨においては、既に研磨が行われて
テーパを生じた場合には、研磨面はほぼ平面であるので
、１）式が正確に適用出来るが、研磨に供される半導体
ウェーハは、通常化学的にエツチングされた状態である
ので、被研磨面は凹凸があり、最大及び最小厚肉がウェ
ーハ周端にない場合が多い。このような場合にもウェー
ハ被研磨面を平面で近似し、この平面にもとずいてテー
パを求め１）式に適用すれば、充分実用に耐える。Sentence = T-R/8S ...1) Here, T is the difference between the maximum and minimum wafer thickness at the wafer edge, R is the radius of the wafer, and S is the amount of polishing removed at the center of the wafer of the semiconductor wafer. In polishing, if polishing has already been performed and a taper has occurred, the polished surface is almost flat, so equation 1) can be applied accurately, but semiconductor wafers subjected to polishing are usually chemically Since it is in an etched state, the surface to be polished is uneven, and the maximum and minimum thicknesses are often not located at the wafer peripheral edge. Even in such a case, if the surface to be polished of the wafer is approximated by a plane, and the taper is determined based on this plane and the formula 1) is applied, it is sufficiently practical.
尚、製品としての鏡面ウェーハには厚さの仕様が決めら
れているので、これに合格するようＳの選定が行われな
ければならない。Incidentally, since the specular wafer as a product has a specified thickness specification, S must be selected so as to meet this specification.
この際プレート４と定盤１１間のそれぞれのＸ、Ｙ軸同
士を一致させる為に、互いに対面するスピンドル１４５
端面とプレート４外周面にマーク（不図示）を刻設する
のがよい。At this time, in order to align the X and Y axes between the plate 4 and the surface plate 11, spindles 145 facing each other are
It is preferable to carve marks (not shown) on the end face and the outer peripheral surface of the plate 4.
そして前記式で定めた偏心最愛に基づいて、プレート４
上の所定位置にウェーハ３を゛位置決め固定した後、第
２図に示す研磨装置に基づいて所定の研磨加工を行った
所、研磨前のウェーハ３表裏両面間のテーパが５．５６
ｇ１ｌ／１２５φあったものが、研磨後において０．８
〜１μｍに縮小させる事が出来た。Then, based on the eccentricity defined by the above formula, plate 4
After positioning and fixing the wafer 3 at a predetermined position above, a predetermined polishing process was performed based on the polishing apparatus shown in FIG. 2, and the taper between the front and back surfaces of the wafer 3 before polishing was 5.56.
The g1l/125φ became 0.8 after polishing.
It was possible to reduce the size to ~1 μm.
次に本実施例の効果を確認する為に、同じ装置及び同じ
研磨条件で前記研磨後ウェーハ３の固定位置をＸ軸方向
に徐々にずらしながら研磨後のテーパ量を確認した所、
第４図のようなグラフ図が得られ、本発明の効果を実証
する事が確認された。Next, in order to confirm the effect of this example, the amount of taper after polishing was confirmed while gradually shifting the fixed position of the polished wafer 3 in the X-axis direction using the same equipment and the same polishing conditions.
A graph as shown in FIG. 4 was obtained, and it was confirmed that the effect of the present invention was demonstrated.
尚、本発明に用いた研磨装置を第２図によって簡単に説
明するに、ターンテーブル２は回転軸を中心として回転
可能に構成したステンレス製鋳造体からなり、その内部
通路２ｂに冷却液を還流させて上面に貼設された研磨布
１を冷却可能に構成する。To briefly explain the polishing apparatus used in the present invention with reference to FIG. 2, the turntable 2 is made of a cast stainless steel body configured to be rotatable around a rotating shaft, and a cooling liquid is circulated through its internal passage 2b. In this way, the polishing cloth 1 attached to the upper surface can be cooled.
研磨布ｌは厚肉１〜２ＩＩ１１程度の弾性を有する不織
布で形成するとともに、該不織布上に分散器を利用して
コロイタルシリ力系の研磨液６を浣しながら、前記ター
ンテーブル２の回転を利用して均に分散可能に構成する
。The polishing cloth 1 is formed of a non-woven fabric having a thickness of about 1 to 2II11 and has an elasticity, and the rotation of the turntable 2 is used while applying the polishing liquid 6 of the colloidal silica force onto the non-woven fabric using a disperser. so that it can be evenly distributed.
プレート４は石英ガラスやセラミック等の低熱膨張性の
材料で形成ｙれ、下面に一の半導体ウェーハ３を同心状
に固定可能な直径を有する円筒形状をなすとともに、該
下面側に開口する細孔４１を介して真空吸引する事によ
りウェーハ３がｒ！Ａ着可能に構成する。又該プレート
４に押圧力を付勢するマウントヘッド５との間にＯリン
グ５３を介して球面軸受５２を形成し、プレート４を揺
動自在に支持するとともに、プレート４の作動中心（球
面軸受５２の半径中心Ｃ）を研磨布１面上に位置せしめ
、ターンテーブル２回転時に生じるプレート４の傾動を
防止している。The plate 4 is made of a material with low thermal expansion such as quartz glass or ceramic, and has a cylindrical shape with a diameter that allows one semiconductor wafer 3 to be fixed concentrically on the lower surface, and has pores opening on the lower surface. By applying vacuum through 41, the wafer 3 is moved to r! Constructed to allow A arrival. A spherical bearing 52 is formed via an O-ring 53 between the mount head 5 that applies a pressing force to the plate 4, and supports the plate 4 in a swingable manner. The radial center C) of 52 is positioned on the surface of the polishing cloth 1 to prevent tilting of the plate 4 that occurs when the turntable rotates twice.
又前記マウントへラド５は回転軸５１を介して前記ター
ンテーブル２と同期させて同一回転数で回転可能に構成
するとともに、上方より所定押圧力が付勢可能に構成し
ている。The mount head 5 is configured to be rotatable at the same rotation speed in synchronization with the turntable 2 via a rotating shaft 51, and is also configured to be able to be applied with a predetermined pressing force from above.
次にかかる装置を用いてオリフラを有するつ工−ハ３を
ａＦ府する場合について説明する。Next, a case will be described in which the machine 3 having an orientation flat is subjected to aF treatment using such a device.
オリフラ３を有する半導体ウェーハ３の場合は、第２図
に示すようにプレート４の回転中心Ｃにウェーハ３の仮
想中心旦°直径上オリフラから遠ざかる方向に偏位させ
ればよく、このため下記２）式に基づいて求めたウェー
ハ仮想中心Ｃからの偏心最愛°を、算出した後、この偏
心位置Ｘとプレート４上の回転中心Ｐを合致する如くウ
ェーハ３を位置決め固定した後、上記研磨装置に基づい
て所定の研磨加工を行った所、ウェーハ３のテーパをｏ
、ａ １１．ｍ以下にする事が出来た。In the case of a semiconductor wafer 3 having an orientation flat 3, as shown in FIG. ) After calculating the eccentricity angle from the virtual center C of the wafer based on the formula, the wafer 3 is positioned and fixed so that the eccentric position After performing the prescribed polishing process based on the above, the taper of wafer 3 was
, a 11. I was able to reduce it to less than m.
・・・・・・・・・・・・２）
単位二ｍ履 （２θ：オリフラ挟角、Ｒ：ウェーハ半径
、Ｌ：オリフラ長）
ここでウェーハ３直径１２５脂麿φ、オリフラ長さ４２
．５ｍｍであって、計算の結果見゛は０．５３ｍｍであ
った。つぎにプレート４上の回転中心とウェーハ３仮想
中心Ｃを合致させてウェーハ３を位置決め固定した後、
前記と同様な方法で研磨加工を行った所、ウェーハ３の
テーパは２．２ ｐ−ｍと前記に比較して態化している
事が確認出来、本発明の効果が実証出来た。・・・・・・・・・・・・2) Unit: 2 m (2θ: included angle of orientation flat, R: wafer radius, L: length of orientation flat) Here, wafer 3 diameter is 125 mm, orientation flat length is 42
．． 5 mm, and the calculated result was 0.53 mm. Next, after positioning and fixing the wafer 3 by aligning the rotation center on the plate 4 with the virtual center C of the wafer 3,
When the polishing process was performed in the same manner as above, it was confirmed that the taper of the wafer 3 was 2.2 pm, which was improved compared to the above, and the effect of the present invention was verified.
「発明の効果」
以上記載した如く本発明によれば、いわゆる毎葉式固定
方法を採用するウェーハ研磨装置において、前記ウェー
ハ表面に僅かなテーパな有するつ工−ハ又はオリフラを
有する半導体ウェーハを研磨する場合でも、ウェーハ表
面が高平坦度で且つ高平行度な研磨が可能なウェーハ研
磨装置、及び該装置に使用される位置決め治具を提供す
る事が出来る等の著効を有する。"Effects of the Invention" As described above, according to the present invention, a semiconductor wafer having a slightly tapered groove or orientation flat on the wafer surface is polished in a wafer polishing apparatus that employs a so-called per-wafer fixing method. Even in this case, it is possible to provide a wafer polishing apparatus capable of polishing a wafer surface with high flatness and high parallelism, and a positioning jig used in the apparatus.
第１図は第２発明の実施例に係るウェーハ位置決め治具
（Ａ）は平面図（Ｂ）は正面図である。
第２図は第１発明の実施例に係る研磨装置を示す概略断
面図、第３図はテーパ形状のウェーハの位置決め計算式
を求める手順を示す作用図、第４図は本発明の実施例に
係る効果を実証する為のグラフ図である。
特許出願人：＠越半導体株式会社FIG. 1 is a plan view of a wafer positioning jig (A) according to an embodiment of the second invention, and FIG. 1B is a front view. FIG. 2 is a schematic sectional view showing a polishing apparatus according to an embodiment of the first invention, FIG. 3 is an operational diagram showing a procedure for determining a positioning formula for a tapered wafer, and FIG. 4 is a schematic sectional view showing a polishing apparatus according to an embodiment of the invention. It is a graph diagram for demonstrating such an effect. Patent applicant: @Etsu Semiconductor Co., Ltd.
Claims (1)
相対的に自公転させながら半導体ウェーハの鏡面研磨を
行う毎葉式研磨装置において、前記ウェーハの中心を前
記プレートの回転中心に対し所定量偏心させて保持させ
る事により、高平担性のウェーハ研磨を可能にした事を
特徴とするウェーハ研磨装置。 ２）前記プレートの回転中心を、テーパを有する半導体
ウェーハの中心より、該ウェーハ中心を通る最大傾斜線
上に沿って厚肉方向側に偏位させるとともに、 その偏位量ｌをほぼ［ｌ＝Ｔ・Ｒ／８Ｓ］ （Ｔ：テーパ量、Ｒ：ウェーハの半径、 Ｓ：ウエーハ中心における設定研磨量） に設定した事を特徴とする請求項１）記載のウェーハ研
磨装置。 ３）前記プレートの回転中心を、オリフラを有する半導
体ウェーハの中心より、該ウェーハ中心を通るオリフラ
線と直交する線上に沿って前記オリフラと反対方向に向
け偏位させるとともに、その偏位量ｌ’をほぼ下記式に
合致するように設定した事を特徴とする請求項１）記載
のウェーハ研磨装置。 ｌ’＝（１／１２）×（Ｌ＿３／（Ｒ＾２×（π−θ）
＋√（Ｒ＾２−（Ｌ＿２／４））×（Ｌ／２））（２θ
：オリフラ挟角Ｒ：ウェーハ半径、 Ｌ：オリフラ長） ４）請求項１）記載の毎葉式ウェーハ研磨装置に使用さ
れるウェーハとプレート間の位置決め治具において、前
記プレートとウェーハの内いずれか一方を固定する手段
と、他方を前記ウェーハの任意の直径方向に沿って微小
移動させる移動手段からなる事を特徴とする位置決め治
具。[Scope of Claims] 1) In a wafer-type polishing apparatus that performs mirror polishing of a semiconductor wafer while rotating a plate to which a wafer is fixed relative to a polishing cloth, the center of the wafer is fixed to the plate. A wafer polishing apparatus characterized by being able to polish a wafer with high flatness by holding the wafer eccentrically by a predetermined amount with respect to the rotation center of the wafer. 2) The center of rotation of the plate is shifted from the center of the tapered semiconductor wafer toward the thickness direction along the maximum inclination line passing through the center of the wafer, and the amount of shift l is approximately [l=T・R/8S] (T: taper amount, R: radius of the wafer, S: set polishing amount at the center of the wafer) The wafer polishing apparatus according to claim 1). 3) The center of rotation of the plate is deviated from the center of the semiconductor wafer having an orientation flat in the direction opposite to the orientation flat along a line passing through the center of the wafer and perpendicular to the orientation flat, and the amount of deviation l' The wafer polishing apparatus according to claim 1, wherein: is set to substantially match the following formula. l'=(1/12)×(L_3/(R^2×(π-θ)
+√(R^2-(L_2/4))×(L/2))(2θ
: orientation flat included angle R: wafer radius; L: orientation flat length) 4) In the positioning jig between the wafer and the plate used in the per-wafer type wafer polishing apparatus according to claim 1), any one of the plate and the wafer. A positioning jig comprising means for fixing one side and moving means for slightly moving the other side along an arbitrary diameter direction of the wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63313848A JPH0738381B2 (en) | 1988-12-14 | 1988-12-14 | Wafer polishing machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63313848A JPH0738381B2 (en) | 1988-12-14 | 1988-12-14 | Wafer polishing machine |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02159722A true JPH02159722A (en) | 1990-06-19 |
| JPH0738381B2 JPH0738381B2 (en) | 1995-04-26 |
Family
ID=18046238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63313848A Expired - Lifetime JPH0738381B2 (en) | 1988-12-14 | 1988-12-14 | Wafer polishing machine |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0738381B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07285069A (en) * | 1994-04-18 | 1995-10-31 | Shin Etsu Handotai Co Ltd | Automatic taper removal polishing method and device of wafer in sheet type polishing |
| US5549502A (en) * | 1992-12-04 | 1996-08-27 | Fujikoshi Machinery Corp. | Polishing apparatus |
| JP2006278981A (en) * | 2005-03-30 | 2006-10-12 | Fujimi Inc | Abrasive for single crystal surface and polishing method |
| JP2010177650A (en) * | 2009-02-02 | 2010-08-12 | Disco Abrasive Syst Ltd | Grinding method |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5244162A (en) * | 1975-10-04 | 1977-04-06 | Komatsu Denshi Kinzoku Kk | Method of processing semiconductor wafer |
-
1988
- 1988-12-14 JP JP63313848A patent/JPH0738381B2/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5244162A (en) * | 1975-10-04 | 1977-04-06 | Komatsu Denshi Kinzoku Kk | Method of processing semiconductor wafer |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5549502A (en) * | 1992-12-04 | 1996-08-27 | Fujikoshi Machinery Corp. | Polishing apparatus |
| JPH07285069A (en) * | 1994-04-18 | 1995-10-31 | Shin Etsu Handotai Co Ltd | Automatic taper removal polishing method and device of wafer in sheet type polishing |
| EP0687526A1 (en) * | 1994-04-18 | 1995-12-20 | Shin-Etsu Handotai Company Limited | Polishing method and apparatus for automatic reduction of wafer taper in single-wafer polishing |
| US5620357A (en) * | 1994-04-18 | 1997-04-15 | Shin-Etsu Handotai Co., Ltd. | Polishing method and apparatus for automatic reduction of wafer taper in single-wafer polishing |
| JP2006278981A (en) * | 2005-03-30 | 2006-10-12 | Fujimi Inc | Abrasive for single crystal surface and polishing method |
| JP2010177650A (en) * | 2009-02-02 | 2010-08-12 | Disco Abrasive Syst Ltd | Grinding method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0738381B2 (en) | 1995-04-26 |
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