JPH0211332U - - Google Patents

Info

Publication number
JPH0211332U
JPH0211332U JP8896288U JP8896288U JPH0211332U JP H0211332 U JPH0211332 U JP H0211332U JP 8896288 U JP8896288 U JP 8896288U JP 8896288 U JP8896288 U JP 8896288U JP H0211332 U JPH0211332 U JP H0211332U
Authority
JP
Japan
Prior art keywords
electrode lead
electrode
thickness
semiconductor chip
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8896288U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8896288U priority Critical patent/JPH0211332U/ja
Publication of JPH0211332U publication Critical patent/JPH0211332U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図はこの考案の一実施例を示す要部斜視図
、第２図はこの要部縦断面図、第３図はこの考案
の他の実施例を示す要部上面図、第４図は第３図
の４−４における縦断面図、第５図は従来構造を
示す要部縦断面図である。 ２３……電極リード、２３ａ……段差、２３ｂ
……凹部、２５……半導体チツプ、２６……ボン
デイングワイヤ、２７……モールド樹脂。

Claims (1)

  1. 【実用新案登録請求の範囲】 電極リードの一部に段差による凹部を設け、前
    記凹部に前記電極リードの厚さよりも薄い厚さの
    半導体チツプを固定し、該半導体チツプの電極と
    前記電極リードとをボンデングワイヤにより接続
    し、全体を樹脂モールドしてなる電子部品におい
    て、 上記電極リードの凹部との境の段差は、該電極
    リードの厚さの1/3乃至2/3に相当する深さで且つ
    長手方向に該電極リードの厚さの 1/4以下の寸法領域で半抜き成形された段差で
    あることを特徴とする電子部品。
JP8896288U 1988-07-06 1988-07-06 Pending JPH0211332U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8896288U JPH0211332U (ja) 1988-07-06 1988-07-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8896288U JPH0211332U (ja) 1988-07-06 1988-07-06

Publications (1)

Publication Number Publication Date
JPH0211332U true JPH0211332U (ja) 1990-01-24

Family

ID=31313515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8896288U Pending JPH0211332U (ja) 1988-07-06 1988-07-06

Country Status (1)

Country Link
JP (1) JPH0211332U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014082384A (ja) * 2012-10-17 2014-05-08 Renesas Electronics Corp 半導体装置およびその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014082384A (ja) * 2012-10-17 2014-05-08 Renesas Electronics Corp 半導体装置およびその製造方法

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