JPH0210672Y2 - - Google Patents
Info
- Publication number
- JPH0210672Y2 JPH0210672Y2 JP1984148002U JP14800284U JPH0210672Y2 JP H0210672 Y2 JPH0210672 Y2 JP H0210672Y2 JP 1984148002 U JP1984148002 U JP 1984148002U JP 14800284 U JP14800284 U JP 14800284U JP H0210672 Y2 JPH0210672 Y2 JP H0210672Y2
- Authority
- JP
- Japan
- Prior art keywords
- tuner
- circuit
- terminal board
- amplifier circuit
- power terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 8
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Structure Of Receivers (AREA)
Description
【考案の詳細な説明】
産業上の利用分野
本考案は、リードピンを植設した電源端子板の
改良によるテレビジヨン受像機用電子チユーナの
小型化に関する。[Detailed Description of the Invention] Industrial Application Field The present invention relates to miniaturization of an electronic tuner for a television receiver by improving a power supply terminal board in which lead pins are embedded.
従来の技術
テレビジヨン受像機用電子チユーナは、一般に
第７図に示すように、チユーナ回路部品を組付け
たプリント基板を収容した矩形枠状のシヤーシベ
ース１の表裏開口に、シールドカバー２，３を嵌
着したシールド構造を有する。このチユーナ４に
は、チユーニング電圧等の各種制御電圧を外部よ
り加えるため及びIF出力信号を外部に取り出す
ため、シールドベース１の一側板に、リードピン
５，５…を貫通コンデンサ６，６…を介して植設
し、この側板を電源端子板１ａとしている。2. Description of the Related Art Generally, as shown in FIG. 7, an electronic tuner for a television receiver has shield covers 2 and 3 attached to the front and back openings of a rectangular frame-shaped chassis base 1 that accommodates a printed circuit board on which tuner circuit components are assembled. It has a fitted shield structure. To this tuner 4, in order to apply various control voltages such as a tuning voltage from the outside and to take out an IF output signal to the outside, lead pins 5, 5... are connected to one side plate of the shield base 1 via feed-through capacitors 6, 6... This side plate is used as the power terminal board 1a.
上記チユーナ４からは選局した放送のIF出力
信号が得られるが、これから映像信号や音声信号
を取り出すためには、このIF出力信号をIF増幅
回路で増幅する必要がある。このIF増幅回路は、
従来上記チユーナ４と別体で、チユーナと同様の
シールド構造を持つIFパツクとして製造する場
合と、電子チユーナ内に直接組み込む場合とがあ
る。 An IF output signal of the selected broadcast is obtained from the tuner 4, but in order to extract a video signal or an audio signal from it, this IF output signal must be amplified by an IF amplifier circuit. This IF amplification circuit is
Conventionally, there are cases where the IF pack is manufactured separately from the tuner 4 and has the same shield structure as the tuner, and cases where it is directly incorporated into the electronic tuner.
考案の解決しようとする問題点
上記IF増幅回路の組付けに、IFパツクを用い
る場合は、IFパツクをチユーナとは別に必要と
し、さらにテレビジヨン受像機のマザープリント
基板上に、IFパツクの取付け用スペースを必要
とする。すなわち部品点数及び作業工数の削減化
及びテレビジヨン受像機の小型化の観点からして
改善の余地がある。またIF増幅回路をチユーナ
に内蔵させたものは、上記IFパツクが不要にな
り、その問題点は一応解決されるが、チユーナの
プリント基板にIF増幅回路を組付けるためのス
ペースを必要として、チユーナが大型化する。Problems to be solved by the invention When using an IF pack to assemble the above IF amplifier circuit, the IF pack is required separately from the tuner, and the IF pack must be installed on the mother printed circuit board of the television receiver. space required. That is, there is room for improvement from the viewpoint of reducing the number of parts and work hours, and downsizing the television receiver. In addition, a tuner with an IF amplifier circuit built into the tuner eliminates the need for the IF pack mentioned above, which solves the problem to a certain extent, but it requires space to assemble the IF amplifier circuit on the tuner's printed circuit board. becomes larger.
問題点を解決するための手段
本考案はIF増幅回路を内蔵するタイプのチユ
ーナをさらに小型化するために、電源供給用及び
IF出力用のリードピンが植立された電源端子板
を改良したものである。Means for Solving the Problems The present invention aims to further downsize a tuner with a built-in IF amplifier circuit.
This is an improved version of the power terminal board with lead pins for IF output.
すなわち、本考案はチユーナ回路部品を組付け
たプリント基板をシールドケース内に収納し、シ
ールドケースの一部を構成する電源端子板に、少
なくとも電源供給用並びにIF出力用リードピン
を貫設したIF増幅回路内蔵のチユーナであつて、
上記電源端子板は、リードピンを貫通させる貫通
孔と、所定のシールドパターンと、各リードピン
の接地用チツプ状コンデンサ並びにIF増幅回路
の少なく共一部を構成するチツプ状電子部品及び
各リードピンを接続する配線パターンとを有する
プリント基板であることを特徴とするチユーナで
ある。 That is, the present invention is an IF amplification system in which a printed circuit board with tuner circuit components assembled is housed in a shield case, and at least lead pins for power supply and IF output are provided through the power terminal board that constitutes a part of the shield case. It is a tuner with a built-in circuit,
The power supply terminal board connects each lead pin with a through hole through which the lead pin passes, a predetermined shield pattern, a chip capacitor for grounding each lead pin, and a chip electronic component that constitutes at least a common part of the IF amplifier circuit. The tuner is a printed circuit board having a wiring pattern.
実施例
本考案の一実施例を第１図乃至第６図を参照し
ながら以下説明する。Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 to 6.
第１図は本考案の一実施例であるUHF−VHF
コンビネーシヨン電子チユーナ７を示す。このチ
ユーナ７は、第２図に示すように金属板をコ字状
に曲成したシヤーシベース８に、チユーナ回路部
品９，９…を組付けたプリント基板１０を収納
し、次にプリント基板１０をシヤーシベース８内
に押し込むようにして、プリント基板からなりリ
ードピン１１，１１…を植設した電源端子板１２
をシヤーシベース８の両端フツク８ａ，８ａに係
止させ、次にシヤーシベース８の表裏開口にシー
ルドカバー１３，１４を嵌着して組立てられる。 Figure 1 shows UHF-VHF, which is an example of the present invention.
A combination electronic tuner 7 is shown. As shown in FIG. 2, this tuner 7 stores a printed circuit board 10 on which tuner circuit components 9, 9... are assembled in a chassis base 8 made of a metal plate bent into a U-shape. A power terminal board 12 made of a printed circuit board and having lead pins 11, 11, etc. implanted therein so as to be pushed into the chassis base 8.
are secured to the hooks 8a, 8a at both ends of the chassis base 8, and then the shield covers 13, 14 are fitted into the front and back openings of the chassis base 8, thereby being assembled.
このチユーナ７の回路構成を第３図に基づき説
明する。 The circuit configuration of this tuner 7 will be explained based on FIG.
第３図において、１５は上記リードピン１１よ
りなるアンテナ入力端子、１６，１６…はUHF
回路の駆動電圧BU、チユーニング電圧TU等の
制御電圧を入力する前記リードピン１１，１１…
よりなる電源供給用端子、１７は上記リードピン
１１よりなるIF出力端子、１８，１９，２０，
２１，２２は夫々UHF部の入力段同調回路、RF
増幅回路、段間同調回路、混合回路及び局部発振
回路、２３，２４，２５，２６，２７は夫々
VHF部の入力段同調回路、RF増幅回路、段間同
調回路、混合回路及び局部発振回路、２８はIF
トラツプ回路、２９はIF増幅回路である。上記
構成において、VHF部の混合回路２６にはシヨ
ツトキー型FET３０が使用され、UHFバンドの
受信時にはUHF部の混合回路２１のIF出力の増
幅回路として機能する。IF増幅回路２９は、
VHFの混合回路２６から出力されるUHFバンド
又はVHFバンドの選局した放送のIF出力を増幅
して、IF出力端子１７に出力する。 In Fig. 3, 15 is an antenna input terminal consisting of the lead pin 11, and 16, 16... are UHF
The lead pins 11, 11, . . . which input control voltages such as the driving voltage BU and tuning voltage TU of the circuit.
17 is an IF output terminal consisting of the lead pin 11, 18, 19, 20,
21 and 22 are the input stage tuning circuit and RF of the UHF section, respectively.
The amplifier circuit, interstage tuning circuit, mixing circuit, and local oscillation circuit, 23, 24, 25, 26, and 27, respectively
VHF section input stage tuning circuit, RF amplifier circuit, interstage tuning circuit, mixing circuit and local oscillation circuit, 28 is IF
The trap circuit 29 is an IF amplifier circuit. In the above configuration, a Schottky type FET 30 is used in the mixing circuit 26 of the VHF section, and functions as an amplification circuit for the IF output of the mixing circuit 21 of the UHF section when receiving the UHF band. The IF amplifier circuit 29 is
The IF output of the selected broadcast in the UHF band or VHF band output from the VHF mixing circuit 26 is amplified and output to the IF output terminal 17.
上記チユーナ７に使用される電源端子板１２
は、両面プリント基板を用いて製作され、第４図
及び第５図に示すように所定の配列で、電源供給
用、アンテナ信号の入力用及びIF信号の出力用
のリードピン１１，１１…を挿通させる貫通孔３
１，３１…が穿設されている。この電源端子板１
２の表側にはこの貫通孔３１，３１…の周囲にリ
ードピン固着用の環状の導体パターン３２，３２
…が、裏面側にはこの貫通孔３１，３１…から所
定形状に延びた配線パターン３３，３３…が夫々
被着形成され、さらにこの電源端子板１２の表裏
面には、上記導体パターン３２，３２…及び配線
パターン３３，３３…を囲むように、シールドパ
ターン３４，３５が被着形成されている。なお３
６，３６…は半田等を充填することにより、プリ
ント基板の表裏面のシールドパターン３４，３５
を接続する貫通孔である。この電源端子板１２に
は、その表面側に、配線パターン３３，３３…と
シールドパターン３５を跨ぐようにしてコネクタ
ピン接地用のチツプ状コンデンサ３７，３７…が
固着され、さらにIF出力用のリードピン１１の
周囲の配線パターン３３，３３に第３図に示した
IF増幅回路２９の出力側の抵抗３８及びコンデ
ンサ３９がチツプ状電子部品を用いて固着されて
いる。このプリント基板を利用した電源端子板１
２は、リードピン１１，１１…を貫通孔３１，３
１…に挿通して半田付けにより固着した状態で、
第２図示すようにチユーナ７の一部品として組付
けられるが、このとき、第６図に示すようにチユ
ーナのプリント基板１０の端部に導出された端子
パターン４０，４０…と、電源端子板１２の配線
パターン３３，３３…の端部とが位置合せされ、
半田付けにより両者が接続される。 Power terminal board 12 used in tuner 7 above
is manufactured using a double-sided printed circuit board, through which lead pins 11, 11, etc. for power supply, antenna signal input, and IF signal output are inserted in a predetermined arrangement as shown in Figures 4 and 5. through hole 3
1, 31... are drilled. This power terminal board 1
On the front side of 2, annular conductor patterns 32, 32 for fixing lead pins are provided around the through holes 31, 31...
On the back side, wiring patterns 33, 33... extending in a predetermined shape from the through holes 31, 31... are formed, respectively, and on the front and back sides of the power terminal board 12, the conductor patterns 32, 33... are formed. Shield patterns 34, 35 are formed to surround the wiring patterns 32, 32, and the wiring patterns 33, 33, . Note 3
6, 36... are filled with solder etc. to form shield patterns 34, 35 on the front and back surfaces of the printed circuit board.
It is a through hole that connects the Chip-shaped capacitors 37, 37... for grounding the connector pins are fixed to the front surface of the power terminal board 12 so as to straddle the wiring patterns 33, 33... and the shield pattern 35, and lead pins for IF output. The wiring patterns 33, 33 around 11 are shown in Figure 3.
A resistor 38 and a capacitor 39 on the output side of the IF amplifier circuit 29 are fixed using chip-shaped electronic components. Power terminal board 1 using this printed circuit board
2, the lead pins 11, 11... are connected to the through holes 31, 3.
1... and fixed by soldering,
As shown in FIG. 2, it is assembled as a part of the tuner 7, but at this time, as shown in FIG. 6, the terminal patterns 40, 40, . The ends of the twelve wiring patterns 33, 33... are aligned,
The two are connected by soldering.
上記実施例ではチユーナのIF増幅回路２９の
内の二部品３８，３９のみが電源端子板１２に組
付けられているが、電源端子板１２の配線パター
ン形状を変更してこれ以上の個数の部品を組付け
ることができる。 In the above embodiment, only two parts 38 and 39 of the tuner's IF amplifier circuit 29 are assembled to the power supply terminal board 12, but by changing the shape of the wiring pattern of the power supply terminal board 12, a larger number of parts can be assembled. can be assembled.
また本考案はUHFバンド専用、或いはVHFバ
ンド専用のチユーナにおいても実施できるもので
ある。 Further, the present invention can be implemented in a tuner dedicated to the UHF band or the VHF band.
考案の効果
本考案はIF増幅回路を内蔵したチユーナにお
いて、電源端子板をプリント基板によつて形成
し、リードピンの接地用コンデンサ及びIF増幅
回路の少なくとも一部の部品をチツプ状電子部品
を用いて、この電源端子板に組み付けるようにし
たから、従来必要とされていた貫通コンデンサを
不要として電源端子板を小さくし、さらにチユー
ナ内のプリント基板のIF増幅回路の取付けスペ
ースを小さくして、チユーナを小型化することが
できる。Effects of the invention The present invention is a tuner with a built-in IF amplifier circuit, in which the power terminal board is formed from a printed circuit board, and the grounding capacitor of the lead pin and at least some parts of the IF amplifier circuit are formed using chip-shaped electronic components. Since it is assembled to this power terminal board, the power terminal board can be made smaller by eliminating the need for the feed-through capacitor that was previously required, and furthermore, the mounting space for the IF amplifier circuit on the printed circuit board inside the tuner can be reduced, making the tuner easier to use. Can be made smaller.
第１図は本考案の一実施例を示すチユーナの斜
視図、第２図は第１図に示したチユーナの分解斜
視図、第３図は第１図に示したチユーナの回路構
成を示すブロツク図、第４図及び第５図は本考案
に係る電源端子板の正面図及び裏面図、第６図は
チユーナ内のプリント基板と電源端子板の接続状
態を示す斜視図、第７図は従来のチユーナを示す
斜視図である。
７……チユーナ、８……シールドベース、９…
…チユーナ回路部品、１０……プリント基板、１
１……リードピン、１２……電源端子板、１３，
１４……シールドカバー、２９……IF増幅回路、
３１……貫通孔、３３……配線パターン、３４，
３５……シールドパターン、３７……チツプ状コ
ンデンサ、３８，３９……IF増幅回路を構成す
るチツプ状電子部品。
Fig. 1 is a perspective view of a tuner showing an embodiment of the present invention, Fig. 2 is an exploded perspective view of the tuner shown in Fig. 1, and Fig. 3 is a block diagram showing the circuit configuration of the tuner shown in Fig. 1. 4 and 5 are front and back views of the power terminal board according to the present invention, FIG. 6 is a perspective view showing the connection state between the printed circuit board in the tuner and the power terminal board, and FIG. 7 is the conventional It is a perspective view showing the tuner of. 7... Chuyuna, 8... Shield Base, 9...
...Tuner circuit components, 10...Printed circuit board, 1
1...Lead pin, 12...Power terminal board, 13,
14... Shield cover, 29... IF amplifier circuit,
31...Through hole, 33...Wiring pattern, 34,
35... Shield pattern, 37... Chip-shaped capacitor, 38, 39... Chip-shaped electronic components constituting the IF amplifier circuit.
Claims (1)
ールドケース内に収納し、シールドケースの一部
を構成する電源端子板に、少なくとも電源供給用
並びにIF出力用のリードピンを貫設したIF増幅
回路内蔵のチユーナであつて、上記電源端子板
は、リードピンを貫通させる貫通孔と、所定のシ
ールドパターンと、各リードピンの接地用チツプ
状コンデンサ並びにIF増幅回路の少なく共一部
を構成するチツプ状電子部品及び各リードピンを
接続する配線パターンとを有するプリント基板で
あることを特徴とするチユーナ。 A tuner with a built-in IF amplifier circuit, in which a printed circuit board with tuner circuit components assembled is housed in a shield case, and at least lead pins for power supply and IF output are inserted through the power terminal board that forms part of the shield case. The power terminal board has a through hole through which the lead pin passes, a predetermined shield pattern, a chip capacitor for grounding each lead pin, a chip electronic component that forms at least a common part of the IF amplifier circuit, and each other. A tuner characterized in that it is a printed circuit board having a wiring pattern for connecting lead pins.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984148002U JPH0210672Y2 (en) | 1984-09-28 | 1984-09-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1984148002U JPH0210672Y2 (en) | 1984-09-28 | 1984-09-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6162431U JPS6162431U (en) | 1986-04-26 |
| JPH0210672Y2 true JPH0210672Y2 (en) | 1990-03-16 |
Family
ID=30706223
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1984148002U Expired JPH0210672Y2 (en) | 1984-09-28 | 1984-09-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0210672Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2530772Y2 (en) * | 1991-03-30 | 1997-03-26 | ミツミ電機株式会社 | Electronic device case |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5789331A (en) * | 1980-11-25 | 1982-06-03 | Matsushita Electric Ind Co Ltd | Tuner device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57146431U (en) * | 1981-03-09 | 1982-09-14 |
-
1984
- 1984-09-28 JP JP1984148002U patent/JPH0210672Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5789331A (en) * | 1980-11-25 | 1982-06-03 | Matsushita Electric Ind Co Ltd | Tuner device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6162431U (en) | 1986-04-26 |
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