JPH01233808A - Digital temperature compensation type piezoelectric oscillator - Google Patents

Digital temperature compensation type piezoelectric oscillator

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Publication number
JPH01233808A
JPH01233808A JP6085488A JP6085488A JPH01233808A JP H01233808 A JPH01233808 A JP H01233808A JP 6085488 A JP6085488 A JP 6085488A JP 6085488 A JP6085488 A JP 6085488A JP H01233808 A JPH01233808 A JP H01233808A
Authority
JP
Japan
Prior art keywords
converter
output
digital
piezoelectric oscillator
digital code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6085488A
Other languages
Japanese (ja)
Inventor
Takaaki Hara
孝明 原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP6085488A priority Critical patent/JPH01233808A/en
Publication of JPH01233808A publication Critical patent/JPH01233808A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce the frequency change to an internal heat by detecting an elapsed time at leading after application of power as a voltage change and outputting a digital code for compensation. CONSTITUTION:The oscillator consists of a temperature detector 1, a 1st AD converter 2 applying digital coding to its analog output, a memory circuit 3 using a code being the synthesis of digital codes outputted from the detection circuit detecting the initial state comprising a digital code outputted from AD converter 2, a 2nd AD converter, three resistors 7, 9, 10 and a capacitor 8 as an address, a DA converter 4 applying analog processing to a digital code output of the memory circuit 3 and a voltage controlled piezoelectric oscillator 5 controlled by the output of the DA converter 4. That is, the charging circuit is constituted by the resistor 7 and the capacitor 8 and the resistors 9, 10 constitute the discharging circuit to detect the time from application of power supply or interruption while being replaced into a voltage equivalent. Thus, the frequency change is compensated even at application of power supply.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はディジタル温度補償型圧電発振器、特に電源投
入時の立上り特性の良好なディジタル温度補償型圧電発
振器に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital temperature-compensated piezoelectric oscillator, and particularly to a digital temperature-compensated piezoelectric oscillator that has good rise characteristics upon power-on.

〔従来の技術〕[Conventional technology]

従来のディジタル温度補償型圧電発振器は第2図に示す
代表的なブロック図のように、温度検出器1とそのアナ
ログ出力をディジタルコード化するAD変換器2と、A
D変換器2のディジタルコード出力を特定のディジトル
コードに変換するメモリ回路3と、メモリ回路3のディ
ジタルコード出力をアナログ信号化するDA変換器4と
、DA変換器4の出力により制御される電圧制御圧電発
振器5とから構成されている。
A conventional digital temperature compensated piezoelectric oscillator, as shown in the typical block diagram shown in FIG.
It is controlled by a memory circuit 3 that converts the digital code output of the D converter 2 into a specific digital code, a DA converter 4 that converts the digital code output of the memory circuit 3 into an analog signal, and the output of the DA converter 4. It is composed of a voltage controlled piezoelectric oscillator 5.

以上の構成において、サーミスタ等を含む温度検出器1
か周囲温度を検出し、そのアナログ出力をノルD変換器
2に供給してディジタルコードに変換し、このディジタ
ルコードがメモリ回路3のアドレス信号として与えられ
る。メモリ回路3には電圧制御圧電発振器5の周波数温
度特性を補償するために、アドレス信号であるAD変換
器2のディジタルコードに対応した温度補償用のディジ
タルコードがあらかじめ記憶させである。周囲温度が変
化するとアドレス信号も変1ヒし、メモリ回路3から温
度補償用のディジタルコードが読出される。この読出さ
れた温度補償用のディジタルコードはDA変換器4に供
給され、アナログ信号に変換されて電圧制御発振器5に
供給される。この動作により、第3図に示す周波数温度
特性図のように、温度補償をしない温度特性(a)を補
償して温度特性(b)に示す安定な周波数温度特性とし
ている。
In the above configuration, a temperature sensor 1 including a thermistor etc.
The analog output is supplied to the Nord-D converter 2 to convert it into a digital code, and this digital code is given as an address signal to the memory circuit 3. In order to compensate for the frequency-temperature characteristics of the voltage-controlled piezoelectric oscillator 5, the memory circuit 3 is pre-stored with a digital code for temperature compensation corresponding to the digital code of the AD converter 2, which is an address signal. When the ambient temperature changes, the address signal also changes, and a digital code for temperature compensation is read out from the memory circuit 3. This read digital code for temperature compensation is supplied to the DA converter 4, converted into an analog signal, and supplied to the voltage controlled oscillator 5. Through this operation, as shown in the frequency-temperature characteristic diagram shown in FIG. 3, the temperature characteristic (a) without temperature compensation is compensated for, and the stable frequency-temperature characteristic shown in the temperature characteristic (b) is achieved.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のディジタル温度補償型圧電発振器は、温
度検出器を用いて周囲の温度変化による周波数変化のみ
を補償する構成となっているため、第4図に示す周波数
時間特性図の時間特性(a>のように、電源投入から時
間の経過と共に周波数の変化を生じている。すなわち電
源投入時の自己発熱による過渡状態における周波数変化
は補償できないという欠点がある。
The conventional digital temperature-compensated piezoelectric oscillator described above uses a temperature detector to compensate only for frequency changes caused by changes in ambient temperature. >, the frequency changes over time after the power is turned on.In other words, there is a drawback that the frequency change in the transient state due to self-heating when the power is turned on cannot be compensated for.

本発明の目的は上述した従来のディジタル温度補償型圧
電発振器に対し、電源投入時においても周波数変化の補
償されたディジタル温度補償型圧電発振器を提供するこ
とにある。
An object of the present invention is to provide a digital temperature-compensated piezoelectric oscillator whose frequency change is compensated for even when the power is turned on, in contrast to the conventional digital temperature-compensated piezoelectric oscillator described above.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のディジタル温度補償型圧電発振器は、周囲温度
を検出する温度検出器と、この温度検出器のアナ、ログ
出力をディジタルコード化するAD変換器と、このAD
変換器のディジタル出力をアドレスとして、このアドレ
スに対応した温度補償用のディジタルコードを出力する
メモリ回路と、このメモリ回路のディジタル出力をアナ
ログ信号に変換するDA変換器と、このDA変換器の出
力により制御される電圧制御圧電発振器とを有するディ
ジタル温度補償型圧電発振器において、電源線と地気線
との間に設けた抵抗と蓄電器との直列回路と、前記抵抗
と蓄電器との接続点と前記地気線との間に設けた抵抗網
と、この抵抗網に接続された第2のAD変換器と、前記
AD変換器のディジタルコード出力と前記第2のAD変
換器のディジタルコード出力との合成コードとをアドレ
スとする前記メモリ回路とを有することにより構成され
る。
The digital temperature compensated piezoelectric oscillator of the present invention includes a temperature detector that detects ambient temperature, an AD converter that converts the analog/log output of this temperature detector into digital code, and this AD
A memory circuit that uses the digital output of the converter as an address and outputs a digital code for temperature compensation corresponding to this address, a DA converter that converts the digital output of this memory circuit into an analog signal, and an output of this DA converter. A digital temperature-compensated piezoelectric oscillator having a voltage-controlled piezoelectric oscillator controlled by a voltage-controlled piezoelectric oscillator, which includes a series circuit of a resistor and a capacitor provided between a power supply line and an earth line, and a connection point between the resistor and the capacitor and the A resistor network provided between the ground air line, a second AD converter connected to the resistor network, a digital code output of the AD converter, and a digital code output of the second AD converter. and the memory circuit whose address is the composite code.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例のブロック図である1、この
実施例は温度検出器1と、そのアナログ出力をディジタ
ルコード化する第1のAD変換器2と、AD変換器2か
ら出力されるディジタルコードと第2のAD変換器6.
3個の抵抗7,9゜10および蓄電器8により構成され
る初期状態を検出する検出回路から出力されるディジタ
ルコードとを合成したコードをアドレスとするメモリ回
路3と、メモリ回路3のディジタルコード出力をアナロ
グ信号化するDA変換器4と、DA変換器4の出力によ
り制御される電圧制御圧電発振器5とから構成されてい
る。
FIG. 1 is a block diagram of an embodiment of the present invention. This embodiment includes a temperature detector 1, a first AD converter 2 that digitally encodes its analog output, and an output from the AD converter 2. digital code and second AD converter6.
A memory circuit 3 whose address is a code that is a combination of a digital code output from a detection circuit for detecting an initial state constituted by three resistors 7, 9° 10 and a capacitor 8, and a digital code output of the memory circuit 3. It is composed of a DA converter 4 that converts the signal into an analog signal, and a voltage-controlled piezoelectric oscillator 5 that is controlled by the output of the DA converter 4.

以上の構成によれば、抵抗7と蓄電器8とにより充電回
路が構成され、抵抗つと抵抗10とで放電回路を構成す
ることにより、電源投入または切断からの時間を等価的
に電圧におきかえて検出している。第6図は電源投入ま
たは切断時の特性図で、電源投入時のAD変換器6の入
力電圧を曲線(a)に、電源切断時のAD変換器6の入
力電圧を曲線(b)に示す。AD変換器6は電源投入か
らの時間を電圧変化として検出し、補償用のディジタル
コードを出力するので第4図の時間特性(a)を第4図
の時間特性(b)に改善できる。
According to the above configuration, a charging circuit is configured by the resistor 7 and the capacitor 8, and a discharging circuit is configured by the resistor 7 and the resistor 10, so that the time from power-on or power-off is equivalently replaced with voltage and detected. are doing. FIG. 6 is a characteristic diagram when the power is turned on or off. Curve (a) shows the input voltage of the AD converter 6 when the power is turned on, and curve (b) shows the input voltage of the AD converter 6 when the power is turned off. . Since the AD converter 6 detects the time since the power is turned on as a voltage change and outputs a digital code for compensation, the time characteristic (a) in FIG. 4 can be improved to the time characteristic (b) in FIG. 4.

なお第5図はメモリ回路3の割1寸図の一例を示すもの
で、アドレスは温度検出器1から得られる例えば6ビツ
トの1つのアドレスに対して2ビ、ノドの初期状態を検
出する検出回路からのアドレスを付加して8ビツト構成
の4つのアドレスが作られ、それぞれに対して予め温度
補償用のディジタルコードが記憶されている従ってこの
例では従来に較べて4倍のアドレスが与えられることに
なる。
FIG. 5 shows an example of a one-dimensional diagram of the memory circuit 3, and the address is 2 bits for one 6-bit address obtained from the temperature detector 1, and the detection detects the initial state of the node. Four 8-bit addresses are created by adding addresses from the circuit, and a digital code for temperature compensation is stored in advance for each address. Therefore, in this example, four times as many addresses as before are given. It turns out.

第7図は本発明の別の実施例のブロック図である。この
実施例は第1図における抵抗7を可変抵抗11に置換え
たもので可変抵抗11を変ることによって蓄電器8の充
電時間を変え、第6図の曲線(a)を任意に補正できる
FIG. 7 is a block diagram of another embodiment of the invention. In this embodiment, the resistor 7 in FIG. 1 is replaced with a variable resistor 11, and by changing the variable resistor 11, the charging time of the capacitor 8 can be changed, and the curve (a) in FIG. 6 can be arbitrarily corrected.

なおまた第7図における抵抗9.10の値を可変として
蓄電器8の放電時間を変え、電源切断後の再投入までの
時間による冷却温度に対する補正をすることができる。
Further, by changing the value of the resistor 9.10 in FIG. 7 to change the discharge time of the capacitor 8, it is possible to correct the cooling temperature depending on the time from turning off the power until turning it on again.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ディジタル温度補償型圧
電発振器の立上り時において、電源投入後の経過時間を
電圧変fヒとして検出し、補償用のディジタルコードを
出力することにより、内部発熱に対する周波数変化を小
さくできる効果がある。
As explained above, the present invention detects the elapsed time after power-on as a voltage change when a digital temperature compensated piezoelectric oscillator starts up, and outputs a digital code for compensation, thereby adjusting the frequency for internal heat generation. This has the effect of minimizing changes.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック図、第2図は従来
の代表的なディジタル温度補償型圧電発振器のブロック
図、第3図および第4図は第1図および第2図における
ブロック図の周波数温度特性図および周波数時間特性図
、第5図は第1図のメモリ回路の割付図、第6図は第1
図の初期状態における検出回路の特性図、第7図は本発
明の別の実施例のブロック図である。 1・・・温度検出器、2.6・・・AD変換器、3・・
・メモリ回路、4・・・DA変換器、5・・・電圧制御
圧電発振器、7.9.10・・・抵抗、8・・・蓄電器
、11・・・可変抵抗。
FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of a typical conventional digital temperature compensated piezoelectric oscillator, and FIGS. 3 and 4 are blocks in FIGS. 1 and 2. The frequency-temperature characteristic diagram and the frequency-time characteristic diagram shown in the figure, Figure 5 is the layout diagram of the memory circuit in Figure 1, and Figure 6 is the layout diagram of the memory circuit in Figure 1.
FIG. 7 is a characteristic diagram of the detection circuit in the initial state shown in FIG. 7, and is a block diagram of another embodiment of the present invention. 1... Temperature detector, 2.6... AD converter, 3...
- Memory circuit, 4... DA converter, 5... Voltage controlled piezoelectric oscillator, 7.9.10... Resistor, 8... Capacitor, 11... Variable resistor.

Claims (1)

【特許請求の範囲】[Claims] 周囲温度を検出する温度検出器と、この温度検出器のア
ナログ出力をディジタルコード化するAD変換器と、こ
のAD変換器のディジタル出力をアドレスとして、この
アドレスに対応した温度補償用のディジタルコードを出
力するメモリ回路と、このメモリ回路のディジタル出力
をアナログ信号に変換するDA変換器と、このDA変換
器の出力により制御される電圧制御圧電発振器とを有す
るディジタル温度補償型圧電発振器において、電源線と
地気線との間に設けた抵抗と蓄電器との直列回路と、前
記抵抗と蓄電器との接続点と前記地気線との間に設けた
抵抗網と、この抵抗網に接続された第2のAD変換器と
、前記AD変換器のディジタルコード出力と前記第2の
AD変換器のディジタルコード出力との合成コードとを
アドレスとする前記メモリ回路とを有することを特徴と
するディジタル温度補償型圧電発振器。
A temperature detector that detects the ambient temperature, an AD converter that converts the analog output of this temperature detector into a digital code, and a digital code for temperature compensation corresponding to this address, using the digital output of this AD converter as an address. In a digital temperature-compensated piezoelectric oscillator that has a memory circuit for output, a DA converter that converts the digital output of this memory circuit into an analog signal, and a voltage-controlled piezoelectric oscillator that is controlled by the output of this DA converter, the power supply line a series circuit of a resistor and a capacitor provided between the resistor and the ground wire, a resistor network provided between the connection point of the resistor and the capacitor, and the ground wire, and a resistor network connected to the ground wire. 2 AD converter; and the memory circuit whose address is a composite code of the digital code output of the AD converter and the digital code output of the second AD converter. type piezoelectric oscillator.
JP6085488A 1988-03-14 1988-03-14 Digital temperature compensation type piezoelectric oscillator Pending JPH01233808A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6085488A JPH01233808A (en) 1988-03-14 1988-03-14 Digital temperature compensation type piezoelectric oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6085488A JPH01233808A (en) 1988-03-14 1988-03-14 Digital temperature compensation type piezoelectric oscillator

Publications (1)

Publication Number Publication Date
JPH01233808A true JPH01233808A (en) 1989-09-19

Family

ID=13154385

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6085488A Pending JPH01233808A (en) 1988-03-14 1988-03-14 Digital temperature compensation type piezoelectric oscillator

Country Status (1)

Country Link
JP (1) JPH01233808A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154206A (en) * 1984-12-26 1986-07-12 Nec Corp Piezoelectric oscillator
JPS62126703A (en) * 1985-11-27 1987-06-09 Nec Corp Digital temperature compensation type piezoelectric oscillator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61154206A (en) * 1984-12-26 1986-07-12 Nec Corp Piezoelectric oscillator
JPS62126703A (en) * 1985-11-27 1987-06-09 Nec Corp Digital temperature compensation type piezoelectric oscillator

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