JPH01196863A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH01196863A
JPH01196863A JP63022195A JP2219588A JPH01196863A JP H01196863 A JPH01196863 A JP H01196863A JP 63022195 A JP63022195 A JP 63022195A JP 2219588 A JP2219588 A JP 2219588A JP H01196863 A JPH01196863 A JP H01196863A
Authority
JP
Japan
Prior art keywords
film
films
silicon
polycrystalline
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63022195A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63022195A priority Critical patent/JPH01196863A/en
Publication of JPH01196863A publication Critical patent/JPH01196863A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To increase working speed by lowering the resistance of a wiring by an silicide film by a polycrystalline semiconductor film or an amorphous semiconductor film. CONSTITUTION:When insulating films 2, 5 composed of silicon oxide, etc., are formed onto a semiconductor substrate 1 and a vertical diode by laminating polycrystalline semiconductor films 4, 6 consisting of polycrystalline silicon, amorphous silicon, etc., and amorphous semiconductor films is shaped onto said insulating films 2, 5, silicide films 3, 7 made up of tungstosilicon, molybdosilicon, etc., or conductive films composed of high melting-point metallic films or alloy films consisting of tungsten, molybdenum, etc., are formed onto the insulating films 2, 5, polycrystalline silicon 4 and 6 are arranged onto the conductive films in a latticed manner, and the vertical type diode is shaped at the intersection of the polycrystalline silicon.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体固定記すα装置におけるダイオード・
アレーの構造に関する。
[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a diode/
Concerning the structure of the array.

〔従来の技術〕[Conventional technology]

従来技術による半導体固定記ta H置におけるダイオ
ードJR造を第2図に示す。すなわち、半ξ体基板11
0表面には酸化膜12が形成され、該酸化v:12の表
面にはN型多結晶5i13及びP型多結晶5i14が格
子状に形成されて、縦型ダイオードを形成し、その上に
居間絶縁膜15を介して、アルミ配線16が形成されて
成るのが通例であった。
FIG. 2 shows a diode JR construction in a semiconductor fixed device according to the prior art. That is, the semi-ξ body substrate 11
An oxide film 12 is formed on the surface of the oxide V:12, and N-type polycrystals 5i13 and P-type polycrystals 5i14 are formed in a lattice shape on the surface of the oxide v:12 to form a vertical diode. Usually, aluminum wiring 16 was formed with an insulating film 15 interposed therebetween.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、上記従来技術によると、多結晶Siによる配線
抵抗が太き(、半導体内定記fα装置の高速化に向かな
いという問題点があった。
However, according to the above-mentioned prior art, there is a problem that the wiring resistance due to polycrystalline Si is large (and is not suitable for increasing the speed of a semiconductor internally defined fα device).

本発明は、かかる従来技術の問題点をなくし、半容体固
定記fα装置における多結晶半導体膜又はアモルファス
半導体膜による縦型ダイオードの配線I(抗を小さくシ
、高速化を図る事を目的とする。
The present invention eliminates the problems of the prior art, and aims to reduce the resistance and increase the speed of vertical diode wiring I using a polycrystalline semiconductor film or an amorphous semiconductor film in a half-capacity fixed recording fα device. .

〔課題を解決するための手段〕[Means to solve the problem]

上記問題点を解決するために、本発明は、半導体装置に
関し、半導体基板上に酸化硅素等の絶縁膜を形成し、該
絶縁膜上に多結晶硅素やアモルファス硅素等の多結晶半
導体膜やアモルファス半導体膜の積層による縦型ダイオ
ードを形成するに際し、少くとも絶縁膜上にタンゲステ
ン硅素やモリプデ/硅素等のシリサイド膜かタングステ
ンやモリブデン等の高融点金属膜又は合金膜から成る導
電膜を形成し、該導電膜上に前記縦型ダイオードを形成
する手段をとる。
In order to solve the above problems, the present invention relates to a semiconductor device, in which an insulating film such as silicon oxide is formed on a semiconductor substrate, and a polycrystalline semiconductor film such as polycrystalline silicon or amorphous silicon, or an amorphous semiconductor film such as polycrystalline silicon or amorphous silicon is formed on the insulating film. When forming a vertical diode by stacking semiconductor films, a conductive film made of a silicide film such as tungsten silicon or molybdenum/silicon, a high melting point metal film such as tungsten or molybdenum, or an alloy film is formed at least on the insulating film, Means is taken to form the vertical diode on the conductive film.

〔実施例〕〔Example〕

以下、実施例により本発明を詳述する。 Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示す半導体固定記憶装置に
おけるダイオードの構造図である。すなわち、半導体基
板10表面には酸化膜2を形成し、該酸化v:2の表面
にWSi等から成るシリサイドv:3及びN型多結晶S
i4を形成し、層間絶縁膜5を介して、P型多結晶Si
8及びWSi等から成るシリサイド膜7gアルミ配線8
が形成され、N型多結晶Si4とPffi多結品5if
3とが格子状に配されて、その交点に縦型ダイオードが
形成されて成る構成となる。
FIG. 1 is a structural diagram of a diode in a semiconductor fixed memory device showing an embodiment of the present invention. That is, an oxide film 2 is formed on the surface of the semiconductor substrate 10, and silicide v:3 made of WSi or the like and N-type polycrystalline S are formed on the surface of the oxide v:2.
i4 and P-type polycrystalline Si through the interlayer insulating film 5.
8 and a silicide film made of WSi, etc. 7g aluminum wiring 8
is formed, N-type polycrystalline Si4 and Pffi polycrystalline product 5if
3 are arranged in a grid pattern, and vertical diodes are formed at the intersections.

〔発明の効果〕〔Effect of the invention〕

本発明により多結晶半導体膜又はアモルファス半導体膜
による配線の抵抗をシリサイド膜で小さ(することがで
き、高速化を図ることができる効果がある。
According to the present invention, the resistance of wiring made of a polycrystalline semiconductor film or an amorphous semiconductor film can be reduced by using a silicide film, and there is an effect that speeding up can be achieved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す半導体固定記憶装置の
ダイオード・アレ一部の断面図であり、第2図は従来技
術による半導体固定記憶装置のダイオード・アレ一部の
断面図である。 1.11・・・半導体基板 2.12・・・酸化膜 3.7・・・シリサイド膜 4.13・・・N型多結晶Si 5.15・・・層間絶縁膜 6.14・・・P型多結品Si 8.16・・・アルミ配線 以  上
FIG. 1 is a cross-sectional view of a portion of a diode array of a semiconductor fixed memory device showing an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a portion of a diode array of a semiconductor fixed memory device according to the prior art. . 1.11... Semiconductor substrate 2.12... Oxide film 3.7... Silicide film 4.13... N-type polycrystalline Si 5.15... Interlayer insulating film 6.14... P-type multi-connected Si 8.16...Aluminum wiring or higher

Claims (1)

【特許請求の範囲】[Claims]  半導体基板上には酸化硅素膜等の絶縁膜が形成され、
該絶縁膜上に多結晶硅素やアモルファス硅素等の多結晶
半導体膜やアモルファス半導体膜の積層による縦型ダイ
オードを形成する際に、少くとも絶縁膜上にはタングス
テン硅素やモリブデン硅素等のシリサイド膜からタング
ステンやモリブデン等の高融点金属膜又は合金膜から成
る導電膜が形成され、該導電膜上に前記縦型ダイオード
が形成されて成る事を特徴とする半導体装置。
An insulating film such as a silicon oxide film is formed on the semiconductor substrate,
When forming a vertical diode by laminating a polycrystalline semiconductor film or an amorphous semiconductor film such as polycrystalline silicon or amorphous silicon on the insulating film, at least a silicide film such as tungsten silicon or molybdenum silicon is used on the insulating film. 1. A semiconductor device comprising: a conductive film made of a high melting point metal film or an alloy film such as tungsten or molybdenum; and the vertical diode formed on the conductive film.
JP63022195A 1988-02-02 1988-02-02 Semiconductor device Pending JPH01196863A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63022195A JPH01196863A (en) 1988-02-02 1988-02-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63022195A JPH01196863A (en) 1988-02-02 1988-02-02 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH01196863A true JPH01196863A (en) 1989-08-08

Family

ID=12076017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63022195A Pending JPH01196863A (en) 1988-02-02 1988-02-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH01196863A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0550171A2 (en) * 1991-12-30 1993-07-07 AT&T Corp. Integrated circuit with silicon contact to silicide
WO1997032340A1 (en) * 1996-03-01 1997-09-04 Micron Technology, Inc. Novel vertical diode structures with low series resistance
US7166875B2 (en) 1996-03-01 2007-01-23 Micron Technology, Inc. Vertical diode structures
CN104021975A (en) * 2013-02-28 2014-09-03 西门子公司 Embedded pole and deflector

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0550171A2 (en) * 1991-12-30 1993-07-07 AT&T Corp. Integrated circuit with silicon contact to silicide
US5591674A (en) * 1991-12-30 1997-01-07 Lucent Technologies Inc. Integrated circuit with silicon contact to silicide
WO1997032340A1 (en) * 1996-03-01 1997-09-04 Micron Technology, Inc. Novel vertical diode structures with low series resistance
US7166875B2 (en) 1996-03-01 2007-01-23 Micron Technology, Inc. Vertical diode structures
US7170103B2 (en) 1996-03-01 2007-01-30 Micron Technology, Inc. Wafer with vertical diode structures
US7279725B2 (en) 1996-03-01 2007-10-09 Micron Technology, Inc. Vertical diode structures
US7563666B2 (en) 1996-03-01 2009-07-21 Micron Technology, Inc. Semiconductor structures including vertical diode structures and methods of making the same
US8034716B2 (en) 1996-03-01 2011-10-11 Micron Technology, Inc. Semiconductor structures including vertical diode structures and methods for making the same
CN104021975A (en) * 2013-02-28 2014-09-03 西门子公司 Embedded pole and deflector

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