JPH01175796A - Multi-layered circuit board - Google Patents
Multi-layered circuit boardInfo
- Publication number
- JPH01175796A JPH01175796A JP62334032A JP33403287A JPH01175796A JP H01175796 A JPH01175796 A JP H01175796A JP 62334032 A JP62334032 A JP 62334032A JP 33403287 A JP33403287 A JP 33403287A JP H01175796 A JPH01175796 A JP H01175796A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- circuit board
- internal wiring
- multilayer circuit
- insulator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000463 material Substances 0.000 claims abstract description 39
- 239000012212 insulator Substances 0.000 claims abstract description 21
- 239000002887 superconductor Substances 0.000 claims abstract description 17
- 239000004020 conductor Substances 0.000 claims abstract description 16
- 229910052751 metal Inorganic materials 0.000 claims abstract description 13
- 239000002184 metal Substances 0.000 claims abstract description 13
- 239000000203 mixture Substances 0.000 claims abstract description 10
- 239000000919 ceramic Substances 0.000 claims abstract description 8
- 229910001252 Pd alloy Inorganic materials 0.000 claims abstract description 4
- 229910052573 porcelain Inorganic materials 0.000 claims description 7
- 229910052784 alkaline earth metal Inorganic materials 0.000 claims description 2
- 150000001342 alkaline earth metals Chemical class 0.000 claims description 2
- 229910052761 rare earth metal Inorganic materials 0.000 claims description 2
- 229910016553 CuOx Inorganic materials 0.000 claims 1
- 229910009203 Y-Ba-Cu-O Inorganic materials 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 3
- 230000001747 exhibiting effect Effects 0.000 abstract description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052681 coesite Inorganic materials 0.000 abstract description 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 2
- 229910052682 stishovite Inorganic materials 0.000 abstract description 2
- 229910052905 tridymite Inorganic materials 0.000 abstract description 2
- 229910002480 Cu-O Inorganic materials 0.000 abstract 1
- 229910010293 ceramic material Inorganic materials 0.000 abstract 1
- 229910052593 corundum Inorganic materials 0.000 abstract 1
- 239000004615 ingredient Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910001845 yogo sapphire Inorganic materials 0.000 abstract 1
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- 239000010949 copper Substances 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000010953 base metal Substances 0.000 description 3
- 239000011230 binding agent Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910000510 noble metal Inorganic materials 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910000272 alkali metal oxide Inorganic materials 0.000 description 1
- 229910000287 alkaline earth metal oxide Inorganic materials 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 238000001354 calcination Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical group [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 238000010298 pulverizing process Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、電子機器の高密度実装用配線基板として使用
される多層回路基板、特に、セラミックスからなる複数
の絶縁体層を積層一体化し、絶縁体層間に内部配線導体
層を形成してなる多層回路基板に関する。Detailed Description of the Invention (Industrial Application Field) The present invention relates to a multilayer circuit board used as a wiring board for high-density mounting of electronic equipment, in particular, a multilayer circuit board in which a plurality of insulating layers made of ceramics are laminated and integrated, The present invention relates to a multilayer circuit board formed by forming an internal wiring conductor layer between insulator layers.
（従来の技術）
従来、この種の多層回路基板としては、アルミナ等を絶
縁体層材料とし、内部配線材料として金、銀、白金族元
素などの貴金属を使用したもの、あるいは低温焼結磁器
材料を絶縁体層材料とし、銅などの卑金属を内部配線材
料したものなどが実用に供されている。(Prior art) Conventionally, this type of multilayer circuit board uses alumina or the like as an insulator layer material and internal wiring materials using noble metals such as gold, silver, or platinum group elements, or low-temperature sintered porcelain materials. In practical use, the insulator layer material is made of copper, and a base metal such as copper is used as the internal wiring material.
（発明が解決しようとする問題点）
しかしながら、これらの多層回路基板は、内部配線材料
である貴金属が高価であったり、あるいは製造過程での
内部配線材料の酸化等を防止するため窒素雰囲気など特
殊な雰囲気での熱処理が必要であったりするため、コス
トの上昇が避けられないという問題があった。しかも、
従来の多層回路基板では、最近の電子機器、例えば、コ
ンピュータの演算速度の高速化、および実装密度の高度
化などに伴い、内部配線回路の高密度化、微細化が要求
されるようになると、配線抵抗が高くなり、信号の伝送
損失も大きくなったり、発熱が増大するという問題があ
った。(Problems to be Solved by the Invention) However, these multilayer circuit boards require expensive precious metals as internal wiring materials, or special environments such as nitrogen atmosphere to prevent internal wiring materials from oxidizing during the manufacturing process. Since heat treatment may be required in a warm atmosphere, there is a problem in that an increase in cost is unavoidable. Moreover,
With conventional multilayer circuit boards, as the processing speeds of recent electronic devices, such as computers, become faster and the packaging density becomes more sophisticated, higher density and finer internal wiring circuits are required. There were problems such as increased wiring resistance, increased signal transmission loss, and increased heat generation.
これを解決する手段として、多層回路基板の内部配線導
体層の材料として、比較的高い温度で超伝導現象を示し
、冷媒として液体窒素を使用できる超伝導材料、例えば
、９０に前後の温度で超伝導現象を示すＹ−Ｂａ−Ｃｕ
−０系その他の酸化物超伝導材料を採用することが考え
られる。しかしながら、この種の酸化物超伝導材料を内
部配線材料として用いただけでは、その超伝導材料自体
の臨界温度以下に冷却しても内部配線導体層の電気抵抗
が零とならないことが明らかとなった。As a means to solve this problem, we have developed superconducting materials that exhibit superconductivity at relatively high temperatures and can use liquid nitrogen as a coolant, such as superconducting materials that exhibit superconductivity at temperatures around 90°C as materials for the internal wiring conductor layers of multilayer circuit boards. Y-Ba-Cu exhibiting conduction phenomenon
It is conceivable to use -0 series or other oxide superconducting materials. However, it has become clear that if this type of oxide superconducting material is simply used as an internal wiring material, the electrical resistance of the internal wiring conductor layer will not become zero even if it is cooled below the critical temperature of the superconducting material itself. .
（問題点を解決するための手段）
本発明は、前記問題点を解決するだめの手段として、第
１図に示すように、セラミックスからなる複数の絶縁体
層ｌを積層一体化し、絶縁体層間に内部配線導体層２を
形成してなる多層回路基板３において、多層回路基板３
の内部配線導体層２を超伝導体層４で形成し、かつ、該
超伝導体層４と絶縁体層ｌとの間に金属層５を介在させ
るようにしたものである。(Means for Solving the Problems) As a means for solving the above-mentioned problems, the present invention, as shown in FIG. In the multilayer circuit board 3 formed by forming the internal wiring conductor layer 2 on the multilayer circuit board 3,
The internal wiring conductor layer 2 is formed of a superconductor layer 4, and a metal layer 5 is interposed between the superconductor layer 4 and the insulator layer l.
超伝導体層の材料としては、比較的高い温度で超伝導現
象を示す一般式：
％式％）
（但し、Ｒｅは少なくとも一種の希土類元素、Ｍｅは少
なくとも一種のアルカリ土金属である）で表される公知
の酸化物超伝導材料、例えば、Ｙ−Ｂａ−Ｃｕ−０系超
伝導材料を採用するのが好適である。The material for the superconductor layer is expressed by the general formula that exhibits superconductivity at relatively high temperatures: (where Re is at least one rare earth element and Me is at least one alkaline earth metal). It is preferable to employ a known oxide superconducting material such as a Y-Ba-Cu-0 based superconducting material.
また、金属層の材料としては、貴金属は勿論のこと、銅
やニッケル等の卑金属など任意のものを採用できるが、
コスト的にはＡｇ−Ｐｄ合金や、卑金属が好適である。Furthermore, as the material for the metal layer, any material can be used, including not only noble metals but also base metals such as copper and nickel.
In terms of cost, Ag-Pd alloys and base metals are preferred.
また、絶縁体層を形成する磁器材料としては、公知の磁
器組成物のうち任意のものを採用できるが、低温焼結磁
器組成物、例えば、５ｉＯ１２５〜７０％、Ａｔ、ｏｘ
１〜３０％、Ｂ、０． １．５〜５％、およびＳｒ
Ｏ２５〜６０％からなる低温焼結磁器組成物、あるいは
、該磁器組成物において、ＳｒＯの一部をＢａＯで置換
し、ＳｒＯとＢａＯの総量を２５〜７０％としたもの、
あるいは、これらにアルカリ金属酸化物および／または
アルカリ土金属酸化物を１％以下含有させた低温焼結磁
器組成物が好適である。これらの磁器組成物は、比誘電
率が６前後と低く、ｔａｎδが０．２％以下で、焼結温
度が１０００℃以下と低いので、Ｃｕ等を超伝導体層と
絶縁体層との間に介在させる金属層の材料として使用す
ることを可能にしている。Furthermore, as the porcelain material forming the insulator layer, any known porcelain composition can be adopted, but low-temperature sintered porcelain compositions such as 5iO125-70%, At, ox
1-30%, B, 0. 1.5-5%, and Sr
A low-temperature sintered porcelain composition consisting of 5 to 60% O2, or a ceramic composition in which part of SrO is replaced with BaO so that the total amount of SrO and BaO is 25 to 70%,
Alternatively, a low-temperature sintered porcelain composition containing 1% or less of an alkali metal oxide and/or an alkaline earth metal oxide is suitable. These ceramic compositions have a low dielectric constant of around 6, a tan δ of 0.2% or less, and a low sintering temperature of 1000°C or less, so Cu or the like is used between the superconductor layer and the insulator layer. This makes it possible to use it as a material for a metal layer interposed in the process.
（作用）
前記構造の多層回路基板は、その製造過程で複数の積層
された絶縁体層を一体化させるため熱処理が行なわれる
が、絶縁体層材料と内部配線導体層との間に介在する金
属層が両者を隔離しているため、低温で焼結する超伝導
材料と絶縁体層材料との反応が防止される。(Function) In the multilayer circuit board having the above structure, heat treatment is performed in order to integrate a plurality of laminated insulator layers in the manufacturing process, but the metal interposed between the insulator layer material and the internal wiring conductor layer Reaction between the superconducting material and the insulator layer material, which sinter at low temperatures, is prevented because the layers separate them.
（実施例）
Ｓｉ０２、ＡＩ、Ｏ，、ＢａｃＯｓ、Ｂ、Ｏ，，５ｒＯ
１Ｃｒ２０．、およびＣａＣ０ｔを原料として用い、こ
れらの原料を秤量し、得られた原料混合物を８５０〜９
５０°Ｃで仮焼し、粉砕した後、少量の有機バインダを
加えて混練し、ドクターブレード法により、第２図イに
示すような、厚さ１００μｍのグリーンシート６を得た
。(Example) Si02, AI, O,, BacOs, B, O,, 5rO
1Cr20. , and CaC0t as raw materials, these raw materials were weighed, and the resulting raw material mixture was 850 to 9
After calcining at 50°C and pulverizing, a small amount of organic binder was added and kneaded, and a green sheet 6 having a thickness of 100 μm as shown in FIG. 2A was obtained by a doctor blade method.
このグリーンシート６上に、Ａｇ−３０％Ｐｄ合金粉末
と、ガラスおよび有機バインダを混合した導電性ペース
トを５μｍの厚さに塗布し、乾燥させて金属層形成層７
を形成した（第２図口）。A conductive paste containing a mixture of Ag-30% Pd alloy powder, glass and an organic binder is coated on the green sheet 6 to a thickness of 5 μm, and dried to form a metal layer forming layer 7.
was formed (Figure 2).
この金属層形成層７の上に、ＹＢａ２Ｃｕ、Ｏ，の粉末
と有機バインダからなる超伝導体層形成用ペーストを塗
布して５μの厚さに塗布し超伝導体層形成層８を形成し
く同図ハ）、該超伝導体層形成層８の上に前記導電性ペ
ーストを塗布して５μｍ厚の金属層形成層７を形成した
（二）。On top of this metal layer forming layer 7, a superconductor layer forming paste consisting of YBa2Cu, O, powder and an organic binder is applied to a thickness of 5μ to form a superconductor layer forming layer 8. In Figure C), the conductive paste was applied onto the superconductor layer forming layer 8 to form a metal layer forming layer 7 having a thickness of 5 μm (2).
このようにして得たグリーンシートを数枚重ね、その上
下両面に何も塗布されていないグリーンシートを一枚づ
つそれぞれ載せて圧着し、第１図ホに示す積層体ｌＯを
得た。この場合、各層の導体が導通するようにあるいは
外部電極とのコンタクトをとった。次いで、この積層体
を９００−１゜００°Ｃで空気中２〜５時間焼成して多
層回路基板を得た。Several green sheets obtained in this way were stacked, and one green sheet with no coating applied was placed on each of the top and bottom surfaces of the green sheets and pressed together to obtain a laminate 1O shown in FIG. 1E. In this case, the conductors in each layer were made conductive or in contact with external electrodes. Next, this laminate was fired in air at 900-1°00°C for 2 to 5 hours to obtain a multilayer circuit board.
この多層回路基板を、液体窒素で冷却しながら多部電極
を介して内部配線導体層の抵抗測定を行った。その結果
を第３図に実線で示す。While cooling this multilayer circuit board with liquid nitrogen, the resistance of the internal wiring conductor layer was measured via multiple electrodes. The results are shown in FIG. 3 as a solid line.
（比較例）
実施例で調製したグリーンシートの上に、実施例で調製
した超伝導体層形成用ペーストを直接塗布して５μｍ厚
さの超伝導体層形成層を形成し、これを数枚重ねた後、
その上下両面に何も塗布されていないグリーンシートを
一枚づつそれぞれ載せて圧着し、実施例１と同様に処理
して多層回路基板を得Ｉ：。(Comparative example) The superconductor layer forming paste prepared in the example was directly applied onto the green sheet prepared in the example to form a 5 μm thick superconductor layer forming layer, and several sheets of this were coated. After stacking,
One uncoated green sheet was placed on each of the top and bottom surfaces and pressed together, and treated in the same manner as in Example 1 to obtain a multilayer circuit board I:.
この多層回路基板を実施例と同様にして液体窒素で冷却
しながら、内部配線導体層の抵抗測定を行った。その結
果を第３図に一点鎖線で示す。The resistance of the internal wiring conductor layer was measured while cooling this multilayer circuit board with liquid nitrogen in the same manner as in the example. The results are shown in FIG. 3 by the dashed line.
第３図の結果から明らかなように、本発明に係る多層回
路基板は、９０に前後で電気抵抗がＯになり、超伝導転
移を示すのに対して、比較例のものでは、超伝導材料自
体の臨界温度に達しても電気抵抗がＯにならず超伝導現
象を示さなかった。As is clear from the results in FIG. 3, the multilayer circuit board according to the present invention has an electrical resistance of O at around 90°C, indicating a superconducting transition, whereas the comparative example has a superconducting material. Even when it reached its own critical temperature, its electrical resistance did not become O, and it did not exhibit superconductivity.
比較例の多層回路基板で超伝導が実現しないのは、焼成
時に超伝導材料と絶縁体層材料であるセラミックスとが
反応するためであると推測される。It is presumed that the reason why superconductivity is not achieved in the multilayer circuit board of the comparative example is that the superconducting material and the ceramic, which is the insulator layer material, react during firing.
（発明の効果）
以上の説明から明らかなように、本発明によれば、比較
的低い温度で超伝導を示す酸化物超伝導材料を内部配線
材料とした多層回路基板を得ることができ、液体窒素温
度で電気抵抗が０であるため、年々高速化するコンピュ
ータの演算速度に対応することができると同時に、省電
力化を計ることができるなど優れた効果が得られる。(Effects of the Invention) As is clear from the above description, according to the present invention, it is possible to obtain a multilayer circuit board using an oxide superconducting material that exhibits superconductivity at a relatively low temperature as an internal wiring material, and Since the electrical resistance is 0 at nitrogen temperature, it is possible to cope with the calculation speed of computers, which are increasing year by year, and at the same time, it has excellent effects such as being able to save power.
第１図は本発明に係る多層回路基板の要部を示す断面図
、第２図はその製造過程を示す説明図、第３図は本発明
および比較例に係る多層回路基板の電気的特性を示すグ
ラフである。
１：絶縁体層、２：内部配線導体層、３：多層回路基板
、４：超伝導体層、５：金属層。
特許出願人 株式会社村田製作所
代理人 弁理士 青 山 葆 ほか２名第１図
第２図Fig. 1 is a cross-sectional view showing the main parts of the multilayer circuit board according to the present invention, Fig. 2 is an explanatory diagram showing the manufacturing process, and Fig. 3 shows the electrical characteristics of the multilayer circuit board according to the present invention and a comparative example. This is a graph showing. 1: Insulator layer, 2: Internal wiring conductor layer, 3: Multilayer circuit board, 4: Superconductor layer, 5: Metal layer. Patent applicant Murata Manufacturing Co., Ltd. Agent Patent attorney Aoyama Aoyama and 2 others Figure 1 Figure 2
Claims (5)
化し、絶縁体層間に内部配線導体層を形成してなる多層
回路基板において、前記内部配線導体層が超伝導体層か
らなり、該超伝導体層と前記絶縁体層との間に金属層を
介在させてなることを特徴とする多層回路基板。(1) In a multilayer circuit board formed by laminating and integrating a plurality of insulator layers made of ceramics and forming an internal wiring conductor layer between the insulator layers, the internal wiring conductor layer is made of a superconductor layer, and the superconductor A multilayer circuit board characterized in that a metal layer is interposed between the body layer and the insulator layer.
なくとも一種のアルカリ土金属である）で表される酸化
物超伝導材料である特許請求の範囲第１項記載の多層回
路基板。(2) A patent claim in which the superconducting material is an oxide superconducting material represented by the general formula: (ReMe)CuOx (where Re is at least one rare earth element and Me is at least one alkaline earth metal) The multilayer circuit board according to item 1.
料である特許請求の範囲第１項記載の多層回路基板。(3) The multilayer circuit board according to claim 1, wherein the superconducting material is a Y-Ba-Cu-O based superconducting material.
範囲第１項〜第３項のいづれか一項記載の多層回路基板
。(4) The multilayer circuit board according to any one of claims 1 to 3, wherein the metal layer is made of an Ag-Pd alloy.
＿２Ｏ＿３１〜３０％、Ｂ＿２Ｏ＿３１．５〜５％、お
よびＳｒＯ２５〜６０％を主成分とする低温焼結磁器組
成物からなる特許請求の範囲第１項〜第４項のいづれか
一項記載の多層回路基板。(5) The insulator layer is made of SiO_225-70%, Al
_2O_31-30%, B_2O_31.5-5%, and SrO25-60% as main components. The multilayer circuit board according to any one of claims 1 to 4, comprising a low-temperature sintered porcelain composition containing 31 to 30% of B_2O_3, and 25 to 60% of SrO. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62334032A JPH01175796A (en) | 1987-12-29 | 1987-12-29 | Multi-layered circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62334032A JPH01175796A (en) | 1987-12-29 | 1987-12-29 | Multi-layered circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01175796A true JPH01175796A (en) | 1989-07-12 |
Family
ID=18272740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62334032A Pending JPH01175796A (en) | 1987-12-29 | 1987-12-29 | Multi-layered circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01175796A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03280459A (en) * | 1990-03-29 | 1991-12-11 | Mitsubishi Heavy Ind Ltd | Hybrid ic board |
-
1987
- 1987-12-29 JP JP62334032A patent/JPH01175796A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03280459A (en) * | 1990-03-29 | 1991-12-11 | Mitsubishi Heavy Ind Ltd | Hybrid ic board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100345031B1 (en) | Electronic device and its fabrication method | |
| CA2345764C (en) | Capacitance-coupled high dielectric constant embedded capacitors | |
| US4837408A (en) | High density multilayer wiring board and the manufacturing thereof | |
| JPS61288498A (en) | Electronic component-built-in multilayer ceramic substrate | |
| JPH1025157A (en) | Dielectric ceramic composition and multilayer capacitor | |
| JPH025019B2 (en) | ||
| JPH01175796A (en) | Multi-layered circuit board | |
| US5011530A (en) | Metallizing composition for use with ceramics | |
| US5571761A (en) | Ceramic substrate circuit substrate | |
| JPS62250626A (en) | Thick film capacitor and manufacture of the same | |
| JPS63122295A (en) | Multilayer ceramic board with built-in electronic component | |
| US5120473A (en) | Metallizing composition for use with ceramics | |
| JP3805173B2 (en) | Glass ceramic sintered body and multilayer wiring board using the same | |
| JP3793557B2 (en) | Glass ceramic sintered body and multilayer wiring board using the same | |
| US6002578A (en) | Ceramic substrate, circuit substrate and electronic circuit substrate by use thereof and method for preparing ceramic substrate | |
| JP2002043759A (en) | Multilayer wiring board | |
| JPS6092697A (en) | Composite laminated ceramic part | |
| JP2590323B2 (en) | Manufacturing method of ceramics | |
| JPH0216004B2 (en) | ||
| JPS62109390A (en) | Printed circuit substrate | |
| JP2652229B2 (en) | Multilayer circuit ceramic substrate | |
| JPS63169798A (en) | Multilayer ceramic board with built-in electronic parts | |
| JP2590322B2 (en) | Manufacturing method of ceramics | |
| JPH0744323B2 (en) | Superconducting ceramic substrate | |
| JPS61170094A (en) | Manufacture of ceramic multilayer interconnection circuit board |