JPH01166414A - Manufacture of chip-form jumper element - Google Patents
Manufacture of chip-form jumper elementInfo
- Publication number
- JPH01166414A JPH01166414A JP32582787A JP32582787A JPH01166414A JP H01166414 A JPH01166414 A JP H01166414A JP 32582787 A JP32582787 A JP 32582787A JP 32582787 A JP32582787 A JP 32582787A JP H01166414 A JPH01166414 A JP H01166414A
- Authority
- JP
- Japan
- Prior art keywords
- baking
- chip
- pattern layer
- jumper element
- ceramic green
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 238000000034 method Methods 0.000 claims abstract description 23
- 239000000919 ceramic Substances 0.000 claims abstract description 18
- 239000004020 conductor Substances 0.000 claims abstract description 16
- 239000011521 glass Substances 0.000 claims description 7
- 238000010304 firing Methods 0.000 claims description 6
- 239000002241 glass-ceramic Substances 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 abstract description 6
- 230000001070 adhesive effect Effects 0.000 abstract description 6
- 238000007639 printing Methods 0.000 abstract description 5
- 230000005540 biological transmission Effects 0.000 abstract 1
- 230000002226 simultaneous effect Effects 0.000 abstract 1
- 238000005245 sintering Methods 0.000 abstract 1
- 238000007650 screen-printing Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 238000009413 insulation Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 238000005452 bending Methods 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 2
- 238000010344 co-firing Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
Landscapes
- Manufacturing Of Electric Cables (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はチップ状ジャンパー素子の製造方法に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing a chip-like jumper element.
従来の技術
近年、電子機器の軽薄短小化に対する要求がますます増
大していく中、回路基板の配線密度を高めるため、配線
と配線のクロスする部分に、チップ状ジャンパー素子（
チップジャンパー）カ多く用いられるようになってきた
。Conventional technology In recent years, with the increasing demand for lighter, thinner, and smaller electronic devices, chip-like jumper elements (
chip jumpers) have come into widespread use.
従来の小型のチップジャンパーは、チップ抵抗器の製造
工程（工業調査会発行最新サーフェイス・マウントテク
ノロジーＰ２７〜Ｐ３３）の抵抗体の部分をＡｇ系ペー
ストからなる導体部に置き換え、更にトリミング工程を
排除し、抵抗値選別を導通チエツクに置き換えたもので
ある。その工程を第６図に示す。まず焼成済みのアルミ
ナ基板にＡｇ系ペーストをスクリーン印刷することによ
り上面電極パターンを形成し、空気中８５０℃で１時間
焼成する。その後、抵抗印刷と同様の印刷パターンを用
いて、五ｇ系ペーストをスクリーン印刷することにより
導体パターンを形成し、空気中８５０℃で１時間焼成す
る。次に、ホウケイ酸鉛系のガラスペーストをスクリー
ン印刷することにより絶縁ガラスパターン層を形成し空
気中６ｏｏ℃で１時間焼成する。その後、−次分割後、
更に端面電極層をムｇ系ペーストをローラーにより塗布
することにより形成し空気中６００℃で１時間焼成する
。Conventional small chip jumpers replace the resistor part of the chip resistor manufacturing process (Latest Surface Mount Technology P27-P33 published by the Industrial Research Council) with a conductor part made of Ag-based paste, and further eliminate the trimming process. , the resistance value selection is replaced with a continuity check. The process is shown in FIG. First, a top electrode pattern is formed by screen printing an Ag-based paste on a fired alumina substrate, and then fired in air at 850° C. for 1 hour. Thereafter, a conductor pattern is formed by screen printing the 5g paste using a printing pattern similar to that used for resistance printing, and baking is performed in air at 850° C. for 1 hour. Next, an insulating glass pattern layer is formed by screen printing a lead borosilicate glass paste, and is fired in air at 60° C. for 1 hour. Then, after −th division,
Furthermore, an end face electrode layer is formed by applying a mug paste using a roller, and is baked in air at 600° C. for 1 hour.
次に二次分割を行い、露出電極面にＮｉと５ｎ−ｐｂメ
ツキ層を電解メツキによシ施し、導通チエツクを行い完
成するといった工程を用いてきた。Next, a process has been used in which secondary division is performed, a Ni and 5N-PB plating layer is electrolytically plated on the exposed electrode surface, and a continuity check is performed to complete the process.
発明が解決しようとする問題点
しかし、この工程では、セラミック基板のサイズのバラ
付きに応じて、印刷マスクを多数用意する必要があった
。更に上面電極層、導体パターン層、絶縁ガラス層、端
面電極層をそれぞれ個別に印刷と焼成を行っているため
、焼成回数が多く。Problems to be Solved by the Invention However, in this process, it was necessary to prepare a large number of printing masks depending on the variation in the size of the ceramic substrate. Furthermore, because the top electrode layer, conductor pattern layer, insulating glass layer, and end electrode layer are each printed and fired individually, the number of firings is large.
工程が複雑になるといった問題があった。There was a problem that the process became complicated.
本発明は、このような問題点を解決するもので。The present invention solves these problems.
工程の簡略化を図ることを目的とする。The purpose is to simplify the process.
問題点を解決するだめの手段 本発明のチップ状ジャンパー素子の製造方法は。A foolproof way to solve problems A method for manufacturing a chip-like jumper element according to the present invention.
未焼成のセラミックグリーンシート上に、導体パターン
層を形成し、その導体パターンを覆う絶縁パターン層を
形成し、これらを同時に焼成するように構成したもので
ある。A conductor pattern layer is formed on an unfired ceramic green sheet, an insulating pattern layer is formed to cover the conductor pattern, and these are fired simultaneously.
作用
これにより印刷マスクの一元化、及び−括焼成によシ焼
成回数を削減し工程の簡略化を実現することができる。As a result, it is possible to unify the printing masks, reduce the number of firings by batch firing, and simplify the process.
実施例
以下１本発明の一実施例について、図面を参照しながら
説明する。Embodiment One embodiment of the present invention will be described below with reference to the drawings.
第１図は本発明のチップ状ジャンパー素子の製造方法の
実施例１を示す工程図、第２図は第１図の各工程におけ
る製品の上面図あるいは斜視図。FIG. 1 is a process diagram showing Embodiment 1 of the method for manufacturing a chip-like jumper element of the present invention, and FIG. 2 is a top view or perspective view of the product in each step of FIG. 1.
第３図は本発明のチップ状ジャンパー素子の製造方法の
実施例２を示す工程図、第４図は第３図の各工程におけ
る製品の上面図と斜視図、第６図は実施例２による完成
品の断面図を示したものである。FIG. 3 is a process diagram showing Example 2 of the method for manufacturing a chip-like jumper element of the present invention, FIG. 4 is a top view and perspective view of the product in each step of FIG. 3, and FIG. 6 is according to Example 2. It shows a cross-sectional view of the finished product.
まず、実施例１のチップ状ジャンパー素子の製造方法に
付いて第１図と第２図を用いながら説明する。First, a method for manufacturing the chip-like jumper element of Example 1 will be described with reference to FIGS. 1 and 2.
まずム１２ｏ、／ガラス比が６０ ／ ５０の粉体にバ
インダーを加え、スラリー状にしたものを、第２図ａの
ように未焼成のセラミックグリーンシート１に成形する
。次に、その上に、五ｇ系ペーストをスクリーン印刷す
ることにより、第２図すのと
ように導体パター層２を形成する。その上に、ガラスセ
ラミックペーストをスクリーン印刷することにより、第
２図Ｃのようにセラミック絶縁パターン層３を形成する
。次に、薄板状の刃を押し付けることにより未焼成のセ
ラミックグリーンシート（ｔ＝ｏ、ａｍ）に、コノ厚ミ
（７） ５０ ％程度（Ｄ深さの短冊分割のためのＶ溝
６と個片分割のためのＶ溝６を形成する。その後、空気
中８００℃〜１０００℃で２時間（ピーク２０分）のプ
ロファイルにより、焼成する。更に、短冊分割のための
Ｖ溝５に沿って第２図ｆのように短冊状に分割し。First, a binder is added to powder having a glass ratio of 60/50, and the slurry is formed into an unfired ceramic green sheet 1 as shown in FIG. 2a. Next, a conductor pattern layer 2 is formed thereon by screen printing a 5g paste as shown in FIG. A ceramic insulation pattern layer 3 is formed thereon by screen printing a glass-ceramic paste as shown in FIG. 2C. Next, by pressing a thin plate-shaped blade onto the unfired ceramic green sheet (t=o, am), the thickness of the groove (7) is approximately 50% (with the V groove 6 for dividing into strips with a depth of D) and the individual pieces. A V-groove 6 for dividing into strips is formed.Then, baking is performed in air at 800°C to 1000°C for 2 hours (peak 20 minutes) according to the profile. Divide into strips as shown in Figure 2 f.
更に個片分割のためのＶ溝６に沿って第２図ｇのように
個片状に分割をおこなう。この後、露出電極面にＮ１と
５ｎ−Ｐｂメツキ層を電解メツキによって施す。最後に
導通チエツクを行い、チップ状ジャンパー素子が完成す
る。実施例１によるチップ状ジャンパー素子の導通抵抗
値は約４ｍオーム。Furthermore, it is divided into individual pieces along the V-groove 6 for dividing into individual pieces as shown in FIG. 2g. Thereafter, N1 and 5n-Pb plating layers are applied to the exposed electrode surface by electrolytic plating. Finally, a continuity check is performed, and the chip-like jumper element is completed. The conduction resistance value of the chip-like jumper element according to Example 1 is about 4 mΩ.
電極の接着強度は約２．２１５／−である。The adhesive strength of the electrodes is approximately 2.215/-.
同時焼成する温度が８００℃未満であると、製品の抗折
強度や電極の接着強度が弱くなるといった問題が生じ、
また１０００℃より高い温度にすると、過焼結により導
通抵抗が高くなるといった問題が生じる。If the co-firing temperature is less than 800°C, problems will occur such as the product's bending strength and electrode adhesive strength becoming weaker.
Moreover, if the temperature is higher than 1000° C., a problem arises in that conduction resistance increases due to oversintering.
次に実施例２について第３図と第４図を用いながら説明
する。Next, Example 2 will be explained using FIGS. 3 and 4.
まずム１！２０ｓ／ガラス比がｓｏ／ｓｏの粉体にバイ
ンダーを加え、スラリー状にしたものを、第４図ａのよ
うに未焼成のセラミックグリーンシート１に成形する。First, a binder is added to powder having a so/so ratio of 1 to 20 s/glass, and the slurry is formed into an unfired ceramic green sheet 1 as shown in FIG. 4a.
次に、その上に、Ａｇ系ベーストをスクリーン印刷する
ことによシ第４図すのように導体パターン層２を形成す
る。その上に、ガラスセラミックペーストをスクリーン
印刷することにより第４図ｇのようにセラミック絶縁パ
ターン層３を形成する。次にガラスペーストをスクリー
ン印刷することにより第４図ｄのように文字。Next, a conductor pattern layer 2 is formed thereon by screen printing an Ag base as shown in FIG. A ceramic insulation pattern layer 3 is formed thereon by screen printing a glass ceramic paste as shown in FIG. 4g. Next, by screen printing the glass paste, the letters as shown in Figure 4d are printed.
記号を示す捺印層４を形成する。その後、薄板状の刃を
押し付けることにより第４図ｅのように未焼成のセラミ
ックグリーンシー） （ｔ ＋Ｏ，ｅｓ＋ｓ ）に、こ
の厚みの６０％程度の深さの個片分割のためのＶ溝６を
形成する。その後に、薄板状の刃を押し付けることによ
り第４図ｆのように短冊状グリーンシートに切断を行う
。この後、端面にムｇ系ペーストをローラーにより塗布
することにより第４図ｇのように端面電極層７を形成す
る。その後、空気中８００℃〜１０００℃で２時間（ピ
ーク２０分）のプロファイルによシ、焼成する。さらに
１個片分割のためのＶ溝６に沿って第４図りのように個
片分割を行い、露出電極面にＮ１とａｎ−Ｐｂメツキ層
８を電解メツキによシ施す。最後に導通チエツクを行い
、第６図のようにチップ状ジャンパー素子が完成する。A stamp layer 4 showing a symbol is formed. Thereafter, by pressing a thin plate-shaped blade, a V-groove for dividing into pieces with a depth of about 60% of this thickness is formed in the unfired ceramic green seam (t + O, es + s) as shown in Figure 4e. form 6. Thereafter, by pressing a thin blade, the green sheet is cut into strips as shown in FIG. 4f. Thereafter, a mug paste is applied to the end face using a roller to form the end face electrode layer 7 as shown in FIG. 4g. Thereafter, it is baked in air at 800°C to 1000°C according to the profile for 2 hours (peak time: 20 minutes). Further, it is divided into individual pieces as shown in the fourth diagram along the V groove 6 for dividing into individual pieces, and a N1 and an-Pb plating layer 8 is electrolytically plated on the exposed electrode surface. Finally, a continuity check is performed, and the chip-shaped jumper element is completed as shown in FIG.
本実施例によるチップ状ジャンパー素子の導通抵抗値は
約４ｍオーム、電極の接着強度は約２．２Ｋｐ／−であ
る。The conduction resistance value of the chip-shaped jumper element according to this example is about 4 mΩ, and the adhesive strength of the electrodes is about 2.2 Kp/-.
同時焼成する温度が８００℃未満であると、製品の抗折
強度や電極の接着強度が弱くなるといった問題が生じ、
また１ ０００℃より高い温度にすると過焼結によシ導
通抵抗が高くなるといった問題が生じる。If the co-firing temperature is less than 800°C, problems will occur such as the product's bending strength and electrode adhesive strength becoming weaker.
Furthermore, if the temperature is higher than 1,000°C, a problem arises in that conduction resistance increases due to oversintering.
なお実施例１では捺印層は形成しなかったが。Note that in Example 1, no marking layer was formed.
個別に印刷、焼成してもよい。また、電極はＡｇ系以外
にもｐｔ、ｐａ等の貴金属系、Ｈ２雰囲気中であればＣ
ｕ系などを用いることができる。また、グリーンシート
にはム１２０３／ガラス比が５０７５０にしたが絶縁性
セラミック材料も用いることもできる。They may be printed and fired individually. In addition to Ag-based electrodes, noble metal-based electrodes such as pt and pa can be used, and if the electrode is in an H2 atmosphere, carbon
u series etc. can be used. Furthermore, although the glass ratio is 50,750, an insulating ceramic material may also be used for the green sheet.
発明の効果
以上の説明から明らかなように本発明は、未焼成のセラ
ミックグリーンシート上に、導体パターン層を形成し、
前記導体パターンを覆うセラミック絶縁パターン層を形
成し、同時に焼成するように構成されているので、マス
クの一元化、−括焼成による工程の削減といった優れた
効果が得られる。また、セラミックグリーンシートと端
面電極層を一括焼成しているために、従来法に比べ電極
の接着強度が約１６％アップする（従来品１．９卒／−
→２．２１１ｐ／Ｊ）といった効果も得られる。Effects of the Invention As is clear from the above explanation, the present invention forms a conductive pattern layer on an unfired ceramic green sheet,
Since the ceramic insulating pattern layer covering the conductor pattern is formed and fired at the same time, excellent effects such as unification of masks and reduction of steps due to simultaneous firing can be obtained. In addition, since the ceramic green sheet and the end electrode layer are fired all at once, the adhesive strength of the electrode is increased by approximately 16% compared to the conventional method (conventional product 1.9/-
→2.211p/J).
【図面の簡単な説明】
第１図は本発明のチップ状ジャンパー素子の製造方法の
実施例１による工程図、第２図は第１図の各工程におけ
る製品の上面図および斜視図、第３図は本発明のチップ
状ジャンパー素子の製造方法の実施例２による工程図、
第４図は第３図の各工程における製品の上面図と斜視図
、第６図は実施例２による完成品の断面図、第６図は従
来のチップ状ジャンパー素子の製造工程図である。
１・・・・・・未焼成のセラミックグリーンシート、２
・・・・・・導体パターン層、３・・・・・・セラミッ
ク絶縁パターン層、４・・・・・・捺印層、５．６・・
・・・・Ｖ溝。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名簿
１ 因
第２図
第３図
第４図
第５図[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a process diagram according to Embodiment 1 of the method for manufacturing a chip-like jumper element of the present invention, FIG. 2 is a top view and perspective view of the product in each step of FIG. 1, and FIG. The figure is a process diagram according to Example 2 of the method for manufacturing a chip-like jumper element of the present invention,
4 is a top view and a perspective view of the product in each step of FIG. 3, FIG. 6 is a cross-sectional view of a completed product according to Example 2, and FIG. 6 is a diagram of the manufacturing process of a conventional chip-shaped jumper element. 1... Unfired ceramic green sheet, 2
... Conductor pattern layer, 3 ... Ceramic insulation pattern layer, 4 ... Imprint layer, 5.6 ...
...V groove. Name of agent: Patent attorney Toshio Nakao and 1 other list
1 Cause Figure 2 Figure 3 Figure 4 Figure 5
Claims (3)
ーン層を形成し、その導体パターン層の一部を覆う絶縁
パターン層を形成した後、同時に焼成することを特徴と
するチップ状ジャンパー素子の製造方法。(1) A method for manufacturing a chip-like jumper element, which comprises forming a conductor pattern layer on an unfired ceramic green sheet, forming an insulating pattern layer covering a part of the conductor pattern layer, and then firing the same at the same time. .
ーン層を形成し、その導体パターン層の一部を覆う絶縁
パターン層を形成した後、ガラスセラミックあるいはガ
ラスからなる文字，記号を示す捺印層を形成し、その後
端面電極層を形成した後、同時に焼成することを特徴と
する特許請求の範囲第１項記載のチップ状ジャンパー素
子の製造方法。(2) After forming a conductor pattern layer on an unfired ceramic green sheet and forming an insulating pattern layer covering a part of the conductor pattern layer, a marking layer showing characters and symbols made of glass ceramic or glass is formed. 2. The method of manufacturing a chip-like jumper element according to claim 1, wherein the step of forming the end face electrode layer is then simultaneously fired.
ることを特徴とする特許請求の範囲第１項または第２項
記載のチップ状ジャンパー素子の製造方法。(3) The method for manufacturing a chip-like jumper element according to claim 1 or 2, characterized in that the temperature for simultaneous firing is 800°C to 1000°C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32582787A JPH01166414A (en) | 1987-12-23 | 1987-12-23 | Manufacture of chip-form jumper element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32582787A JPH01166414A (en) | 1987-12-23 | 1987-12-23 | Manufacture of chip-form jumper element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01166414A true JPH01166414A (en) | 1989-06-30 |
Family
ID=18181046
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32582787A Pending JPH01166414A (en) | 1987-12-23 | 1987-12-23 | Manufacture of chip-form jumper element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01166414A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0362459U (en) * | 1989-10-20 | 1991-06-19 | ||
| JP2008078293A (en) * | 2006-09-20 | 2008-04-03 | Matsushita Electric Ind Co Ltd | Chip component and manufacturing method thereof |
-
1987
- 1987-12-23 JP JP32582787A patent/JPH01166414A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0362459U (en) * | 1989-10-20 | 1991-06-19 | ||
| JP2008078293A (en) * | 2006-09-20 | 2008-04-03 | Matsushita Electric Ind Co Ltd | Chip component and manufacturing method thereof |
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