JPH01125956A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01125956A JPH01125956A JP28581787A JP28581787A JPH01125956A JP H01125956 A JPH01125956 A JP H01125956A JP 28581787 A JP28581787 A JP 28581787A JP 28581787 A JP28581787 A JP 28581787A JP H01125956 A JPH01125956 A JP H01125956A
- Authority
- JP
- Japan
- Prior art keywords
- aluminum
- signal line
- semiconductor device
- layer
- entering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 14
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 28
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 26
- 238000009792 diffusion process Methods 0.000 claims description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 3
- 235000010210 aluminium Nutrition 0.000 abstract 6
- 239000000758 substrate Substances 0.000 description 3
- 230000007257 malfunction Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6616—Vertical connections, e.g. vias
- H01L2223/6622—Coaxial feed-throughs in active or passive substrates
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分舒〕
この発明は半導体装置にお−で、信号用配線へのノイズ
の進入防止に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention relates to preventing noise from entering signal wiring in a semiconductor device.
第５図は従来の半導体装置の断面図で１図にお−て１口
】Ｆｉ基板、直２）＃ｉ信号Ｍ、（３）Ｆｉ拡散層を示
す。FIG. 5 is a cross-sectional view of a conventional semiconductor device, showing one (1) Fi substrate, (2) #i signal M, and (3) Fi diffusion layer.
従来の半導体装置は上記のように構成されてお９％基板
（１）上に形成され北回路の信号線ｔ２）はシールドが
なされて鱒ない。The conventional semiconductor device is constructed as described above and is formed on a 9% substrate (1), and the signal line t2 of the north circuit is shielded so that it is not exposed.
従来の半導体装置は以上のように構成さｎてｈたので、
外部からのノイズが信号線に進入して、回路が誤動作す
るなどの問題点かあつ次。Since the conventional semiconductor device was constructed as described above,
There are other problems such as external noise entering the signal line and causing the circuit to malfunction.
この発明は上記のような問題点を解消する九めになさｔ
ｔ、ｅもので、外部からのノイズが信号線へ進入するの
を防止することの！きる半導体装置を得ることｔ目的と
する。This invention is the ninth attempt to solve the above-mentioned problems.
This is a T and E product that prevents external noise from entering the signal line! The purpose is to obtain a semiconductor device that can be used.
この発明に係る半導体５ｔｌｔｒｔ、信号線ｔおおうシ
ールド配ａｔ備え友ものである。The semiconductor device 5tltrt according to the present invention is equipped with a shield arrangement covering the signal line.
この発明に訃−ては信号線の周りにシールド繍を設ける
ことにより、外部よりのノイズが信号線に進入するのを
防止する。According to the present invention, by providing a shield around the signal line, noise from the outside is prevented from entering the signal line.
第１図、第２図はこの発明の一実施例を示す半導体装置
の断面図及び上面図で１図におりて、（１）はＰ基板ｋ
（２）は信号線アルミで第１アルミ形成時に形成される
。＋３）は？拡散層、（４）は最初に形成されるアルミ
である第１アルミ、ｒｓ＞Ｆｉｚ回目に形成されるアル
ミの第２アルミ、（６）はＰ＋拡散層と第１アルミ＋４
） ｔ ｆｉぐコンタクト、 （７）は第１アルミ（４
）と第２アルミ（５）ｔ−継ぐコンタクト、（８）は絶
縁層である。1 and 2 are a cross-sectional view and a top view of a semiconductor device showing an embodiment of the present invention, in which (1) is a P substrate k
(2) is a signal line aluminum, which is formed when the first aluminum is formed. What about +3)? Diffusion layer, (4) is the first aluminum that is formed first, second aluminum that is formed the rs>Fiz time, (6) is the P+ diffusion layer and the first aluminum +4
) tfig contact, (7) is the first aluminum (4
) and the second aluminum (5) T-joint contact, (8) is an insulating layer.
上記のように構成され九半導体装置において、信号線ア
ルミ１２＋ＩｆｉＰ◆拡散層（３）、第１アルミ（４）
、第２アルミ（５１によっておおわれており、Ｐ１散層
（３）、第１アルミ（４）、第２アルミ（５）をＶｓａ
に継ぐことにニジ、信号線アルミ［２１ＬＩｉシールド
される。この友め外部からのノイズが信号１４ （２１
へ進入するのを防止できる。In the nine semiconductor devices configured as above, the signal line aluminum 12+IfiP◆diffusion layer (3), first aluminum (4)
, the second aluminum (51), and the P1 scattering layer (3), the first aluminum (4), and the second aluminum (5) are covered by Vsa
Next, the signal wire is shielded from aluminum [21LIi. The noise from outside this friend is the signal 14 (21
can be prevented from entering.
なお、上記実施例では信号線ζ２）が、第１アルミ（４
）の場合について示し九が、第３図、第４図のように、
信号線が多結晶シリコンの場合もそｆ′Ｌをおおってい
るＰ４拡散層（３）及び第１アルミ＋４）ｋＶｓ８に継
ぐことにＬつ゛Ｃ同様の効果がある。In the above embodiment, the signal line ζ2) is connected to the first aluminum (4
), as shown in Figures 3 and 4,
In the case where the signal line is made of polycrystalline silicon, the same effect as L-C can be obtained by connecting it to the P4 diffusion layer (3) covering f'L and the first aluminum +4)kVs8.
以上のようにこの発明によれば、信号ｗＬｔシールドす
ることにより外部ノイズが、信号線に進入するのを防止
できる。As described above, according to the present invention, external noise can be prevented from entering the signal line by shielding the signal wLt.
第１図、第２図にこの発明の一実施例による半導体装置
を示す断面図及び上面図、第３図、第４図はこの発明の
他の実施例による半導体装置を示す断面図及び上面図、
第５図は従来の半導体装置の断面図である。
図において、（１）はＰ基板、（２）は信号線アルミ、
ｔａｌｈｐ”拡ａｍ、 （４）ｄ第Ｌ フルｔ 、 （
５１ＵＩ！ ２ フルミ。
（６）は第１アルミとＰ＋拡散層とのコンタクト１７）
Ｆｉ第！アルミと第２フルばとのコンタクト、（８）は
絶縁層、（９）は信号線多結晶シリコンを示す。
なお１図中同一符号は同一、ｔｔは相当部分を示す。1 and 2 are a sectional view and a top view showing a semiconductor device according to an embodiment of the present invention, and FIGS. 3 and 4 are a sectional view and a top view showing a semiconductor device according to another embodiment of the invention. ,
FIG. 5 is a sectional view of a conventional semiconductor device. In the figure, (1) is a P board, (2) is a signal line aluminum,
talhp” expansion, (4) dth L full t, (
51UI! 2 Furumi. (6) is the contact between the first aluminum and the P+ diffusion layer 17)
Fi number! Contact between aluminum and the second full plate, (8) an insulating layer, and (9) a signal line polycrystalline silicon. Note that the same reference numerals in FIG. 1 indicate the same parts, and tt indicates corresponding parts.
Claims (2)
えたことを特徴とする半導体装置。(1) A semiconductor device characterized by comprising a signal line and a shield wiring that covers the signal line.
れ、シールド配線は第１アルミ、第２アルミ及び拡散層
で形成されたことを特徴とする特許請求の範囲第１項記
載の半導体装置。(2) The semiconductor device according to claim 1, wherein the signal line is formed of first aluminum or polymilicon, and the shield wiring is formed of first aluminum, second aluminum, and a diffusion layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28581787A JPH01125956A (en) | 1987-11-11 | 1987-11-11 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28581787A JPH01125956A (en) | 1987-11-11 | 1987-11-11 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01125956A true JPH01125956A (en) | 1989-05-18 |
Family
ID=17696470
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28581787A Pending JPH01125956A (en) | 1987-11-11 | 1987-11-11 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01125956A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03229467A (en) * | 1990-02-05 | 1991-10-11 | Matsushita Electron Corp | Photosemiconductor device |
| JPH0574765A (en) * | 1991-09-12 | 1993-03-26 | Nec Ic Microcomput Syst Ltd | Semiconductor integrated circuit device |
| WO2000039854A1 (en) * | 1998-12-28 | 2000-07-06 | Telephus, Inc. | Coaxial type signal line and manufacturing method thereof |
| US7239219B2 (en) | 2001-12-03 | 2007-07-03 | Microfabrica Inc. | Miniature RF and microwave components and methods for fabricating such components |
| US7259640B2 (en) | 2001-12-03 | 2007-08-21 | Microfabrica | Miniature RF and microwave components and methods for fabricating such components |
| US10297421B1 (en) | 2003-05-07 | 2019-05-21 | Microfabrica Inc. | Plasma etching of dielectric sacrificial material from reentrant multi-layer metal structures |
| US10910635B2 (en) | 2017-11-24 | 2021-02-02 | Nec Corporation | Method for manufacturing electrode for secondary battery and method for manufacturing secondary battery |
-
1987
- 1987-11-11 JP JP28581787A patent/JPH01125956A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03229467A (en) * | 1990-02-05 | 1991-10-11 | Matsushita Electron Corp | Photosemiconductor device |
| JPH0574765A (en) * | 1991-09-12 | 1993-03-26 | Nec Ic Microcomput Syst Ltd | Semiconductor integrated circuit device |
| WO2000039854A1 (en) * | 1998-12-28 | 2000-07-06 | Telephus, Inc. | Coaxial type signal line and manufacturing method thereof |
| US7239219B2 (en) | 2001-12-03 | 2007-07-03 | Microfabrica Inc. | Miniature RF and microwave components and methods for fabricating such components |
| US7259640B2 (en) | 2001-12-03 | 2007-08-21 | Microfabrica | Miniature RF and microwave components and methods for fabricating such components |
| US7830228B2 (en) | 2001-12-03 | 2010-11-09 | Microfabrica Inc. | Miniature RF and microwave components and methods for fabricating such components |
| US9620834B2 (en) | 2001-12-03 | 2017-04-11 | Microfabrica Inc. | Method for fabricating miniature structures or devices such as RF and microwave components |
| US10297421B1 (en) | 2003-05-07 | 2019-05-21 | Microfabrica Inc. | Plasma etching of dielectric sacrificial material from reentrant multi-layer metal structures |
| US11211228B1 (en) | 2003-05-07 | 2021-12-28 | Microfabrica Inc. | Neutral radical etching of dielectric sacrificial material from reentrant multi-layer metal structures |
| US10910635B2 (en) | 2017-11-24 | 2021-02-02 | Nec Corporation | Method for manufacturing electrode for secondary battery and method for manufacturing secondary battery |
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