JPH01117315A - Vapor growth method for semiconductor thin film crystal - Google Patents

Vapor growth method for semiconductor thin film crystal

Info

Publication number
JPH01117315A
JPH01117315A JP27344587A JP27344587A JPH01117315A JP H01117315 A JPH01117315 A JP H01117315A JP 27344587 A JP27344587 A JP 27344587A JP 27344587 A JP27344587 A JP 27344587A JP H01117315 A JPH01117315 A JP H01117315A
Authority
JP
Japan
Prior art keywords
thin film
susceptor
partition plate
wafer
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27344587A
Other languages
Japanese (ja)
Inventor
Harunori Sakaguchi
春典 坂口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP27344587A priority Critical patent/JPH01117315A/en
Publication of JPH01117315A publication Critical patent/JPH01117315A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make it possible to epitaxially grow a uniform multilayer thin film crystal, having a steep junction interface, on a plurality of crystal substrates simultaneously by a method wherein raw gas is formed into a laminar flow on the up-stream side of the susceptor in a reaction chamber by passing it through the partition plate, which is smaller in area than a semiconductor crystal substrate having a number of small holes, and the laminar flow of the raw gas is brought to come in contact with a plurality of semiconductor crystal substrates. CONSTITUTION:A prularity of wafers 1 are arranged on the upper surface of a rotatable susceptor 5 with a rotating shaft 6 as the center point. The small hole group 7' on a partition plate 7 are positioned on the immediate upstream side of each wafer 1, and the gas stream discharged from a gas introducing hole 3 and passed through the uniformly distributed small hole group 7' is formed into a laminar stream, and it comes in contact with each wafer, and the quantity of the laminar stream contacted to each wafer becomes uniform. Crystal is grown by the reaction of the raw gas on the wafer 1, and the reaction gas passes the side face of the susceptor 5 and exhausted from a reaction gas exhaust hole 4. As the reaction gas comes in contact with the wafer 1 simultaneously in the form of laminar stream coming out from the partition plate, the thin film crystal can be epitaxially grown uniformly on a plurality of crystal substrates.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体結晶基板に半導体薄膜結晶を多数枚同
時にエピタキシャル成長させる気相成長方法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a vapor phase growth method for simultaneously epitaxially growing a large number of semiconductor thin film crystals on a semiconductor crystal substrate.

[従来の技術] 半導体薄膜結晶の多数枚同時成長用の反応装置としては
、従来、パントキ型とバレル型とが知られている。前者
のパンケーキ型は、第5図に示すように、原料ガスを中
央のノズル15から反応管2内に噴出させ1回転してい
るサセプタ16上の結晶基板(ウェハ)1に当てるもの
であり、絶縁膜なとの一般的な化学気相成長(CVD)
法や5il)気相成長(VPE)法に用いられている。
[Prior Art] Conventionally, Pantke type and barrel type reaction apparatuses are known for the simultaneous growth of a large number of semiconductor thin film crystals. In the former pancake type, as shown in FIG. 5, raw material gas is ejected from a central nozzle 15 into a reaction tube 2 and is applied to a crystal substrate (wafer) 1 on a susceptor 16 that is rotating once. , general chemical vapor deposition (CVD) for insulating films
It is used in the vapor phase epitaxy (VPE) method.

後者のバレル型は、第6図に示すように、原料ガスをバ
レルサセプタ17の上方斜め又は頂上よりノズル又はガ
ス導入口3を介して反応管2内に導き、サセプタ5に対
し縦にたて掛けた結晶基板(ウェハ)に供給するもので
ある。このバレル型装置もSiのVPE法やGaAsの
VPE法に用いられ、最近ではMOCV、D(有機金属
による気相成長)法にも用いられつつある。
In the latter barrel type, as shown in FIG. 6, the raw material gas is introduced into the reaction tube 2 through the nozzle or gas inlet 3 from above or from the top of the barrel susceptor 17, and is vertically oriented with respect to the susceptor 5. It is supplied to the crystal substrate (wafer) that has been hung. This barrel-type device is also used for the VPE method of Si and the VPE method of GaAs, and recently it is also being used for MOCV and D (metal-organic vapor phase epitaxy) methods.

[発明が解決しようとする問題点] 有機金属によるMOCVD法は、混晶の超薄膜成長が重
要であり、その為には、反応管2中のガスの流れを層流
にする必要がある。また、多数枚の均一成長を行わせる
ためには、各ウェハ1上のガス流分布の均一化を図る必
要がある。
[Problems to be Solved by the Invention] In the MOCVD method using an organic metal, it is important to grow an ultra-thin film of a mixed crystal, and for this purpose, it is necessary to make the flow of gas in the reaction tube 2 laminar. Furthermore, in order to uniformly grow a large number of wafers, it is necessary to make the gas flow distribution on each wafer 1 uniform.

しかしながら、従来のパンゲーキ型装置では、反応管内
部でガスの自然対流が起り易く、またノズル3における
有機金属原料の析出や詰まりも問題となる。一方、バレ
ル型装置では、ガス流を各ウェハ1上に均一に分配する
ことがかなり困難であり、また、ガス導入口3から噴出
するガス流の進路がサセプタ17の頭部で曲げられるた
めに渦ができ易く、これが超薄膜成長の界面2浚性を悪
くする。
However, in the conventional pangeer type device, natural convection of gas tends to occur inside the reaction tube, and precipitation and clogging of the organometallic raw material in the nozzle 3 also poses problems. On the other hand, in a barrel-type device, it is quite difficult to uniformly distribute the gas flow onto each wafer 1, and also because the path of the gas flow ejected from the gas inlet 3 is bent at the head of the susceptor 17. Vortices are likely to form, which impairs the dredging properties of the interface for ultra-thin film growth.

本発明の目的は、上記欠点を解消し、複数の結晶基板上
に、同時にかつ急俊な接合界面を有する多層薄膜結晶を
均一にエピタキシャル成長させることが可能な気相成長
方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a vapor phase growth method that eliminates the above-mentioned drawbacks and allows simultaneous and uniform epitaxial growth of multilayer thin film crystals having sharp bonding interfaces on a plurality of crystal substrates. .

[問題点を解決するための手段] 本発明による半導体1膜結晶の気相成長方法は、頂部に
原料ガス導入口を下部にガス排気口を設けた反応管の反
応室内に、加熱手段を備えた縦形の回転するサセプタを
配設し、該サセプタ上に複数の半導体結晶基板を載せ、
該半導体結晶基板に半導体薄膜結晶を気相エピタキシャ
ル成長させるに当たり、反応室内のサセプタの上流側に
半導体結晶基板より面積の小さい小孔を多数有する仕切
り板を設けて、該仕切り板を通して原料ガスを層流とし
て前記複数の半導体結晶基板に当てることを特徴とする
ものである。
[Means for Solving the Problems] The method for vapor phase growth of a semiconductor single-film crystal according to the present invention includes a reaction tube including a heating means in a reaction chamber having a raw material gas inlet at the top and a gas exhaust port at the bottom. a vertically rotating susceptor is disposed, a plurality of semiconductor crystal substrates are placed on the susceptor,
When growing a semiconductor thin film crystal on the semiconductor crystal substrate by vapor phase epitaxial growth, a partition plate having a large number of small holes smaller in area than the semiconductor crystal substrate is provided on the upstream side of the susceptor in the reaction chamber, and a laminar flow of source gas is carried out through the partition plate. The method is characterized in that it is applied to the plurality of semiconductor crystal substrates.

[作用] 反応室の上流に仕切り板が存在することによって、原料
ガスがサセプタ上の各半導体結晶基板に仕切り板から層
流となって同時に当たるため、複数の結晶基板上に薄膜
結晶が均一にエピタキシャル成長される。従って、急俊
な接合界面を有する多層薄膜結晶を同時に均一にエピタ
キシャル成長させることが可能となる。
[Operation] Due to the presence of the partition plate upstream of the reaction chamber, the raw material gas simultaneously hits each semiconductor crystal substrate on the susceptor in a laminar flow from the partition plate, so that thin film crystals are uniformly spread on multiple crystal substrates. grown epitaxially. Therefore, it becomes possible to simultaneously and uniformly epitaxially grow a multilayer thin film crystal having a sharp junction interface.

各半導体結晶基板における膜結晶の均一化を図るために
は、仕切り板の小孔は仕切り板全体に均一に分布させ、
各半導体結晶基板に対する層流量を均一にすることが好
ましい。
In order to make the film crystals uniform on each semiconductor crystal substrate, the small holes in the partition plate should be uniformly distributed over the entire partition plate.
It is preferable to make the laminar flow rate uniform for each semiconductor crystal substrate.

原料ガスには有機金属、水素化物、塩化物を含ませて、
MOCVD法により、化合物半導体薄膜結晶を気相エピ
タキシャル成長させることができる。
The raw material gas contains organic metals, hydrides, and chlorides,
The MOCVD method allows compound semiconductor thin film crystals to be grown epitaxially in the vapor phase.

[実施例] 以下、図示の実施例について本発明を説明する。[Example] The invention will now be described with reference to the illustrated embodiments.

実施例1゜ 第1図は、本発明の気相エピタキシャル成長方法を実施
する反応装置の反応管部を示したもので、反応管2は、
その頂部に原料ガス尋人口3を、下部に反応ガス排気口
4を有する0反応管2の内部すなわち反応室内には、加
熱手段としての高周波コイルを備えた縦形の回転するサ
セプタ5が配設しである。サセプタ5はグラファイト製
であり、回転軸6を中心として回転可能となっている。
Example 1 FIG. 1 shows the reaction tube section of a reaction apparatus for carrying out the vapor phase epitaxial growth method of the present invention.
A vertical rotating susceptor 5 equipped with a high-frequency coil as a heating means is disposed inside the reaction tube 2, which has a raw material gas intake port 3 at the top and a reaction gas exhaust port 4 at the bottom, that is, inside the reaction chamber. It is. The susceptor 5 is made of graphite and is rotatable around a rotating shaft 6.

半導体結晶基板(ウェハ)1は、このサセプタ5の上面
に複数枚配置される。
A plurality of semiconductor crystal substrates (wafers) 1 are arranged on the upper surface of this susceptor 5.

ここでは、第2図に示すように、7枚のウェハ1を載置
した。
Here, as shown in FIG. 2, seven wafers 1 were placed.

反応管2の土壁は、その頂部の原料ガス導入口3からラ
ッパ状に形成してあり、反応ガス排気口4は、反応管2
の側壁下部、正確にはサセプタ5より下位に位置する。
The clay wall of the reaction tube 2 is formed in a trumpet shape from the raw material gas inlet 3 at the top, and the reaction gas exhaust port 4 is connected to the reaction tube 2.
It is located at the lower part of the side wall of the susceptor 5, to be more precise, below the susceptor 5.

即ち、原料ガスは上部中央の原料ガス導入口3よりウェ
ハ1まで輸送され、ウェハ1上で反応して結晶を成長さ
せ、その反応ガスがサセプタ5の側面を通過して反応ガ
ス排気口4より排気される。
That is, the raw material gas is transported to the wafer 1 through the raw material gas inlet 3 at the center of the upper part, reacts on the wafer 1 to grow a crystal, and the reactive gas passes through the side of the susceptor 5 and is then transported from the reactive gas exhaust port 4 to the wafer 1. Exhausted.

従って、このままでは原料ガス導入口3からのガス流の
進路が曲げられて渦ができ、超薄膜成長の界面2俊性を
悪くする。そこで、反応管2の反応室には、サセプタ5
の上流側に、ウェハ1よ小さい面積の小孔7′を多数有
する仕切り板7を設け、原料ガスがサセプタ5上の総て
のウェハ1に対して層流となって当たるようにしてる。
Therefore, if left as is, the path of the gas flow from the source gas inlet 3 will be bent, creating a vortex, which will deteriorate the stability of the interface 2 for growing an ultra-thin film. Therefore, a susceptor 5 is placed in the reaction chamber of the reaction tube 2.
A partition plate 7 having a large number of small holes 7' having an area smaller than that of the wafers 1 is provided on the upstream side of the wafer 1, so that the raw material gas hits all the wafers 1 on the susceptor 5 in a laminar flow.

即ち、反応管2の反応室は、仕切り板7により、原料ガ
ス導入口3の存在する前室8と、サセプタ5及びウェハ
1の存在する後室9とに区分され、サセプタ5及び総て
めウェハ1は仕切り板7で覆われている。この結果、仕
切り板7の小孔群7′が各ウェハ1のすぐ上流側に位置
することになり、これら小孔群を通過したガス流は、第
1図に矢印で示唆するように、互いに層流となって各ウ
ェハ1に当ることになる。
That is, the reaction chamber of the reaction tube 2 is divided by the partition plate 7 into a front chamber 8 where the raw material gas inlet 3 is present, and a rear chamber 9 where the susceptor 5 and the wafer 1 are present. The wafer 1 is covered with a partition plate 7. As a result, the small holes 7' of the partition plate 7 are located immediately upstream of each wafer 1, and the gas flow passing through these small holes is mutually directed as indicated by the arrows in FIG. This becomes a laminar flow and hits each wafer 1.

また、各ウェハ1に当たる層流量を均=にするため、仕
切り板7の多数の小孔7°は、互いに等間隔で、仕切り
板7の全域に均一に分布させである9本実施例では、第
3図に示すように、小孔7°を放射状に配設しているが
、必ずしもこれに限定されるものではなく、例えば四方
に均一な間隔で配設することもできる。
In addition, in order to equalize the laminar flow rate hitting each wafer 1, the large number of small holes 7° of the partition plate 7 are distributed uniformly over the entire area of the partition plate 7 at equal intervals. As shown in FIG. 3, the small holes 7° are arranged radially, but the invention is not necessarily limited to this. For example, they may be arranged at uniform intervals in all directions.

上記した第1図の反応管2を用い、MOCVD法による
n型GaAst長を行った。ウェハ1としては、直径2
インチのGaAs基板を7枚用意し、これを第2図に示
すようにサセプタ5上に配置し、7枚を同時成長させた
。原料ガスは■族金属元素の有機物トリメチルガリウム
TMGとV族元素の水素化物アルシンAsH。
Using the reaction tube 2 shown in FIG. 1 described above, n-type GaAst length was measured by the MOCVD method. Wafer 1 has a diameter of 2
Seven inch GaAs substrates were prepared, placed on a susceptor 5 as shown in FIG. 2, and grown simultaneously. The raw material gases are the organic compound trimethylgallium TMG, which is a group Ⅰ metal element, and the hydride arsine AsH, which is a group V element.

と、5i2H,を用い、キャリアガスはH2で常圧成長
である。結晶の均一を良くするため、サセプタ5の回転
数は1100rpとした。
and 5i2H, and the carrier gas was H2 for normal pressure growth. In order to improve the uniformity of the crystal, the rotation speed of the susceptor 5 was set to 1100 rpm.

これにより厚さdが約1μm、キャリア濃度nが5X1
017/C1’のGaAsエビタルキシャル膜を得た。
As a result, the thickness d is approximately 1 μm, and the carrier concentration n is 5×1.
A GaAs epitaxial film of 017/C1' was obtained.

この各GaAsエピタキシャル膜のバラツキは、2イン
チのウニハフ枚全てで、厚さΔdが±10%、キャリア
濃度Δnが±5%であり、サセプタ5の中央のウェハを
1枚除いた場合はΔd±3%、Δn±3%という良好な
結果を得た。
The variation in each GaAs epitaxial film is that the thickness Δd is ±10% and the carrier concentration Δn is ±5% for all 2-inch wafers, and when one wafer in the center of the susceptor 5 is excluded, Δd± Good results of 3% and Δn±3% were obtained.

次に、GaAsとGao、s A l o、、Asのへ
テロ超薄膜を作成して、その界面2俊性を透過型電子顕
微鏡(TEM)により調べた。その結果、GaAsとG
ao、、Al。、、As界面の遷移層の幅は、約10人
とかなり良好であった。
Next, a hetero-thin film of GaAs and Gao, s A lo, , As was prepared, and the interfacial stability was investigated using a transmission electron microscope (TEM). As a result, GaAs and G
ao,,Al. The width of the transition layer at the As interface was about 10, which was quite good.

実施例2゜ 第4図は、界面2俊性を向上させるため、反応室内の仕
切り板7を、原料ガス導入口3とサセプタ5との間に相
前後して配置した第1の仕切り板7aと第2の仕切り板
’7bとで構成し、両仕切り板7a、7b間に、パージ
用の通路となる中間室10を形成した例である。この中
間室10に関し、反応管2の一方の側壁にはパージ用水
素ガスの導入口11を、他方の側壁にはパージ用水素ガ
スの排気口13を設けである。
Embodiment 2 FIG. 4 shows a first partition plate 7a in which the partition plates 7 in the reaction chamber are arranged one after the other between the raw material gas inlet 3 and the susceptor 5 in order to improve the agility of the interface 2. This is an example in which an intermediate chamber 10 serving as a purge passage is formed between both partition plates 7a and 7b. Regarding this intermediate chamber 10, one side wall of the reaction tube 2 is provided with an inlet 11 for purge hydrogen gas, and the other side wall is provided with an exhaust port 13 for purge hydrogen gas.

尚、頂部の原料ガス導入口3も、パージする際のパージ
ガスの導入口として機能する。
Note that the source gas inlet 3 at the top also functions as an inlet for purge gas during purging.

ヘテロ接合を形成するために、原料ガスを切り換える場
合には、原料ガス導入口3とパージガス導入口9とから
第4図に点線で示すように、パージガスを供給して、前
室8、中間室10及び後室9に流し、反応管2の残留原
料ガスをパージする。12.14はこのパージのための
パージガス切換バルブである。
When switching the source gas to form a heterojunction, purge gas is supplied from the source gas inlet 3 and the purge gas inlet 9 as shown by dotted lines in FIG. 10 and rear chamber 9 to purge the residual raw material gas in the reaction tube 2. 12.14 is a purge gas switching valve for this purge.

第4図の反応管2を用いて、上記実施例1と同様の気相
成長実験を行ったところ、ウェハ1の厚さ及びキャリア
濃度のバラツキΔd、Δnは同一であった。しかし、G
aAs/Gaa、sA l 6.6 A S界面の2俊
性は、5Å以下と大幅に改善された。
When a vapor phase growth experiment similar to that of Example 1 was conducted using the reaction tube 2 shown in FIG. 4, the thickness of the wafer 1 and the variations in carrier concentration Δd and Δn were the same. However, G
The biflexity of the aAs/Gaa, sA l 6.6 A S interface was significantly improved to 5 Å or less.

[発明の効果1 以上のように、本発明によれば、仕切り板によるガス流
が層流化され、容易に均一な薄膜結晶のエピタキシャル
成長が得られる。超薄膜III御性も良いため、均一か
つ界面急俊件の良いエピタキシャル成長のウェハが多く
かつ再現性よく得られる。また、原理的に、−度に成長
させることのできるウアエハ数の増加が容易である。
[Effect of the Invention 1 As described above, according to the present invention, the gas flow by the partition plate is made laminar, and uniform epitaxial growth of thin film crystals can be easily obtained. Since the ultra-thin film III has good properties, many wafers with epitaxial growth that is uniform and has good interfacial properties can be obtained with good reproducibility. Further, in principle, it is easy to increase the number of wafers that can be grown at a time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を実施するの反応装置例を示す断面略図
、第2図はそのII−II断面図、第3図はIII−I
II断面図、第4図は本発明を実施する池の反応装置例
を示す断面略図、第5図は従来のパンケーキ型の反応装
置を示す図、第6図は従来のバレル型反応装置を示す図
である。 図中、1は半導体結晶基板(ウェハ)、2は反応管、3
は原料ガス導入口、4は反応ガス排気口、5はサセプタ
、7.7a、7bは仕切り板、8は前室、9は後室、1
0は中間室、11はパージガスの導入口、13はパージ
ガスの排気口を示す。
Fig. 1 is a schematic cross-sectional view showing an example of a reactor for carrying out the present invention, Fig. 2 is a cross-sectional view taken along II-II, and Fig. 3 is a cross-sectional view taken along III-I.
II sectional view, FIG. 4 is a schematic sectional view showing an example of a pond reactor for implementing the present invention, FIG. 5 is a diagram showing a conventional pancake-type reactor, and FIG. 6 is a diagram showing a conventional barrel-type reactor. FIG. In the figure, 1 is a semiconductor crystal substrate (wafer), 2 is a reaction tube, and 3
is a raw material gas inlet, 4 is a reaction gas exhaust port, 5 is a susceptor, 7.7a, 7b are partition plates, 8 is a front chamber, 9 is a rear chamber, 1
0 indicates an intermediate chamber, 11 indicates a purge gas inlet, and 13 indicates a purge gas exhaust port.

Claims (3)

【特許請求の範囲】[Claims] (1)頂部に原料ガス導入口を下部にガス排気口を設け
た反応管の反応室内に、加熱手段を備えた縦形の回転す
るサセプタを配設し、該サセプタ上に複数の半導体結晶
基板を載せ、該半導体結晶基板に半導体薄膜結晶を気相
エピタキシャル成長させるに当たり、反応室内のサセプ
タの上流側に半導体結晶基板より面積の小さい小孔を多
数有する仕切り板を設けて、該仕切り板を通して原料ガ
スを層流として前記複数の半導体結晶基板に当てること
を特徴とする半導体薄膜結晶の気相成長方法。
(1) A vertical rotating susceptor equipped with a heating means is installed in the reaction chamber of a reaction tube with a raw material gas inlet at the top and a gas exhaust port at the bottom, and a plurality of semiconductor crystal substrates are placed on the susceptor. In order to grow a semiconductor thin film crystal on the semiconductor crystal substrate by vapor phase epitaxial growth, a partition plate having a large number of small holes with an area smaller than that of the semiconductor crystal substrate is provided on the upstream side of the susceptor in the reaction chamber, and the source gas is introduced through the partition plate. A method for vapor phase growth of a semiconductor thin film crystal, characterized in that a laminar flow is applied to the plurality of semiconductor crystal substrates.
(2)前記仕切り板の小孔は仕切り板全体に均一に分布
しており、各半導体結晶基板に層流を均一に当てること
を特徴とする特許請求の範囲第1項に記載の半導体薄膜
結晶の気相成長方法。
(2) The semiconductor thin film crystal according to claim 1, wherein the small holes of the partition plate are uniformly distributed over the entire partition plate, and a laminar flow is uniformly applied to each semiconductor crystal substrate. vapor phase growth method.
(3)前記原料ガスは有機金属、水素化物、塩化物を含
み、半導体結晶基板に化合物半導体薄膜結晶を気相エピ
タキシャル成長させることを特徴とする特許請求の範囲
第1項に記載の半導体薄膜結晶の気相成長方法。
(3) The semiconductor thin film crystal according to claim 1, wherein the source gas contains an organic metal, a hydride, and a chloride, and is used to grow a compound semiconductor thin film crystal on a semiconductor crystal substrate by vapor phase epitaxial growth. Vapor phase growth method.
JP27344587A 1987-10-30 1987-10-30 Vapor growth method for semiconductor thin film crystal Pending JPH01117315A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27344587A JPH01117315A (en) 1987-10-30 1987-10-30 Vapor growth method for semiconductor thin film crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27344587A JPH01117315A (en) 1987-10-30 1987-10-30 Vapor growth method for semiconductor thin film crystal

Publications (1)

Publication Number Publication Date
JPH01117315A true JPH01117315A (en) 1989-05-10

Family

ID=17528009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27344587A Pending JPH01117315A (en) 1987-10-30 1987-10-30 Vapor growth method for semiconductor thin film crystal

Country Status (1)

Country Link
JP (1) JPH01117315A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02137033U (en) * 1989-04-13 1990-11-15
JP2009021534A (en) * 2007-06-15 2009-01-29 Nuflare Technology Inc Vapor-phase growth apparatus and vapor-phase growth method
JP2009021533A (en) * 2007-06-15 2009-01-29 Nuflare Technology Inc Vapor-phase growth apparatus and vapor-phase growth method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02137033U (en) * 1989-04-13 1990-11-15
JP2009021534A (en) * 2007-06-15 2009-01-29 Nuflare Technology Inc Vapor-phase growth apparatus and vapor-phase growth method
JP2009021533A (en) * 2007-06-15 2009-01-29 Nuflare Technology Inc Vapor-phase growth apparatus and vapor-phase growth method
KR100975716B1 (en) * 2007-06-15 2010-08-12 가부시키가이샤 뉴플레어 테크놀로지 Vapor phase growing apparatus and vapor phase growing method
KR100975717B1 (en) * 2007-06-15 2010-08-12 가부시키가이샤 뉴플레어 테크놀로지 Vapor phase growing apparatus and vapor phase growing method
TWI479585B (en) * 2007-06-15 2015-04-01 Nuflare Technology Inc Vapor phase growth apparatus and vapor phase growth method
TWI480927B (en) * 2007-06-15 2015-04-11 Nuflare Technology Inc Vapor phase growth apparatus and vapor phase growth method

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