JPH01114092A - Buried-type semiconductor laser - Google Patents
Buried-type semiconductor laserInfo
- Publication number
- JPH01114092A JPH01114092A JP27012887A JP27012887A JPH01114092A JP H01114092 A JPH01114092 A JP H01114092A JP 27012887 A JP27012887 A JP 27012887A JP 27012887 A JP27012887 A JP 27012887A JP H01114092 A JPH01114092 A JP H01114092A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- buried
- semiconductor laser
- active layer
- laser according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 239000010408 film Substances 0.000 claims description 17
- 239000013078 crystal Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 5
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims description 5
- 238000000927 vapour-phase epitaxy Methods 0.000 claims description 5
- 230000004888 barrier function Effects 0.000 claims description 3
- 150000004820 halides Chemical class 0.000 claims description 3
- 239000010409 thin film Substances 0.000 claims description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 claims description 2
- 239000012535 impurity Substances 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 abstract description 25
- 238000000034 method Methods 0.000 abstract description 18
- 238000005253 cladding Methods 0.000 abstract description 8
- 229910052736 halogen Inorganic materials 0.000 abstract description 4
- 150000002367 halogens Chemical class 0.000 abstract description 4
- 238000001020 plasma etching Methods 0.000 abstract description 4
- 230000000903 blocking effect Effects 0.000 abstract description 3
- 239000007788 liquid Substances 0.000 abstract 3
- 230000008020 evaporation Effects 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 86
- 238000005530 etching Methods 0.000 description 10
- 230000010355 oscillation Effects 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 5
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 4
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 description 3
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 3
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 3
- 229910052794 bromium Inorganic materials 0.000 description 3
- 229910052801 chlorine Inorganic materials 0.000 description 3
- 239000000460 chlorine Substances 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000010884 ion-beam technique Methods 0.000 description 3
- 239000007791 liquid phase Substances 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000005476 size effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000003776 cleavage reaction Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 230000007017 scission Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
- H01S5/2275—Buried mesa structure ; Striped active layer mesa created by etching
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、特に寄生容量が小さく、超高速変調に好適な
埋込み型半導体レーザに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention particularly relates to a buried semiconductor laser having small parasitic capacitance and suitable for ultra-high speed modulation.
（従来の技術〕
光フアイバー通信の大容量化のために、超高速変調（１
０〜３０ Ｇ Ｈｚ ）の可能な半導体レーザが望まれ
ている。これまでの光フアイバー通信に用いられている
半導体レーザは、埋込み型半導体レーザ（Ｂｕｒｉｅｄ
Ｈｅｔｅｒｏｓｔｒｕｃｔｕｒｅ ： Ｂ Ｈ）であ
り。(Prior technology) In order to increase the capacity of optical fiber communication, ultra-high-speed modulation (1
0-30 GHz) capable semiconductor lasers are desired. The semiconductor lasers used in conventional optical fiber communications are buried semiconductor lasers (Buried semiconductor lasers).
Heterostructure: BH).
これは、低しきい電流で、縦モード、横モード共に単一
であり、さらに他の半導体レーザに比べて寄生インピー
ダンスが小さいためである。しかし、このＢＨレーザに
おいても、その変調帯域は、ストライプ外部の寄生容量
により、約３ Ｇ Ｈｚに制限されている。寄生容量を
低減するためには、ストライプ外部の半導体接合面積を
小さくすることが考えられる。その１つの方法として、
ストライブの近傍以外の埋込み層をエツチング等により
、除去することが、上手他により、昭和６１年度電子通
信学会光・電波部門全国大会請演論文集ＮＱ２３２にて
発表されている。この報告では、残存しているメサ幅は
５μｍであり、ストライプ外部の埋込み層の残存してい
る幅は片側約２μｍとなる。この寄生容量は８９Ｆであ
り、これによる変調帯域は４〜５ＧＨｚに制限されてい
る。This is because it has a low threshold current, a single longitudinal mode and a single transverse mode, and has a smaller parasitic impedance than other semiconductor lasers. However, even in this BH laser, the modulation band is limited to about 3 GHz due to parasitic capacitance outside the stripe. In order to reduce parasitic capacitance, it is conceivable to reduce the semiconductor junction area outside the stripe. One way to do this is to
Removal of the buried layer other than the vicinity of the stripe by etching or the like was published by Uge et al. in the Proceedings of the 1988 IEICE Optical and Radio Division National Conference, NQ232. In this report, the remaining mesa width is 5 μm, and the remaining width of the buried layer outside the stripe is about 2 μm on one side. This parasitic capacitance is 89F, and the modulation band due to this is limited to 4 to 5 GHz.
上記従来技術は、ストライプ外部の寄生容量を低減する
ために、−度成長した埋込み層をエツチングにより除去
する方法である。１０ＧＨｚ以上の変調帯域を実現する
ためには、残存させる埋込み層の幅を０．５μｍ程度に
する必要があり、上記従来技術では、エツチングマスク
の合わせ精度・寸法精度、及びサイドエッチの点で不可
能であった。The above-mentioned conventional technique is a method of removing the buried layer that has grown twice by etching in order to reduce the parasitic capacitance outside the stripe. In order to achieve a modulation band of 10 GHz or more, the width of the remaining buried layer must be approximately 0.5 μm, and the above conventional technology has disadvantages in terms of etching mask alignment accuracy, dimensional accuracy, and side etching. It was possible.
本発明の目的は、ストライプ外部の埋込み層の幅を１．
０μｍ以下、寄生容量を３ｐＦ以下程度に形成すること
を容易にし、１０〜３０ＧＨｚの変調帯域を有する半導
体レーザを提供することにある。The purpose of the present invention is to reduce the width of the buried layer outside the stripe to 1.
The object of the present invention is to provide a semiconductor laser that facilitates formation of a parasitic capacitance of 0 μm or less and a parasitic capacitance of about 3 pF or less, and has a modulation band of 10 to 30 GHz.
上記目的の第１の達成手段は、埋込み層の形状をメサス
トライプの両側に埋込んだ活性層より屈折率の小さい結
晶層中に設ける側面が垂直な溝により規定することであ
る。溝は臭素、塩素などのハロゲン系ガスを使用して反
応性イオンエツチング法あるいは反応性イオンビームエ
ツチング法により形成する。A first means for achieving the above object is to define the shape of the buried layer by grooves with vertical sides provided in a crystal layer having a lower refractive index than the active layer buried on both sides of the mesa stripe. The grooves are formed by reactive ion etching or reactive ion beam etching using a halogen gas such as bromine or chlorine.
また、上記目的の第２の達成手段は、埋込み層をメサス
トライプに被着形成した膜厚３μｍ以下の活性層より屈
折率の小さい半導体薄膜とすることである。薄膜はＭＯ
ＣＶＤ法、ハライド系ＶＰＥ法、クロライド系ＶＰＥ法
、あるいはＭＢＥ法などにより形成する。A second means for achieving the above object is to make the buried layer a semiconductor thin film having a refractive index smaller than that of the active layer, which is formed in a mesa stripe and has a thickness of 3 μm or less. Thin film is MO
It is formed by a CVD method, a halide VPE method, a chloride VPE method, an MBE method, or the like.
上記第１の達成手段においては、臭素、塩素などのハロ
ゲン系ガスを使用した。反応性イオンエツチング法ある
いは、反応性イオンビームエツチング法により、側面が
ほぼ垂直な溝を形成することができる。これにより、活
性層の両側１μｍ以内のところに、再現性よく基板結晶
に達する溝を作製することができる。その結果１例えば
電流ブロック層のｐｎｐもしくはｎｐｎ接合よりなる埋
込み層の寄生容量を１０〜４０ｐＦから１〜３ｐＦにま
で低減することができる。従来の埋込み型半導体レーザ
の変調帯域は電気的特性により制限されており、接合容
量をＣ２直列抵抗をＲとすると、遮断周波数ｆは、ｆ＝
Ｌ／Ｃ２πＣＲ）で与えられる。本発明により、ｆを一
桁改善することができる。さらに、作製した溝の表面を
基板結晶材料と接着性がよく、熱膨張係数がほぼ等しい
。In the first achievement means, a halogen gas such as bromine or chlorine was used. Grooves with substantially vertical sides can be formed by reactive ion etching or reactive ion beam etching. As a result, grooves reaching the substrate crystal can be formed within 1 μm on both sides of the active layer with good reproducibility. As a result 1, for example, the parasitic capacitance of the buried layer made of a pnp or npn junction of the current blocking layer can be reduced from 10 to 40 pF to 1 to 3 pF. The modulation band of conventional embedded semiconductor lasers is limited by electrical characteristics, and when the junction capacitance is C2 and the series resistance is R, the cutoff frequency f is f=
L/C2πCR). According to the present invention, f can be improved by one order of magnitude. Furthermore, the surface of the groove thus produced has good adhesion to the substrate crystal material and has approximately the same coefficient of thermal expansion.
基板結晶材料と同種の元素を少なくとも一種類含んだ酸
化物で被うことにより、寿命信頼性を向上させることが
できる。By covering with an oxide containing at least one element of the same type as the substrate crystal material, lifetime reliability can be improved.
上記第２の達成手段においては、上記成長法によれば、
メサ形状をほぼ保存しながら埋込み層が成長するので、
活性層の両側にほぼ同様の膜厚の埋込み層が成長し、ま
たこの薄膜埋込み層の幅は、その成長時間のみにより、
厳密に制御できる。従って、０．５μｍ以下の埋込み層
形成が十分制御よく形成でき、その寄生容量は主に埋込
み層のキャリア濃度により決まる。埋込み層をアンドー
プ。In the second achievement means, according to the growth method,
The buried layer grows while preserving the mesa shape, so
Buried layers of approximately the same thickness grow on both sides of the active layer, and the width of this thin buried layer depends only on the growth time.
Can be tightly controlled. Therefore, a buried layer of 0.5 μm or less can be formed with sufficient control, and its parasitic capacitance is mainly determined by the carrier concentration of the buried layer. Undope the buried layer.
あるいは意図的に不純物を導入して高抵抗化を行ったと
ころ、寄生容量は１ｐＦ程度に低減できた。Alternatively, by intentionally introducing impurities to increase the resistance, the parasitic capacitance could be reduced to about 1 pF.
さらには、埋込み層を通り流れるリーク電流も１ｍＡ以
下に押さえることができた結果高出力動作も可能となり
、緩和振動周波数の増大も可能となった。また、ストラ
イプ外部の埋めこみ層と電極の間にＳ ｘ Ｏｘ、 Ｓ
ｉ Ｎｘ膜等の絶縁膜を設けてストライプ内外の絶縁
を行うことにより、寄生容量の低減効果は、さらに顕著
となる。以上の構成により、２０〜３０ＧＨｚの変調帯
域を有する半導体レーザを可能ならしめた。Furthermore, the leakage current flowing through the buried layer can be suppressed to 1 mA or less, making it possible to operate at high output and increase the relaxation oscillation frequency. In addition, between the buried layer outside the stripe and the electrode, S x Ox, S
By providing an insulating film such as an iNx film to insulate the inside and outside of the stripe, the effect of reducing parasitic capacitance becomes even more remarkable. With the above configuration, a semiconductor laser having a modulation band of 20 to 30 GHz has been made possible.
以下、本発明の詳細な説明する。 The present invention will be explained in detail below.
実施例１
第１図は本発明の実施例の断面図である。ｎ型ＩｎＰ基
板１の表面に、ｎ型ＩｎＧａＡｓＰ光ガイド層２、アン
ドープＩｎＧａＡｓＰ活性層３ｙＰ型ＩｎＧａＡｓＰバ
ツフアー層４ｔＰ型ＩｎＰクラッド層５を順次液相成長
法により形成した後１幅１μｍ程度の活性層３を残した
メサストライプ１３を形成する。Embodiment 1 FIG. 1 is a sectional view of an embodiment of the present invention. After sequentially forming an n-type InGaAsP optical guide layer 2, an undoped InGaAsP active layer 3, a P-type InGaAsP buffer layer, a P-type InP cladding layer 5 on the surface of an n-type InP substrate 1 by liquid phase growth, an active layer 3 having a width of about 1 μm is formed. A mesa stripe 13 is formed with a remaining area.
その後、メサストライプ１３の両側にｐ型Ｉｎ、Ｐ埋込
み層６．ｎ型ＩｎＰ埋込み層７を液相成長法により成長
させて電流ブロック層を形成し、続いて全面にｐ型Ｉｎ
Ｐクラッド層ａｙＰ型ＩｎＧａＡｓＰキャップ層９を液
相成長法により形成する０次に。Thereafter, p-type In and P buried layers 6. are formed on both sides of the mesa stripe 13. An n-type InP buried layer 7 is grown by a liquid phase growth method to form a current blocking layer, and then a p-type InP is grown on the entire surface.
A zero-order P cladding layer ayP type InGaAsP cap layer 9 is formed by liquid phase growth.
上面および下面にそれぞれｐ側電極１０（Ａｕ／Ｃｒ）
およびｎ側電極１１ （Ａ ｕ ／ＡｕＧｅＮ１）を蒸
着法により形成した６次に、臭素、塩素などのハロゲン
系ガスを用いた反応性イオンエツチング法あるいは反応
性イオンビームエツチング法に′より、活性層の両側近
傍に、側面が活性層に対し、はぼ垂直な溝１４を形成し
た。エツチングのマスクには、５ｉＯｚもしくはホトレ
ジストを使用した。P-side electrode 10 (Au/Cr) on the upper and lower surfaces respectively
Next, the active layer is etched by reactive ion etching using a halogen gas such as bromine or chlorine or by reactive ion beam etching. Grooves 14 were formed near both sides of the substrate, the side surfaces of which were substantially perpendicular to the active layer. For the etching mask, 5iOz or photoresist was used.
このように溝１４を活性層３近傍に形成することにより
、寄生容量を１０〜４０ＰＦから１〜３９Ｆに低減する
ことができた。直列抵抗は５Ωであり、変調帯域２０Ｇ
Ｈｚ （−３ｄＢバンド幅）を得た。By forming the groove 14 near the active layer 3 in this manner, the parasitic capacitance could be reduced from 10 to 40 PF to 1 to 39 PF. Series resistance is 5Ω, modulation band 20G
Hz (-3dB bandwidth) was obtained.
実施例２
第２図は本発明の実施例２の断面図である。実施例２は
、基板１に達する深さを有する溝１４を設けた点に特徴
がある０本実施例では、寄生容量を１０〜４０ｐＦから
１〜３ｐＦに低減でき、変調帯域２０ＧＨｚ （−３ｄ
Ｂバンド幅）を得た。Embodiment 2 FIG. 2 is a sectional view of Embodiment 2 of the present invention. Embodiment 2 is characterized in that a groove 14 having a depth reaching the substrate 1 is provided. In this embodiment, the parasitic capacitance can be reduced from 10 to 40 pF to 1 to 3 pF, and the modulation band is 20 GHz (-3d
B band width) was obtained.
実施例３
第３図は本発明の実施例３の断面図である。実施例３は
、基板に達する深さを有する溝１４を活性層３近傍に設
けた後、酸素およびリン気流の下で、２００〜４００℃
で熱処理することにより、溝１４表面を基板結晶材料の
酸化物被膜１２で覆ったことを特徴としている。本実施
例では、寄生容量は、１〜３ｐＦと低く、変調帯域２０
Ｇ Ｈｚ（−３ｄＢバンド幅）を得ることが出来た。Embodiment 3 FIG. 3 is a sectional view of Embodiment 3 of the present invention. In Example 3, after providing a groove 14 having a depth reaching the substrate near the active layer 3, the temperature was heated at 200 to 400°C under an oxygen and phosphorus air flow.
It is characterized in that the surface of the groove 14 is covered with an oxide film 12 of the substrate crystal material by heat treatment. In this example, the parasitic capacitance is as low as 1 to 3 pF, and the modulation band is 20 pF.
GHz (-3dB bandwidth).
溝１４の表面を、基板結晶材料と同種の元素を少なくと
も１種類含んだ酸化物で覆うことにより１表面の安定化
がなされた。この結果、温度５０℃光出力１０ｍＷ時間
１０００ｈｒの加速寿命試験を行なった後も変調帯域の
劣化は生じなかった。One surface was stabilized by covering the surface of the groove 14 with an oxide containing at least one element of the same type as the substrate crystal material. As a result, no deterioration of the modulation band occurred even after performing an accelerated life test at a temperature of 50° C. and an optical output of 10 mW for 1000 hours.
上記実施例１〜３では、溝表面を高温・酸素およびリン
気流下で酸化することにより、酸化被膜を得たが、ＣＶ
Ｄ法もしくは光ＣＶＤ法により溝表面に酸化被膜を形成
しても、同様に寿命信頼性を向上させることができた。In Examples 1 to 3 above, an oxide film was obtained by oxidizing the groove surface at high temperature under a flow of oxygen and phosphorus, but CV
Even when an oxide film was formed on the groove surface by the D method or the photo-CVD method, the life reliability could be similarly improved.
実施例４
第４図は本発明の実施例４の断面図である。ｎ型ＩｎＰ
基板１０１上にｎ型ＩｎＰバッファ層１０２ 、 Ｉｎ
ＧａＡｓＰ活性層（厚さ０．１−０．４ｕｍ）１０３ｔ
ｐ型ＩｎＰ層１０４．ｐ型ＩｎＧａＡｓＰ保護層１０
５を順次成長する。その後、幅１μｍ程度の幅の活性層
１０３を残したメサストライプ１１３を形成する。この
時、突出したメサストライプ１１３の機械的保護のため
に、ストライプから両側に１０μｍ以上離れた領域では
エツチングを行なわず、成長層を残しておく、この後、
ＭＯＣＶＤ法により、アンドープＩｎＰ層１０６を０．
３μｍ成長した。ＭＯＣＶＤ法の非平衡な成長メカニズ
ムを有する成長法は、メサストライプ１１３の形状をほ
ぼ保存しながら膜成長するので活性層の両側にも０．３
μｍのアンドープＩｎＰ層１０６が成長する。この後、
ＳｉＯｘ膜７を４０００人堆積して、ストライプ１１３
外部の電気絶縁を行ない、メサストライプ１１３上部の
Ｓ ｉ Ｏｘ膜１０７を除去し、これをマスクにしてメ
サ上部の埋込みＩｎＰ層１０６を除去し、Ｚｎ拡散領域
１０８を設けた。この後、ｐ側電極１０９．ｎ側電極１
１０を形成したのち、へき開法により共振器長２００μ
ｍの半導体レーザ装置を得た。Embodiment 4 FIG. 4 is a sectional view of Embodiment 4 of the present invention. n-type InP
An n-type InP buffer layer 102 and an InP buffer layer 102 are formed on the substrate 101.
GaAsP active layer (thickness 0.1-0.4um) 103t
p-type InP layer 104. p-type InGaAsP protective layer 10
Grow 5 sequentially. Thereafter, a mesa stripe 113 is formed leaving the active layer 103 with a width of about 1 μm. At this time, in order to mechanically protect the protruding mesa stripe 113, etching is not performed in areas 10 μm or more away from the stripe on both sides, leaving the growth layer.
By MOCVD method, the undoped InP layer 106 is 0.0.
It grew to 3 μm. The MOCVD method, which has a non-equilibrium growth mechanism, grows a film while almost preserving the shape of the mesa stripe 113, so there is a 0.3% growth on both sides of the active layer.
A μm thick undoped InP layer 106 is grown. After this,
4,000 SiOx films 7 are deposited to form stripes 113.
External electrical insulation was performed, and the SiOx film 107 above the mesa stripe 113 was removed. Using this as a mask, the buried InP layer 106 above the mesa was removed, and a Zn diffusion region 108 was provided. After this, the p-side electrode 109. n-side electrode 1
After forming 10, the resonator length was 200μ by the cleavage method.
A semiconductor laser device of m was obtained.
、 試作した素子は波長１．３μｍにおいてしきい°
電流１０ｍＡで発振した。室温における光出力１０ｍＷ
時における小信号周波数特性の測定結果を第７図中の一
点鎖線で示す、緩和振動に伴う共振状ピークが１５ Ｇ
Ｈｚ付近に現われ、３ｄＢ低下周波数は２０ Ｇ Ｈ
ｚまで達した。また素子の寄生インピーダンスによるロ
ールオフ３ｄＢ低下周波数は約１６ＧＨｚであり、測定
により得られた寄生容量Ｃ＝１．５ｐＦ 、直列抵抗Ｒ
＝６０から求まるｆ＝（２πＣＲ）−”の１７ＧＨ２と
ほぼ一致した。またアンドープＩｎＰ層１０６を通って
流れるリーク電流は約２ｍＡであり、重大な問題は生じ
なかった０以上のように、ＭＯＣＶＤ法により形成され
た薄膜ＩｎＰによる埋込み型半導体レーザは、寄生容量
が大幅に低減でき、秀れた高周波特性を実現できた。, The prototype device has a threshold at a wavelength of 1.3 μm.
It oscillated at a current of 10 mA. Light output 10mW at room temperature
The measurement results of the small signal frequency characteristics at 15 G are shown by the dot-dash line in Figure 7, and the resonant peak associated with relaxation vibration is
Appears around Hz, and the frequency is reduced by 3 dB to 20 GHz
It reached z. In addition, the roll-off 3 dB reduction frequency due to the parasitic impedance of the element is approximately 16 GHz, and the parasitic capacitance C = 1.5 pF and series resistance R obtained by measurement are approximately 16 GHz.
The leakage current flowing through the undoped InP layer 106 was approximately 2 mA, and no serious problem occurred. The buried-type semiconductor laser using the thin InP film formed by the above method was able to significantly reduce parasitic capacitance and achieve excellent high-frequency characteristics.
実施例５
第５図は本発明の実施例５の断面図である。本実施例の
構成及び製作方法は実施例４とほぼ同様であるが異なる
点は次の２点である。まず、活性層が厚さ１０ｎｍのＩ
ｎｏ、ｓａＧ ａｏ＊４ｔＰウェル層と厚さ１０ｎｍ
のＩｎＰバリア層を各々１層層ずつ交互に積層した多重
量子井戸活性層１１１となっている。さらに、メサスト
ライプ１１３形成後の埋込み層１１２形成をハライド系
ＶＰＥ法により行い、０．５μｍ厚さのＦｅドープＩｎ
Ｐ層を形成したことである。この埋込み時には、メサス
トライプ１１３形成用のＳｉ０ｇマスクを残しておいた
ために、メサストライプ１１３上部には埋込み層１１２
は成長していない。Embodiment 5 FIG. 5 is a sectional view of Embodiment 5 of the present invention. The configuration and manufacturing method of this embodiment are almost the same as those of embodiment 4, but the following two points are different. First, the active layer is an I layer with a thickness of 10 nm.
no, saG ao*4tP well layer and thickness 10nm
The multi-quantum well active layer 111 is made by alternately stacking InP barrier layers, one layer each. Further, after forming the mesa stripe 113, a buried layer 112 is formed by a halide-based VPE method, and a Fe-doped In layer with a thickness of 0.5 μm is formed.
This is because a P layer was formed. At the time of this embedding, since the SiOg mask for forming the mesa stripe 113 was left, the buried layer 112 was formed above the mesa stripe 113.
is not growing.
本実施例においては、波長１．５μｍにおいて、しきい
電流５ ｍ Ａで発振した。実施例４に比べてしきい電
流が低減した理由は２点であり、まず、第１点は多重量
子井戸活性層の量子サイズ効果により、低キヤリア密度
で発振可能となった。第２点は埋込み層１１２にＦｅド
ープＩｎＰ層を用いたために高抵抗（ρ＞１０６Ωｃ１
１）化したため、リーク電流が押さえられた（＜０．１
ｍＡ）ためである。本素子の室温における光出力９ｍＷ
時の小信号周波数特性を第７図中の実線で示す。まず、
量子サイズ効果により、緩和振動周波数は２５ＧＨｚま
で増大した。また、埋込み層が高抵抗化できたため、そ
の寄生容量はＩｐＦ程度に低減し、寄生インピーダンス
によるロールオフ３ｄＢ低下周波数は２５ Ｇ Ｈｚま
で達した。In this example, oscillation was performed at a wavelength of 1.5 μm and a threshold current of 5 mA. There are two reasons why the threshold current was reduced compared to Example 4. First, oscillation was possible at a low carrier density due to the quantum size effect of the multi-quantum well active layer. The second point is that the buried layer 112 uses a Fe-doped InP layer, so the resistance is high (ρ>106Ωc1
1), the leakage current was suppressed (<0.1
mA). Optical output of this device at room temperature: 9mW
The small signal frequency characteristics at the time are shown by the solid line in FIG. first,
Due to the quantum size effect, the relaxation oscillation frequency increased to 25 GHz. Furthermore, since the buried layer was able to have a high resistance, its parasitic capacitance was reduced to about IpF, and the frequency at which the parasitic impedance roll-off decreased by 3 dB reached 25 GHz.
実施例６
第６図は本発明をＧａＡ Ｑ Ａｓ系半導体レーザに適
用した場合の実施例６の断面図である。ｎ型ＧａＡｓ基
板１２１上にｎ型ＧａＡ （ｌ Ａｓクラッド層１２２
゜厚さ７層ｍのＧａＡｓウェルとＩ Ｘ １０ ”ａｍ
−’のｐドーピングを行った厚さ７層ｍのＧａｏ、ａＡ
’ｎ ｏ、ｚＡｓバリヤを交互にそれぞれ５層ずつ積
層した変調ドープＭＱＷ活性層１２３．ｐ型ＧａＡ Ｑ
Ａｓクラッド層１２４．ｐ型Ｇ ａ Ａ ｓキャップ
層１２５を順次。Example 6 FIG. 6 is a sectional view of Example 6 in which the present invention is applied to a GaA Q As semiconductor laser. An n-type GaAs cladding layer 122 is formed on an n-type GaAs substrate 121.
゜7 layer m thick GaAs well and I x 10” am
-' p-doped Gao, aA with a thickness of 7 m
A modulation doped MQW active layer 123 in which five layers of 'no and zAs barriers are alternately stacked. p-type GaA Q
As cladding layer 124. A p-type GaAs cap layer 125 is sequentially formed.
ＭＯＣＶＤ法あるいはＭＢＥ法により成長する。It is grown by MOCVD method or MBE method.
本実施例では特に緩和振動周波数を増大するために、活
性層に変調ドープＭＱＷを導入した。、この後、実施例
４と同様のメサストライプ１１３を形成し、ＭＯＣＶＤ
法により、アンドープである高抵抗ＧａＡ ｎ Ａｓ層
１２６を０．３ μｍ成長する。この後、５ｉｆｔ層１
２７を３０００人堆積し、その上にポリイミド膜１２８
を塗布し、表面を平坦化する。その後、メサストライプ
１１３上部の５ｉｎｓ膜１２７とポリイミド膜１２８を
除去して、これをマスクにして、ＧａＡ Ｑ Ａｓ埋込
み層１２６をエツチングにより除去し、ｐ側電極１２９
．ｎ側電極１３０を形成する。素子はへき間長１５０μ
ｍとした。In this example, a modulation-doped MQW was introduced into the active layer in order to particularly increase the relaxation oscillation frequency. , After that, a mesa stripe 113 similar to that in Example 4 is formed, and MOCVD is performed.
An undoped high-resistance GaA n As layer 126 is grown to a thickness of 0.3 μm by a method. After this, 5ift layer 1
27 was deposited by 3,000 people, and a polyimide film 128 was deposited on top of it.
and flatten the surface. After that, the 5ins film 127 and the polyimide film 128 on the upper part of the mesa stripe 113 are removed, and using this as a mask, the GaA Q As buried layer 126 is removed by etching, and the p-side electrode 129 is removed.
．． An n-side electrode 130 is formed. The gap length of the element is 150μ
It was set as m.
′試作した素子は波長８３０ｎｍにおいて、しきい電流
４ｍＡで発振した。光出力１３ｍＷにおける緩和振動周
波数は、変ＷＲｐドープの効果により、３０ Ｇ Ｈｚ
を超え、測定不能であった。また、素子の寄生容量は約
１．５ｐＦ 、直列抵抗は４Ωで、これらの寄生インピ
ーダンスによるロールオフ３ｄＢ低下周波数は約２２
Ｇ Ｈｚであった。'The prototype device oscillated at a wavelength of 830 nm and a threshold current of 4 mA. The relaxation oscillation frequency at an optical output of 13 mW is 30 GHz due to the effect of variable WRp doping.
exceeded and was not measurable. In addition, the parasitic capacitance of the element is approximately 1.5 pF, and the series resistance is 4 Ω, and the roll-off 3 dB reduction frequency due to these parasitic impedances is approximately 22
It was GHz.
また、上記実施例４〜６において、ストライプ外部の絶
縁は５ｉｎｓ膜のみを示したが、他の絶縁膜（ＳｉＮつ
膜）を用いても、はぼ同様の効果が得られた。Further, in Examples 4 to 6, only the 5-ins film was used as the insulation outside the stripe, but even if other insulation films (SiN films) were used, similar effects could be obtained.
以上のように本発明による薄膜の埋込み層を有する半導
体レーザは高速変調特性に秀れ、しかもリーク電流を低
減できることがわかった。また。As described above, it has been found that the semiconductor laser having a thin buried layer according to the present invention has excellent high-speed modulation characteristics and can reduce leakage current. Also.
本発明は、グレーティングのブラッグ反射を用いたＤＦ
ＢあるいはＤＢＲレーザに対しても適用できることは言
うまでもない。The present invention is a DF using Bragg reflection of a grating.
Needless to say, the present invention can also be applied to B or DBR lasers.
また、上記各実施例１〜６において導電型を反対にした
構造（ｐをｎに、ｎをｐに）においてもほぼ同様の効果
が得られた。Moreover, almost the same effect was obtained even in the structures in which the conductivity types were reversed in each of Examples 1 to 6 (p to n, n to p).
また、本発明はその技術的手段から判断して、室温連続
発振ができる全範囲の半導体レーザの構成に対して適用
できることは当業者が容易に理解し得るところである。Further, those skilled in the art can easily understand that the present invention can be applied to a wide range of semiconductor laser configurations capable of continuous oscillation at room temperature, judging from its technical means.
本発明によれば、ストライプ外部の埋込み層の幅を制御
良く簡便に１．０μｍ以下特には０．５μｍ程度にでき
、寄生容量を大幅に低減できるので、従来の半導体レー
ザに比べてはるかに秀れた２０Ｇ Ｈｚ以上の超高速変
調可能で、寿命信頼性の高い半導体レーザを作製するこ
とができる。According to the present invention, the width of the buried layer outside the stripe can be easily controlled and reduced to 1.0 μm or less, particularly about 0.5 μm, and the parasitic capacitance can be significantly reduced, making it far superior to conventional semiconductor lasers. It is possible to fabricate a semiconductor laser that is capable of ultra-high-speed modulation of 20 GHz or more and has a highly reliable lifetime.
第１図、第２図、第３図、第４図、第５図および第６図
は各々本発明の実施例１．実施例２．実施例３．実施例
４．実施例５および実施例６の半導体レーザ装置の断面
図である。第７図は本発明の実施例４および実施例５の
半導体レーザ装置の高速変調特性の測定結果を示す図で
ある。
１−ｎ型ＩｎＰ基板、２− ｎ型ＩｎＧａＡｓＰ光ガイ
ド層、３・・・アンドープＩｎＧａＡｓＰ活性層、４・
・・ｐ型ＩｎＧａＡｓＰバアファー層、５・・・ｐ型Ｉ
ｎＰクラッド層、６・・・ｐ型１．ｎＰ埋込み層、７・
・・ｎ型ＩｎＰ埋込み層、８・・・ｐ型ＩｎＰクラッド
層、９・・・ｐ型ＩｎＧａＡｓＰキャップ層、１０−
ｐ側電極、１１− ｎ側電極、１２・・・酸化被膜、１
３・・・メサストライプ、１４−・・溝、１０３−Ｉｎ
ＧａＡｓＰ活性層、１０６−・・ＭｏＣＶＤ法によるア
ンドープＩｎＰ層、１０７゜１２７−８ ｉ Ｏｘ膜、
１０９”’Ｐ電極、１１１ ・・・多重量子井戸活性層
、１１２・・・ＦｅドープＩｎＰ層、１１３・・・メサ
ストライプ、１２３・・・変調ドープＭＱＷ層、１２６
−ＭｏＣＶＤによる高抵抗第１図
第２図
′＄４１￥１
第５図
１１８メ１八ｒ７４ノ
周仮牧 （Ｇ）（ｚ）
１２８不′リイミトｌｉＩ喪FIG. 1, FIG. 2, FIG. 3, FIG. 4, FIG. 5, and FIG. 6 each illustrate embodiment 1 of the present invention. Example 2. Example 3. Example 4. FIG. 7 is a cross-sectional view of semiconductor laser devices of Examples 5 and 6. FIG. 7 is a diagram showing measurement results of high-speed modulation characteristics of semiconductor laser devices according to Examples 4 and 5 of the present invention. 1-n-type InP substrate, 2-n-type InGaAsP light guide layer, 3... undoped InGaAsP active layer, 4...
...p-type InGaAsP buffer layer, 5...p-type I
nP cladding layer, 6...p type 1. nP buried layer, 7.
... n-type InP buried layer, 8... p-type InP cladding layer, 9... p-type InGaAsP cap layer, 10-
p-side electrode, 11- n-side electrode, 12... oxide film, 1
3... Mesa stripe, 14-... Groove, 103-In
GaAsP active layer, 106-... undoped InP layer by MoCVD method, 107°127-8 i Ox film,
109'''P electrode, 111...multi-quantum well active layer, 112...Fe-doped InP layer, 113...mesa stripe, 123...modulation doped MQW layer, 126
- High resistance due to MoCVD Fig. 1 Fig. 2 '$41 yen Fig. 5
Claims (1)
トライプの両側に埋込んだ活性層より屈折率の小さい半
導体結晶層中に設けた溝により形状が規定されているこ
とを特徴とする埋込み型半導体レーザ。 ２、上記溝は、基板に達する深さを有する特許請求の範
囲第１項記載の埋込み型半導体レーザ。 ３、上記溝の表面を基板結晶材料と同様の元素を少なく
とも１種類含んだ酸化物によつて被つた特許請求の範囲
第１項または第２項記載の埋込み型半導体レーザ。 ４、埋込み型半導体レーザにおいて、埋込み層はメサス
トライプに被着形成した膜厚３μｍ以下の活性層より屈
折率の小さい半導体薄膜であることを特徴とする埋込み
型半導体レーザ。 ５、上記埋込み層は、ＭＯＣＶＤ法、ＭＢＥ法、ハライ
ド系ＶＰＥ法、クロライド系ＶＰＥ法、光ＣＶＤ法のい
ずれかの成長法により形成した特許請求の範囲第１項記
載の埋込み型半導体レーザ。 ６、上記埋込み層は、アンドープもしくはＦｅ、Ｃｒ、
Ｏ等の不純物を導入して高抵抗化し、半絶縁化したもの
である特許請求の範囲第４項記載の埋込み型半導体レー
ザ。 ７、上記埋込み層は、ＧａＡｌＡｓ系半導体レーザでは
ＧａＡｌＡｓ、ＩｎＰ／ＩｎＧａＡｓＰ系半導体レーザ
ではＩｎＰである特許請求の範囲第４項記載の埋込み型
半導体レーザ。 ８、上記活性層は、電子のドウ・ブロイ波長以下の厚さ
のウェル層と、該ウェル層よりも禁制帯幅の大きいバリ
ア層とを交互に重ね合わせた多重量子井戸活性層である
特許請求の範囲第４項記載の埋込み型半導体レーザ。 ９、上記埋込みメサストライプの上部以外の領域の上記
埋込み層上にＳｉＯ＿２あるいはＳｉＮ＿ｘ膜等の絶縁
膜を堆積した特許請求の範囲第４項記載の埋込み型半導
体レーザ。[Claims] 1. In a buried semiconductor laser, the shape of the buried layer is defined by a groove provided in a semiconductor crystal layer having a lower refractive index than the active layer buried on both sides of the mesa stripe. An embedded semiconductor laser. 2. The embedded semiconductor laser according to claim 1, wherein the groove has a depth that reaches the substrate. 3. The buried semiconductor laser according to claim 1 or 2, wherein the surface of the groove is covered with an oxide containing at least one element similar to the substrate crystal material. 4. A buried semiconductor laser, characterized in that the buried layer is a semiconductor thin film having a refractive index smaller than that of the active layer and having a thickness of 3 μm or less formed on the mesa stripe. 5. The buried semiconductor laser according to claim 1, wherein the buried layer is formed by any one of MOCVD, MBE, halide VPE, chloride VPE, and photo-CVD. 6. The buried layer is undoped or made of Fe, Cr,
5. The buried semiconductor laser according to claim 4, which is made semi-insulating by introducing impurities such as O to increase the resistance. 7. The buried semiconductor laser according to claim 4, wherein the buried layer is GaAlAs in a GaAlAs-based semiconductor laser and InP in an InP/InGaAsP-based semiconductor laser. 8. A patent claim in which the active layer is a multi-quantum well active layer in which well layers having a thickness equal to or less than the Doe-Broglie wavelength of electrons and barrier layers having a wider forbidden band width than the well layers are alternately stacked. 4. The embedded semiconductor laser according to item 4. 9. The buried semiconductor laser according to claim 4, wherein an insulating film such as SiO_2 or SiN_x film is deposited on the buried layer in a region other than the upper part of the buried mesa stripe.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27012887A JPH01114092A (en) | 1987-10-28 | 1987-10-28 | Buried-type semiconductor laser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27012887A JPH01114092A (en) | 1987-10-28 | 1987-10-28 | Buried-type semiconductor laser |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01114092A true JPH01114092A (en) | 1989-05-02 |
Family
ID=17481942
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27012887A Pending JPH01114092A (en) | 1987-10-28 | 1987-10-28 | Buried-type semiconductor laser |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01114092A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1992005576A1 (en) * | 1990-09-14 | 1992-04-02 | Gte Laboratories Incorporated | New structure and method for fabricating indium phosphide/indium gallium arsenide phosphide buried heterostructure semiconductor lasers |
| JPH0685405A (en) * | 1992-01-24 | 1994-03-25 | American Teleph & Telegr Co <Att> | Embedded heterostructure laser |
| JP2008000694A (en) * | 2006-06-22 | 2008-01-10 | Chugoku Electric Power Co Inc:The | Cleaning device |
| JP2008227287A (en) * | 2007-03-14 | 2008-09-25 | Sumitomo Electric Ind Ltd | Method of fabricating semiconductor optical device |
| JP2011077221A (en) * | 2009-09-30 | 2011-04-14 | Oki Electric Industry Co Ltd | Semiconductor laser and high-frequency characteristic measuring method thereof |
| JP2013214762A (en) * | 2008-09-19 | 2013-10-17 | Fujitsu Ltd | Optical waveguide |
| JP2016213323A (en) * | 2015-05-08 | 2016-12-15 | 三菱電機株式会社 | Semiconductor device manufacturing method and semiconductor device |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1992005576A1 (en) * | 1990-09-14 | 1992-04-02 | Gte Laboratories Incorporated | New structure and method for fabricating indium phosphide/indium gallium arsenide phosphide buried heterostructure semiconductor lasers |
| JPH0685405A (en) * | 1992-01-24 | 1994-03-25 | American Teleph & Telegr Co <Att> | Embedded heterostructure laser |
| JP2008000694A (en) * | 2006-06-22 | 2008-01-10 | Chugoku Electric Power Co Inc:The | Cleaning device |
| JP2008227287A (en) * | 2007-03-14 | 2008-09-25 | Sumitomo Electric Ind Ltd | Method of fabricating semiconductor optical device |
| JP2013214762A (en) * | 2008-09-19 | 2013-10-17 | Fujitsu Ltd | Optical waveguide |
| JP2011077221A (en) * | 2009-09-30 | 2011-04-14 | Oki Electric Industry Co Ltd | Semiconductor laser and high-frequency characteristic measuring method thereof |
| JP2016213323A (en) * | 2015-05-08 | 2016-12-15 | 三菱電機株式会社 | Semiconductor device manufacturing method and semiconductor device |
| US10116121B2 (en) | 2015-05-08 | 2018-10-30 | Mitsubishi Electric Corporation | Semiconductor device manufacturing method and semiconductor device |
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