JPH01103165A - Power supply - Google Patents

Power supply

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Publication number
JPH01103165A
JPH01103165A JP26005687A JP26005687A JPH01103165A JP H01103165 A JPH01103165 A JP H01103165A JP 26005687 A JP26005687 A JP 26005687A JP 26005687 A JP26005687 A JP 26005687A JP H01103165 A JPH01103165 A JP H01103165A
Authority
JP
Japan
Prior art keywords
voltage
power supply
current
smoothing capacitor
inductance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26005687A
Other languages
Japanese (ja)
Other versions
JP2619423B2 (en
Inventor
Minoru Maehara
稔 前原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP62260056A priority Critical patent/JP2619423B2/en
Publication of JPH01103165A publication Critical patent/JPH01103165A/en
Application granted granted Critical
Publication of JP2619423B2 publication Critical patent/JP2619423B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To reduce the strain of the input current with a high input power factor by providing the first and second voltage doublers and connecting respectively without using a transformer. CONSTITUTION:A power supply device is constituted of an inductance element 2, the first voltage doubler rectifier consisting of the first - second diodes D1-D2 and smoothing capacitor 5a-5b, a capacitance element 4, the second voltage doubler rectifier consisting of the third - fourth diodes D3-D4 and smoothing capacitor 5a-5b. The load 7 is constituted of a single stone system inverter device, and this inverter device makes high frequency switching for a transistor Q1 at an oscillator CO to generate high frequency voltage at the ends of an electric discharge lamp la. Accordingly, DC output voltage higher than 0-peak value of AC input is obtained from voltage VS of the lower AC power 1 at the inductance element 2 with less inductance value and the capacitance 4, without using any transformer.

Description

【発明の詳細な説明】 [技術分野 本発明は電源装置に関するものである。[Detailed description of the invention] [Technical field The present invention relates to a power supply device.

[背近扶術J 低い電圧の交流電源から、この交流電源電圧の零−ピー
ク値より高い直流電圧を得たい場合がある。第5図は交
流型*iの電圧vsの零−ピーク値とほぼ同じ高さの直
流電圧を得るための電源装置の回路を示している。この
回路において交流電源1をトランスで外圧して得た交流
電圧を入力電源とすることにより、交流電源1の電圧V
sの零−ピーク値より高い直流電圧を得ることは容易に
考えられることである。第6図はその考えに基づいて交
流型1!!1の電圧Vsの零−ピーク値とほぼ同じ高さ
の直流電圧を得るように構成した従来例装置を示してお
り、交流型[1の電圧Vsを昇圧するトランス8の1次
、2次の巻数比を、例えばN、:N2=1:2に選べば
交流?t!alの電圧V8の零−ピーク値のほぼ2fi
の直流出力が得られる電源装置を実現している。
[Back-up Technique J] There are cases where it is desired to obtain a DC voltage higher than the zero-to-peak value of the AC power supply voltage from a low voltage AC power supply. FIG. 5 shows a circuit of a power supply device for obtaining a DC voltage of approximately the same height as the zero-to-peak value of the voltage vs of the AC type *i. In this circuit, by using the AC voltage obtained by applying external voltage to the AC power source 1 using a transformer as the input power source, the voltage V of the AC power source 1 is
It is easily conceivable to obtain a DC voltage higher than the zero-peak value of s. Figure 6 shows AC type 1 based on that idea! ! The figure shows a conventional device configured to obtain a DC voltage of approximately the same height as the zero-to-peak value of voltage Vs of voltage Vs of AC type [primary and secondary of transformer 8 that boosts voltage Vs of voltage Vs of voltage 1]. If you choose the turns ratio, for example, N, :N2=1:2, will it be AC? T! Approximately 2fi of the zero-peak value of voltage V8 of al
We have realized a power supply device that can obtain DC output.

次にこの従来例装置の基本となる第5図回路について説
明する。
Next, the circuit shown in FIG. 5, which is the basis of this conventional device, will be explained.

この回路は交流電源1にインダクタンス素子2を介して
接続した全波整流器3の出力端と、交流電源1にキャパ
シタンス素子4を介して接続した全波整流56の出力端
とを共通の平滑コンデンサ5に接続した楕成となってい
る。図において接続されている負荷7は直流電圧を高周
波交流電圧に変換するインバータ装置等である。
This circuit connects the output end of a full-wave rectifier 3 connected to an AC power source 1 through an inductance element 2 and the output end of a full-wave rectifier 56 connected to an AC power source 1 through a capacitance element 4 using a common smoothing capacitor 5. It is an oval structure connected to. The load 7 connected in the figure is an inverter device or the like that converts DC voltage into high frequency AC voltage.

この第5図回路の動作は次の通りである。The operation of this circuit of FIG. 5 is as follows.

即ち令弟7図(a)に示す交流電源1の電圧Vsが正の
サイクルの開始時にあるとすると、この時点では既にキ
ャパシタンス素子4は第7図(d)に示すように電荷が
貯よっており、図示するようにマイナスの電位をもって
いる。この電位の向きは交流電源1の正の半サイクルの
向きと同じである。
In other words, if the voltage Vs of the AC power source 1 shown in FIG. 7(a) is at the beginning of a positive cycle, at this point the capacitance element 4 has already accumulated charge as shown in FIG. 7(d). , has a negative potential as shown in the figure. The direction of this potential is the same as the direction of the positive half cycle of the AC power supply 1.

やがて電源電圧Vsが高くなり、キャパシタンス素子4
の電圧Vcを加えた電圧が第7図(、)に示す平滑コン
デンサ5の電圧VDCと等しくなる。
Eventually, the power supply voltage Vs increases, and the capacitance element 4
The voltage obtained by adding the voltage Vc becomes equal to the voltage VDC of the smoothing capacitor 5 shown in FIG.

すると、キャパシタンス素子4を介した全波整流器6へ
交流電源1から第7図(c)に示す電流1 i nCが
流れ始める。この電流1ineによってキャパシタンス
素子4は初めと逆向きに電荷が充電され、電源電圧VS
と逆向きに電圧を持つようになる。
Then, a current 1 inC shown in FIG. 7(c) starts to flow from the AC power supply 1 to the full-wave rectifier 6 via the capacitance element 4. With this current 1ine, the capacitance element 4 is charged in the opposite direction, and the power supply voltage VS
The voltage will be in the opposite direction.

このキャパシタンス索子4の電圧Vcと平滑コンデンサ
5の電圧VOCとの和が、電源電圧V9と等しくなると
、キャパシタンス索子4を介して流れる電流1ineは
流れなくなる。このときのキャパシタンス素子4に蓄え
られている電荷は交流電源1の負のサイクルまで維持さ
れる。
When the sum of the voltage Vc of the capacitance cord 4 and the voltage VOC of the smoothing capacitor 5 becomes equal to the power supply voltage V9, the current 1ine flowing through the capacitance cord 4 stops flowing. The charge stored in the capacitance element 4 at this time is maintained until the negative cycle of the AC power supply 1.

一方イングクタンス素子2を介する全波!さ流器3への
電流linしは電源電圧Vsが平滑コンデンサ5の電圧
VDCと等しくなったとき流れ始め、次に電源電圧V 
sがピーク値を越えて下がって電圧■D0と等しくなる
まで第7図(e)に示すように増加する。この後電源電
圧Vsが電圧VOCより低くなっても、インダクタンス
素子2に発生する誘起電圧のためしばらく電流1 in
l、は減少しながらも流れ続けてやがて零になり、交流
電源1の正の半サイクルが終了する。負の半サイクルも
全く同様な理由で各電流が流れる。
On the other hand, a full wave passes through the inductance element 2! The current lin to the current filter 3 starts to flow when the power supply voltage Vs becomes equal to the voltage VDC of the smoothing capacitor 5, and then the power supply voltage V
The voltage s increases as shown in FIG. 7(e) until it drops beyond the peak value and becomes equal to the voltage .D0. After this, even if the power supply voltage Vs becomes lower than the voltage VOC, the current 1 in.
l, continues to flow while decreasing and eventually reaches zero, and the positive half cycle of the AC power supply 1 ends. In the negative half cycle, each current flows for exactly the same reason.

従って第5図回路を用いた#16図の回路も全く同様の
理由でインダクタンス素子2、キャパシタンス素子4に
電流1inLx fineが夫々流れる。
Therefore, in the circuit shown in FIG. 16 using the circuit of FIG. 5, a current of 1 inLx fine flows through the inductance element 2 and the capacitance element 4, respectively, for exactly the same reason.

しかしながらこの第6図回路で所望の電圧の直流を得る
ためには昇圧用のトランス8が必要となり、そのため大
型且つ高価になるという欠点が有る上に、第7図(b)
に示すように入力電流1inに休止期間t0が存在する
ため、入力力率を高くし、入力電流歪みを小さくしよう
とすれば、入力電流1i11の導通期間を更に広げなけ
ればならない。゛このためにはインダクタンス素子2の
インダクタンス素子りのインダクタンス値を大きくして
誘導起電力を大きくすることで、導通期間を広げること
が考えられるが、インダクタンス素子2の値を大きくす
ると、インダクタンス素子2と平滑コンデンサ5との電
源電圧Vsの分圧において、インダクタンス素子2の割
合が大きくなり、平滑コンデンサ5に十分高い電圧が得
られない上に装置が大型化し、コストが高くなるという
欠点が有る。
However, in order to obtain the desired DC voltage with this circuit in Fig. 6, a step-up transformer 8 is required, which has the disadvantage of being large and expensive.
As shown in FIG. 1, since there is a rest period t0 in the input current 1 inch, in order to increase the input power factor and reduce the input current distortion, the conduction period of the input current 1i11 must be further extended.゛For this purpose, it is possible to widen the conduction period by increasing the inductance value of the inductance element 2 and increasing the induced electromotive force. However, if the value of the inductance element 2 is increased, In the voltage division of the power supply voltage Vs between the smoothing capacitor 5 and the smoothing capacitor 5, the proportion of the inductance element 2 becomes large, and there are disadvantages in that a sufficiently high voltage cannot be obtained for the smoothing capacitor 5, and the device becomes larger and the cost increases.

[発明の目的] 本発明は上述の問題点に鑑みて為されたもので、その目
的とするところはトランスを用いることなく低電圧交流
電源から高い直流電圧が得られ、しかも高入力力率で且
つ入力電流の歪みが小さく、安価で小型に製作できる電
源装置を提供するにある。
[Object of the Invention] The present invention was made in view of the above-mentioned problems, and its purpose is to obtain a high DC voltage from a low-voltage AC power supply without using a transformer, and to achieve a high input power factor. It is an object of the present invention to provide a power supply device which has low input current distortion and can be manufactured inexpensively and compactly.

[発明の開示] 本発明は誘導性リアクタンスの一端を交流電源に接続す
るとともに順方向に接続した第1のダイオードと第2の
ダイオードとの直列回路の中間接続点に上記誘導性リア
クタンスの他端を接続し、上記第1、第2のダイオード
の直列回路の両端に平滑コンデンサを2個直列接続し、
上記2個の平滑コンデンサの中間接続点に交流電源のf
illを接続して第1の倍電圧整流回路を形成し、上記
2個の平滑コンデンサの直列回路の両端に順方向に接続
したtj43のダイオードとm4のダイオードの1a列
回路を接続し、上記第3、fpJ4のダイオードの中間
接続点に容量性リアクタンスの一端を接続し、該容量性
リアクタンスの他端を上記誘導性リアクタンスと交流電
源との接続点に接続して第2の倍電圧整流回路を形成す
ることで、トランスを用いずとも、交流電源の電圧の零
−ピーク値のほぼ倍の直流電圧が得られ且つ入力電流の
導通期間を広げて入力力率を高くし、入力電流歪みを小
さくすることができるというvj徴がある。
[Disclosure of the Invention] The present invention provides that one end of an inductive reactance is connected to an AC power source, and the other end of the inductive reactance is connected to an intermediate connection point of a series circuit of a first diode and a second diode connected in the forward direction. and two smoothing capacitors are connected in series to both ends of the series circuit of the first and second diodes,
f of the AC power supply at the intermediate connection point of the above two smoothing capacitors.
ill is connected to form a first voltage doubler rectifier circuit, and a 1a column circuit of a diode tj43 and a diode m4 connected in the forward direction is connected to both ends of the series circuit of the two smoothing capacitors. 3. Connect one end of a capacitive reactance to the intermediate connection point of the diode of fpJ4, and connect the other end of the capacitive reactance to the connection point between the inductive reactance and the AC power source to form a second voltage doubler rectifier circuit. By forming the DC voltage, it is possible to obtain a DC voltage that is almost twice the zero-to-peak value of the voltage of the AC power supply without using a transformer, and also to widen the conduction period of the input current, increase the input power factor, and reduce input current distortion. There are signs that it can be done.

以下本発明を実施例により説明する。The present invention will be explained below with reference to Examples.

え1汁り 本実施例は第1図に示すように交流電yi1、誘導性リ
アクタンスたるインダクタンス索子2、第1のダイオー
ドD1、第2のダイオードD2、平滑フンデンサ5 a
t S bからなる第1の倍電圧整流回路と、容量性リ
アクタンスたるキャパシタンス素子4、第3のダイオー
ドD1、第4のダイオードD4、平滑コンデンサ5a、
5bからなる第2の倍電圧整流回路とで構!′&されて
いる。
As shown in FIG. 1, this embodiment includes an alternating current voltage yi1, an inductance wire 2 which is an inductive reactance, a first diode D1, a second diode D2, and a smooth foundation capacitor 5a.
A first voltage doubler rectifier circuit consisting of tSb, a capacitance element 4 as a capacitive reactance, a third diode D1, a fourth diode D4, a smoothing capacitor 5a,
A second voltage doubler rectifier circuit consisting of 5b is enough! '& has been.

次に本実施例の動作を第2図の波形図に基づいて説明す
る。
Next, the operation of this embodiment will be explained based on the waveform diagram of FIG. 2.

令弟2図(a)に示す交流電源1の電圧Vsの正の半サ
イクルの開始時にあるとすると、キャパシタンス素子4
は第2図(d)に示すように交流1!源1の正サイクル
と同じ向きに電位を持っている。電源電圧Vsが高くな
ると、やがてキャパシタンス索子4の電圧Vcと電源電
圧V9の和が平滑コンデンサ5aの電圧■c11と等し
くなる。すると交流電[1からキャパシタンス素子4へ
$2図(e)に示すように電流1incが流れる。キャ
パシタンス素子4に電流1ineが流れ続けるとキャパ
シタンス索子4は初めと逆向きに充電され、電源電圧V
sと逆向きの電圧Vcを持つようになる。そしてキャパ
シタンス素子4の電圧Vcと平滑コンデンサ5aの電圧
Vcaとの和が電源電圧Vsと等しくなると、キャパシ
タンス索子4を介する電流は流れなくなる。
At the beginning of the positive half cycle of the voltage Vs of the AC power supply 1 shown in FIG. 2(a), the capacitance element 4
As shown in Figure 2(d), AC 1! It has a potential in the same direction as the positive cycle of source 1. As the power supply voltage Vs increases, the sum of the voltage Vc of the capacitance cord 4 and the power supply voltage V9 eventually becomes equal to the voltage c11 of the smoothing capacitor 5a. Then, a current of 1 inc flows from the AC current 1 to the capacitance element 4 as shown in Figure (e). When 1ine of current continues to flow through the capacitance element 4, the capacitance element 4 is charged in the opposite direction to the beginning, and the power supply voltage V
It has a voltage Vc in the opposite direction to s. When the sum of the voltage Vc of the capacitance element 4 and the voltage Vca of the smoothing capacitor 5a becomes equal to the power supply voltage Vs, no current flows through the capacitance cord 4.

このときのキャパシタンス素子4の電荷は負の半サイク
ルまで維持される。次にインダクタンス素子4を介して
流れる第2図(e)に示す電流1in1゜は電源電圧V
Sが平滑コンデンサ5aの電圧eaと等しくなると流れ
始める。平滑コンデンサ5aの電圧Vc+aは次第に上
昇していくのに対して、N源電圧Vsはピーク値に達し
て下がるため、再び両者の電圧VcaとVsが等しくな
る。この間は電源電圧Vsの方が平滑コンデンサ5aの
電圧Vc@より高いので、インダクタンス索子2に流れ
る電流1inlは増加して行く。やがて電源電圧Vsが
平滑コンデンサ5aの電圧Vcaより低くなると、イン
ダクタンス索子4の誘起電圧によって、しばら(電流r
inしは流れ続けるが、やがて零になり、正の半サイク
ルが終了する。平滑コンデンサ5aは次の正の半サイク
ルまで負荷7に電流を放出するのみである。
The charge on the capacitance element 4 at this time is maintained until the negative half cycle. Next, the current 1in1° shown in FIG. 2(e) flowing through the inductance element 4 is equal to the power supply voltage V
When S becomes equal to the voltage ea of the smoothing capacitor 5a, it begins to flow. While the voltage Vc+a of the smoothing capacitor 5a gradually increases, the N source voltage Vs reaches its peak value and decreases, so that the voltages Vca and Vs become equal again. During this period, the power supply voltage Vs is higher than the voltage Vc@ of the smoothing capacitor 5a, so the current 1 inl flowing through the inductance cord 2 increases. When the power supply voltage Vs eventually becomes lower than the voltage Vca of the smoothing capacitor 5a, the induced voltage of the inductance cord 4 causes the current r
The incoming signal continues to flow, but eventually reaches zero, ending the positive half cycle. Smoothing capacitor 5a only releases current to load 7 until the next positive half cycle.

さて負の半サイクルでは平滑コンデンサ5bに上述と同
様の電流が流れる。従って一つの平滑コンデンサ5a又
は5bは正の半サイクル又は負の半サイクルのどちらか
一方でしか充電されず、電荷の放出期間が長いので、全
波整流のときに比べて電流が流れ始めるときの平滑コン
デンサ5g又は5bの電圧Vca又はVcbがわずかに
低く、そのため第2図(b)に示す入力電流finは大
きくなる。よりてキャパシタンス素子4に流れろ電流1
ineも第2図(c)に示すように大きくなるので、キ
ャパシタンス素子4に発生する電圧Vcが高くなる。従
って、平滑コンデンサ5a又は5bの電圧Vca又はV
ebの低下と相まっで電源電圧Vsが全波整流のときよ
り低い電圧で、キャパシタンス素子4の電圧Vcとの和
が平滑コンデンサ5a又は5bの電圧V ca又はVc
bと等しくなる。
Now, in the negative half cycle, a current similar to that described above flows through the smoothing capacitor 5b. Therefore, one smoothing capacitor 5a or 5b is charged only in either the positive half cycle or the negative half cycle, and the discharge period for charge is long, so when the current starts flowing, compared to full-wave rectification, The voltage Vca or Vcb of the smoothing capacitor 5g or 5b is slightly low, so the input current fin shown in FIG. 2(b) becomes large. Therefore, a current 1 flows through the capacitance element 4.
Since ine also increases as shown in FIG. 2(c), the voltage Vc generated in the capacitance element 4 increases. Therefore, the voltage Vca or V of the smoothing capacitor 5a or 5b
Combined with the decrease in eb, the power supply voltage Vs is lower than that in full-wave rectification, and the sum of the voltage Vc of the capacitance element 4 is the voltage Vca or Vc of the smoothing capacitor 5a or 5b.
It becomes equal to b.

よって、キャパシタンス素子4の電流1incの流れ初
めは電源電圧VSの半サイクルの前方へずれる。−刃型
i1i!電圧Vr、と平滑コンデンサ5a又は5bの電
圧Vca又はVcbとの差もキャパシタンス素子4の電
圧Vcも共に大きくなるので、電流1ineが流れなく
なる時期は殆どずれない。結局キャパシタンス素子4に
流れる電流1ineの導通期間は電源電圧Vsの半サイ
クルの前方に広がることになる。またインダクタンス素
子4に流れる電流電流1in1.も大きくなる。従って
電源電圧Vsが平滑コンデンサ5a又は5bの電圧Ve
a又はVcbより低くなってから、インダクタンス索子
2に誘導起電力が発生して電流!1nLA’流れ続ける
期間が長くなる。
Therefore, the beginning of the current 1 inc flowing through the capacitance element 4 is shifted forward by half a cycle of the power supply voltage VS. -Blade type i1i! Since both the difference between the voltage Vr and the voltage Vca or Vcb of the smoothing capacitor 5a or 5b and the voltage Vc of the capacitance element 4 become large, the timing at which the current 1ine stops flowing hardly deviates. As a result, the conduction period of the current 1ine flowing through the capacitance element 4 extends in front of a half cycle of the power supply voltage Vs. Further, the current flowing through the inductance element 4 is 1in1. also becomes larger. Therefore, the power supply voltage Vs is the voltage Ve of the smoothing capacitor 5a or 5b.
After becoming lower than a or Vcb, an induced electromotive force is generated in the inductance cord 2, and the current! The period during which 1nLA' continues to flow becomes longer.

一方全波整流のときに比べて平滑コンデンサ5a。On the other hand, compared to the case of full-wave rectification, the smoothing capacitor 5a.

5bの電圧Vca=Vcbは僅かに下がるだけなので、
上昇時の電源電圧Vsと平滑コンデンサ5a又は5bの
電圧Vat又はVcbとが等しくなる時期は殆ど変わら
ない、即ちインダクタンス素子2の電流1inlの流れ
始める時期は殆ど変わらない。結局インダクタンス索子
2に流れる電流1in1.の導通期間は電源電圧V S
の半サイクルの後方へ広がる。よって入力電流!inの
休止期間t0が短くなるので、高入力力率で且つ、入力
端子1inの歪みが小となる。
Since the voltage Vca=Vcb of 5b only decreases slightly,
The time when the power supply voltage Vs at the time of rising becomes equal to the voltage Vat or Vcb of the smoothing capacitor 5a or 5b hardly changes, that is, the time when the current 1 inl starts flowing through the inductance element 2 hardly changes. In the end, the current flowing through the inductance cable 2 is 1in1. The conduction period of is the power supply voltage VS
spreads backwards for half a cycle. Therefore, the input current! Since the idle period t0 of 1in is shortened, the input power factor is high and the distortion of the input terminal 1in is small.

以上の本発明ではトランスを使用せずにインダクタンス
値の小さなインダクタンス索子2とキャパシタンス素子
4で低い交流電aiの電圧Vsから交流入力の零−ビー
ク値より高−二直流出力電圧を得られ、しかも高入力力
率で、入力電流歪みが小さい電源!ir!iが実現でき
る。
In the present invention as described above, it is possible to obtain a DC output voltage higher than the zero-peak value of the AC input from the low voltage Vs of the AC voltage ai by using the inductance cable 2 and the capacitance element 4, which have small inductance values, without using a transformer. Power supply with high input power factor and low input current distortion! ir! i can be realized.

尚本実施例の負荷7は一方式のインバータ装置からなり
、このインバータWtr!1は発振器COでトランジス
タQ1を高周波でスイッチングさせて放電灯1aの両端
に高周波電圧を発生させ、高周波点灯させる公知の回路
である。
It should be noted that the load 7 in this embodiment consists of a one-sided inverter device, and this inverter Wtr! Reference numeral 1 designates a known circuit that uses an oscillator CO to switch a transistor Q1 at high frequency to generate a high frequency voltage across both ends of the discharge lamp 1a, thereby causing high frequency lighting.

又第3図に示すようにキャパシタンス素子4に直列にイ
ンダクタンス索子9を加えて容量性リアクタンスを構成
してもよい。この場合キャパシタンス素子4に流れる電
流1 incの波形は第4図(e)のように滑らかにな
って、結果tJS4図(b)のように入力端子l in
eの波形も滑らかになり、正弦波形に近付くので、入力
端子1inの歪みは更に小さくなる。第3図回路で用い
ている負荷7は所謂ハーフブリッジ式インバータ装置が
ちなり、このインバータ装置では発振器CO,,CO2
で交互にトランジスタQ、、Q、をスイッチングさせて
、インダクタンス索子L l 、コンデンサC3、放電
灯laとコンデンサC1の並列回路に振動電流を流して
放電灯laを高周波点灯させるようになっている。
Alternatively, as shown in FIG. 3, an inductance wire 9 may be added in series to the capacitance element 4 to form a capacitive reactance. In this case, the waveform of the current 1 inc flowing through the capacitance element 4 becomes smooth as shown in FIG.
The waveform of e also becomes smooth and approaches a sine waveform, so the distortion at the input terminal 1 inch becomes even smaller. The load 7 used in the circuit of Fig. 3 tends to be a so-called half-bridge inverter device, and in this inverter device, the oscillators CO, , CO2
The transistors Q, , Q are alternately switched to cause an oscillating current to flow through the parallel circuit of the inductance L l , the capacitor C3, the discharge lamp la, and the capacitor C1, thereby lighting the discharge lamp la at high frequency. .

fjS4図(a)は交流電源1の電圧Vs、同図(L、
)はインダクタンス素子2の電流1inLをそれぞれ示
す。
fjS4 Figure (a) shows the voltage Vs of the AC power supply 1, the figure (L,
) respectively indicate a current of 1 inL of the inductance element 2.

[発明の効果1 本発明は誘導性リアクタンスの一端を交流電源に接続す
るとともに順方向に接続したmiのダイオードと第2の
ダイオードとの直列回路の中間接続点に上記誘導性リア
クタンスの他端を接続し、上記第1、第2のダイオード
の直列回路の両端に平滑コンデンサを2fi直列接続し
、上記2個の平滑コンデンサの中間接続点に交流電源の
他端を接続して第1の倍電圧整流回路を形成し、上記2
個の平滑コンデンサの直列回路の両端に順方向に接続し
た第3のダイオードと第4のダイオードの直列回路を接
続し、上記第3、第4のダイオードの中間#に貌点に容
量性リアクタンスの一端を接続し、該容量性リアクタン
スの他端を上記誘導性リアクタンスと交流電源との接続
点に接続してtj&2の倍電圧整流回路を形成しである
から、トランスを用いて交流電源電圧を上昇させること
なく、またインダクタンス値の大きなインダクタンス素
子を用いることなく低い交流電源電圧をその零−ピーク
値上り^い直流出力電圧に変換することができ、しかも
入力電流の休止期間を短くすることができ、入力力率が
^く且っ入力電流歪みが小さ(なるものであって、しか
も使用するインダクタンス索子が大型にならないから製
作コストも安価となる上に装置も大型にならないという
効果を奏する。
[Effect of the invention 1] The present invention connects one end of the inductive reactance to an AC power source, and connects the other end of the inductive reactance to the intermediate connection point of the series circuit of the diode mi and the second diode connected in the forward direction. A smoothing capacitor is connected in series to both ends of the series circuit of the first and second diodes, and the other end of the AC power source is connected to the intermediate connection point of the two smoothing capacitors to obtain the first voltage doubler. Form a rectifier circuit and perform the above 2
A series circuit of a third diode and a fourth diode connected in the forward direction is connected to both ends of a series circuit of smoothing capacitors, and a capacitive reactance is placed between the third and fourth diodes. One end of the capacitive reactance is connected, and the other end of the capacitive reactance is connected to the connection point between the inductive reactance and the AC power source to form a voltage doubler rectifier circuit of tj & 2. Therefore, the AC power voltage can be increased using a transformer. It is possible to convert a low AC power supply voltage into a DC output voltage whose zero-to-peak value rises without using an inductance element with a large inductance value, and to shorten the rest period of the input current. Since the input power factor is high and the input current distortion is small, and the inductance cord used does not become large, the production cost is low and the device does not become large.

【図面の簡単な説明】[Brief explanation of the drawing]

m1図は本発明の実施例の回路図、第2図は同上の動作
説明用波形図、第3図は本発明の実施例2の回路図、第
4図は同上の動作説明用波形図、第5図は従来例の基本
となる回路図、第6図は従来例の回路図、第7図は第5
図回路の動作説明用波形図である。 1・・・交流電源、2・・・インダクタンス素子、4・
・・キャパシタンス素子、5a、5b・・・平滑コンデ
ンサD1〜D、・・・ダイオードである。 代理人 弁理士 石 1)長 七 第3図 第4図 第5図 第6図
Fig. m1 is a circuit diagram of the embodiment of the present invention, Fig. 2 is a waveform diagram for explaining the operation of the same as above, Fig. 3 is a circuit diagram of the second embodiment of the present invention, Fig. 4 is a waveform diagram for explaining the operation of the same as above, Figure 5 is the basic circuit diagram of the conventional example, Figure 6 is the circuit diagram of the conventional example, and Figure 7 is the basic circuit diagram of the conventional example.
FIG. 3 is a waveform diagram for explaining the operation of the circuit shown in FIG. 1... AC power supply, 2... inductance element, 4...
. . . Capacitance elements, 5a, 5b . . . Smoothing capacitors D1 to D, . . . Diodes. Agent Patent Attorney Ishi 1) Chief 7 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】[Claims] (1)誘導性リアクタンスの一端を交流電源に接続する
とともに順方向に接続した第1のダイオードと第2のダ
イオードとの直列回路の中間接続点に上記誘導性リアク
タンスの他端を接続し、上記第1、第2のダイオードの
直列回路の両端に平滑コンデンサを2個直列接続し、上
記2個の平滑コンデンサの中間接続点に交流電源の他端
を接続して第1の倍電圧整流回路を形成し、上記2個の
平滑コンデンサの直列回路の両端に順方向に接続した第
3のダイオードと第4のダイオードの直列回路を接続し
、上記第3、第4のダイオードの中間接続点に容量性リ
アクタンスの一端を接続し、該容量性リアクタンスの他
端を上記誘導性リアクタンスと交流電源との接続点に接
続して第2の倍電圧整流回路を形成して成ることを特徴
とする電源装置。
(1) One end of the inductive reactance is connected to an AC power source, and the other end of the inductive reactance is connected to an intermediate connection point of a series circuit of a first diode and a second diode connected in the forward direction, and Two smoothing capacitors are connected in series to both ends of the series circuit of the first and second diodes, and the other end of the AC power source is connected to the intermediate connection point of the two smoothing capacitors to form a first voltage doubler rectifier circuit. A series circuit of a third diode and a fourth diode connected in the forward direction is connected to both ends of the series circuit of the two smoothing capacitors, and a capacitor is connected to the intermediate connection point of the third and fourth diodes. A power supply device characterized in that one end of the capacitive reactance is connected to the connection point of the inductive reactance and the AC power source to form a second voltage doubler rectifier circuit. .
JP62260056A 1987-10-15 1987-10-15 Power supply Expired - Lifetime JP2619423B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62260056A JP2619423B2 (en) 1987-10-15 1987-10-15 Power supply

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62260056A JP2619423B2 (en) 1987-10-15 1987-10-15 Power supply

Publications (2)

Publication Number Publication Date
JPH01103165A true JPH01103165A (en) 1989-04-20
JP2619423B2 JP2619423B2 (en) 1997-06-11

Family

ID=17342691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62260056A Expired - Lifetime JP2619423B2 (en) 1987-10-15 1987-10-15 Power supply

Country Status (1)

Country Link
JP (1) JP2619423B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1396937A2 (en) * 2002-09-04 2004-03-10 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Circuit for operating a driving circuit with improved power supply

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0197171A (en) * 1987-10-08 1989-04-14 Nichicon Corp Rectifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0197171A (en) * 1987-10-08 1989-04-14 Nichicon Corp Rectifier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1396937A2 (en) * 2002-09-04 2004-03-10 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Circuit for operating a driving circuit with improved power supply
EP1396937A3 (en) * 2002-09-04 2006-11-02 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Circuit for operating a driving circuit with improved power supply

Also Published As

Publication number Publication date
JP2619423B2 (en) 1997-06-11

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