JP7456654B2 - 基板を処理する方法 - Google Patents
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- JP7456654B2 JP7456654B2 JP2022142765A JP2022142765A JP7456654B2 JP 7456654 B2 JP7456654 B2 JP 7456654B2 JP 2022142765 A JP2022142765 A JP 2022142765A JP 2022142765 A JP2022142765 A JP 2022142765A JP 7456654 B2 JP7456654 B2 JP 7456654B2
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- 229910052451 lead zirconate titanate Inorganic materials 0.000 description 2
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 description 2
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- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
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- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
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- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
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- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Laminated Bodies (AREA)
- Chemical & Material Sciences (AREA)
- Dicing (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Organic Chemistry (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Description
以上説明した第1実施形態~第3の実施形態に係る方法では、基板の表面4すなわちウエハ2に保護フィルム16を加えて付ける。しかしながら、本発明の他の実施形態では、保護フィルムを基板の裏面に加えて付けることができる。
Claims (9)
- 一面(4)と、前記一面(4)の反対側にある面(14)とを有する基板(2)の処理方法であって、
表の面(18)と、前記表の面(18)の反対側の裏の面(20)とを有する保護フィルム(16)を準備するステップと、
前記保護フィルム(16)の前記表の面(18)の少なくとも中央領域に水溶性材料(22)の被覆を加えるステップ、および/または、前記基板(2)の前記一面(4)の少なくとも中央領域に水溶性材料(22)の被覆を加えるステップと、
前記保護フィルム(16)に前記被覆を加えるステップ、および/または、前記基板(2)に前記被覆を加えるステップの後、前記基板(2)の前記一面(4)に前記保護フィルム(16)を加えるステップであって、前記保護フィルム(16)の前記表の面(18)が前記基板(2)の前記一面(4)に面し、前記保護フィルム(16)の前記表の面(18)の少なくとも中央領域と前記基板(2)の前記一面(4)との間に接着材が存在しないように前記保護フィルム(16)を加える、ステップと、
前記基板(2)の前記一面(4)に前記保護フィルム(16)を加える間および/または加えた後に、前記保護フィルム(16)に外部刺激を加え、前記保護フィルム(16)を前記基板(2)の前記一面(4)に付けるステップと、
前記基板(2)の前記一面(4)および/または前記基板(2)の前記一面(4)の反対側にある前記基板(2)の前記面(14)を処理するステップと、
を含む、方法。 - 一面(4)と、前記一面(4)の反対側にある面(14)とを有する基板(2)を処理する方法であって、
表の面(18)と、前記表の面(18)とは反対側の裏の面(20)とを有する保護フィルム(16)を準備するステップであって、前記保護フィルム(16)は、前記保護フィルム(16)の前記表の面(18)の少なくとも中央領域に水溶性材料(22)の被覆が加えられる、ステップと、
前記基板(2)の前記一面(4)に前記保護フィルム(16)を加えるステップであって、前記保護フィルム(16)の前記表の面(18)が前記基板(2)の前記一面(4)に面し、前記保護フィルム(16)の前記表の面(18)の少なくとも中央領域と前記基板(2)の前記一面(4)との間に接着材が存在しないように前記保護フィルム(16)が加えられる、ステップと、
前記基板(2)の前記一面(4)に前記保護フィルム(16)を加える間および/または加えた後に、前記保護フィルム(16)に外部刺激を加えて、前記保護フィルム(16)を前記基板(2)の前記一面(4)に付けるステップと、
前記基板(2)の前記一面(4)および/または前記基板(2)の前記一面(4)の反対側にある前記面(14)を処理するステップと、
を含む、方法。 - 前記保護フィルム(16)および/または前記基板(2)に加えられる被覆は、0.5~5μmの範囲の厚さを有する、請求項1又は2に記載の方法。
- 前記基板(2)の前記一面(4)および/または前記一面(4)の反対側にある前記基板(2)の面(14)を処理した後に、前記基板(2)から前記保護フィルム(16)を除去するステップを更に含む、請求項3に記載の方法。
- 前記基板(2)から前記保護フィルム(16)を除去した後、前記基板(2)の一面(4)を水で洗浄するステップを更に含む、請求項4に記載の方法。
- 請求項5に記載の方法であって、
前記保護フィルム(16)には接着層(24)が準備され、
前記接着層(24)は、前記保護フィルム(16)の前記表の面(18)の周辺領域のみに設けられ、前記周辺領域は、前記保護フィルム(16)の前記表の面(18)の前記中央領域を囲み、
前記基板(2)の前記一面(4)に前記保護フィルム(16)を加え、前記接着層(24)を前記基板(2)の前記一面(4)の周縁部分のみに接触させる、方法。 - 前記保護フィルム(16)に外部刺激を加えるステップは、前記保護フィルム(16)を加熱する工程および/または前記保護フィルム(16)を冷却する工程および/または前記保護フィルム(16)に圧力を加える工程および/または前記保護フィルム(16)に光もしくは紫外線を照射する工程を含む、請求項6に記載の方法。
- 前記保護フィルム(16)は、高分子で作られる、請求項7に記載の方法。
- 前記高分子は、ポリオレフィンである、請求項8に記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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DE102021209979.3A DE102021209979A1 (de) | 2021-09-09 | 2021-09-09 | Verfahren zur bearbeitung eines substrats |
DE102021209979.3 | 2021-09-09 |
Publications (2)
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JP2023039933A JP2023039933A (ja) | 2023-03-22 |
JP7456654B2 true JP7456654B2 (ja) | 2024-03-27 |
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Country Status (6)
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US (1) | US20230072652A1 (ja) |
JP (1) | JP7456654B2 (ja) |
KR (1) | KR20230037468A (ja) |
CN (1) | CN115775725A (ja) |
DE (1) | DE102021209979A1 (ja) |
TW (1) | TWI822316B (ja) |
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US20170062278A1 (en) | 2015-08-31 | 2017-03-02 | Disco Corporation | Method of processing wafer |
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US20180247870A1 (en) | 2015-08-31 | 2018-08-30 | Karl Heinz Priewasser | Method of processing wafer and protective sheeting for use in this method |
JP2021027336A (ja) | 2019-08-01 | 2021-02-22 | 株式会社ディスコ | 基板の処理法 |
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JP6385131B2 (ja) * | 2014-05-13 | 2018-09-05 | 株式会社ディスコ | ウェーハの加工方法 |
DE102018200656A1 (de) | 2018-01-16 | 2019-07-18 | Disco Corporation | Verfahren zum Bearbeiten eines Wafers |
DE102018202254A1 (de) * | 2018-02-14 | 2019-08-14 | Disco Corporation | Verfahren zum Bearbeiten eines Wafers |
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2021
- 2021-09-09 DE DE102021209979.3A patent/DE102021209979A1/de active Pending
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2022
- 2022-08-15 US US17/819,672 patent/US20230072652A1/en active Pending
- 2022-09-07 TW TW111133924A patent/TWI822316B/zh active
- 2022-09-07 KR KR1020220113643A patent/KR20230037468A/ko unknown
- 2022-09-08 JP JP2022142765A patent/JP7456654B2/ja active Active
- 2022-09-09 CN CN202211103835.0A patent/CN115775725A/zh active Pending
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US20180247870A1 (en) | 2015-08-31 | 2018-08-30 | Karl Heinz Priewasser | Method of processing wafer and protective sheeting for use in this method |
JP2018526826A (ja) | 2015-08-31 | 2018-09-13 | プリーヴァッサー, カール ハインツPRIEWASSER, Karl Heinz | ウェーハを処理する方法および該方法で使用するための保護シート |
JP2017059766A (ja) | 2015-09-18 | 2017-03-23 | 株式会社ディスコ | ウエーハの加工方法 |
JP2021027336A (ja) | 2019-08-01 | 2021-02-22 | 株式会社ディスコ | 基板の処理法 |
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JP2023039933A (ja) | 2023-03-22 |
TWI822316B (zh) | 2023-11-11 |
CN115775725A (zh) | 2023-03-10 |
DE102021209979A1 (de) | 2023-03-09 |
US20230072652A1 (en) | 2023-03-09 |
TW202314882A (zh) | 2023-04-01 |
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