JP7396118B2 - 半導体モジュール - Google Patents
半導体モジュール Download PDFInfo
- Publication number
- JP7396118B2 JP7396118B2 JP2020032630A JP2020032630A JP7396118B2 JP 7396118 B2 JP7396118 B2 JP 7396118B2 JP 2020032630 A JP2020032630 A JP 2020032630A JP 2020032630 A JP2020032630 A JP 2020032630A JP 7396118 B2 JP7396118 B2 JP 7396118B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- semiconductor module
- semiconductor element
- connection
- wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims description 150
- 229920005989 resin Polymers 0.000 claims description 33
- 239000011347 resin Substances 0.000 claims description 33
- 238000007789 sealing Methods 0.000 claims description 29
- 239000000758 substrate Substances 0.000 claims description 25
- 239000000463 material Substances 0.000 claims description 22
- 238000012986 modification Methods 0.000 description 30
- 230000004048 modification Effects 0.000 description 30
- 238000010586 diagram Methods 0.000 description 21
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- 229910000679 solder Inorganic materials 0.000 description 8
- 230000008646 thermal stress Effects 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910000881 Cu alloy Inorganic materials 0.000 description 2
- 229910000640 Fe alloy Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 229910010293 ceramic material Inorganic materials 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 230000035882 stress Effects 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Description
回路板26は、並列接続された2つの半導体素子30の間に配置されてよい。一方の半導体素子30のエミッタパッド30aは、他方の半導体素子30のエミッタパッド30aに対し、回路板26を挟んで反対側に配置されてよい。ボンディングワイヤW1において、両端がそれぞれ2つのエミッタパッド30aに接続され、両端の間の一部が接続部26aに接続される。2つのエミッタパッド30aは回路板26により中継され制御用電極60aに電気的に接続される。
回路板28は、並列接続された2つの半導体素子30の間に配置されてよい。一方の半導体素子30のゲートパッド30bは、他方の半導体素子30のゲートパッド30bに対し、回路板28を挟んで反対側に配置されてよい。ボンディングワイヤW3において、両端がそれぞれ2つのゲートパッド30bに接続され、両端の間の一部が接続部28aに接続される。2つのゲートパッド30bは回路板28により中継され制御用電極60bに電気的に接続される。制御用基板60はケース部材12の一つの辺に沿って設けられてよい。制御用電極60a、60bはそれぞれ、ケース部材12の一つの辺に沿い、かつZ軸の正方向に延出するよう設けられたピン端子と接続されてよい。
2 :積層基板
10 :ベース板
12 :ケース部材
13 :接続端子
14 :接続端子
14P :接続端子
16 :封止樹脂
20 :絶縁層
21 :金属板
22 :回路板(第1の回路板)
24 :回路板(第2の回路板)
26 :回路板(第3の回路板)
26a :第1接続部
26b :第2接続部
28 :回路板(第3の回路板)
28a :第1接続部
28b :第2接続部
30 :半導体素子
30a :エミッタパッド
30b :ゲートパッド
40 :接合材
42 :接合材
44 :接合材
50 :接続部材
52 :連結部
52a :基端部(第2の端部)
54 :先端部(第1の端部)
54a :下面
54b :上面
54c :角部
56 :ヒートスプレッダ(スペーサ)
58 :導電板
60 :制御用基板
60a :制御用電極(第1の電極)
60b :制御用電極(第1の電極)
W1 :ボンディングワイヤ
W2 :ボンディングワイヤ
W3 :ボンディングワイヤ
W4 :ボンディングワイヤ
t :厚み
Claims (15)
- 電気的に互いに絶縁された、第1、第2及び第3の回路板が形成された基板と、
上面電極及び下面電極を有し、前記第1の回路板の上面に配置された半導体素子と、
接合材を介して前記上面電極を前記第2の回路板に電気的に接続する接続部材と、
前記第3の回路板を第1の電極に電気的に接続するワイヤと、
前記基板、前記半導体素子、前記接続部材及び前記ワイヤを覆う封止樹脂と、
を備え、
前記ワイヤは、前記第3の回路板から前記第1の電極に向けて、前記接続部材の上面よりも低い位置で前記半導体素子を横切るように配線される、半導体モジュール。 - 前記接続部材は、第1の端部の下面が前記上面電極上に前記接合材を介して接合され、
前記ワイヤは、前記第1の端部の上面よりも低い位置で前記半導体素子を横切るように配線される、請求項1に記載の半導体モジュール。 - 前記接続部材は、前記第1の端部の下面から前記第1の端部の上面までの厚みが2mm以上8mm以下である、請求項2に記載の半導体モジュール。
- 前記第1の端部は、上方からみたときの平面視形状が矩形状となっており、平面視における短手方向の長さが5mm以上20mm以下である、請求項2又は請求項3に記載の半導体モジュール。
- 前記第1の端部は、上方からみたときの平面視形状が矩形状となっており、前記矩形状のエッジとなる部分がR面取りされた形状となっている、請求項2から請求項4のいずれかに記載の半導体モジュール。
- 前記接続部材は、前記第1の端部と、前記第2の回路板と電気的に接続される第2の端部と、前記第1の端部の上部から前記第2の回路板に向けて延び、前記第1の端部と前記第2の端部とを連結する連結部と、が一体に形成された部材である、請求項2から請求項5のいずれかに記載の半導体モジュール。
- 前記接続部材は、前記第1の端部をなす部材と、一端が、前記第1の端部をなす部材の上面に電気的及び機械的に接合され、前記第1の端部をなす部材の上面から前記第2の回路板に向けて延び、他端が、前記第2の回路板と電気的に接続される導電板と、を有する、請求項2から請求項6のいずれかに記載の半導体モジュール。
- 前記接続部材は、板状部材であり、前記第1の端部の厚みが前記接続部材の他の部分の厚みよりも厚い、請求項2から請求項7のいずれかに記載の半導体モジュール。
- 前記ワイヤは、線径が100μm以上500μm以下である、請求項1から請求項8のいずれかに記載の半導体モジュール。
- 前記ワイヤは、全長が5mm以上40mm以下である、請求項1から請求項9のいずれかに記載の半導体モジュール。
- 前記半導体素子は、RC(Reverse Conducting)-IGBT(Insulated Gate Bipolar Transistor)である、請求項1から請求項10のいずれかに記載の半導体モジュール。
- 外部配線と電気的に接続される接続端子を更に備え、
前記半導体素子は、前記接続部材及び前記第2の回路板を介して前記接続端子と電気的に接続される、請求項1から請求項11のいずれかに記載の半導体モジュール。 - 前記第3の回路板に形成された第1接続部と前記半導体素子とを接続する配線部材を更に備え、
前記第1接続部は、前記半導体素子のゲートパッド、エミッタパッド又はソースパッドと接続される、請求項1から請求項12のいずれかに記載の半導体モジュール。 - 前記第1接続部と電気的に接続された第2接続部が前記第3の回路板に形成され、
前記ワイヤは、一端が前記第1の電極に接続され、他端が前記第2接続部に接続され、
前記第1の電極と前記第2接続部は、前記半導体素子を挟んで対向する位置に配置される、請求項13に記載の半導体モジュール。 - 前記基板、前記半導体素子、前記接続部材及び前記ワイヤが内部に設置されたケース部材を更に備え、
前記封止樹脂は、前記ケース部材によって規定された空間であって、前記基板、前記半導体素子、前記接続部材及び前記ワイヤが設置された空間内に充填される、請求項1から請求項14のいずれかに記載の半導体モジュール。
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JP2000156439A (ja) | 1998-11-20 | 2000-06-06 | Mitsubishi Electric Corp | パワー半導体モジュール |
JP2003188336A (ja) | 2001-12-18 | 2003-07-04 | Sansha Electric Mfg Co Ltd | サーミスタ内蔵電力用半導体モジュール |
WO2004032223A1 (ja) | 2002-09-30 | 2004-04-15 | Renesas Technology Corp. | 半導体装置 |
JP2007109880A (ja) | 2005-10-13 | 2007-04-26 | Fuji Electric Holdings Co Ltd | 半導体装置 |
JP2007220704A (ja) | 2006-02-14 | 2007-08-30 | Mitsubishi Electric Corp | 半導体装置 |
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WO2016174899A1 (ja) | 2015-04-27 | 2016-11-03 | 富士電機株式会社 | 半導体装置 |
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JPS60170957A (ja) | 1984-02-16 | 1985-09-04 | Toshiba Corp | 半導体装置用リ−ドフレ−ム |
JP2007258628A (ja) | 2006-03-27 | 2007-10-04 | Hitachi Ltd | パワー半導体装置 |
JP4765853B2 (ja) | 2006-09-08 | 2011-09-07 | 富士電機株式会社 | 半導体装置の製造方法 |
WO2011115081A1 (ja) | 2010-03-16 | 2011-09-22 | 富士電機システムズ株式会社 | 半導体装置 |
JP5733401B2 (ja) * | 2011-08-10 | 2015-06-10 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2016029676A (ja) | 2012-12-19 | 2016-03-03 | 富士電機株式会社 | 半導体装置 |
US11270929B2 (en) * | 2018-01-05 | 2022-03-08 | Mitsubishi Electric Corporation | Semiconductor device |
JP7098953B2 (ja) | 2018-02-20 | 2022-07-12 | 三菱電機株式会社 | 半導体装置 |
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JP2000156439A (ja) | 1998-11-20 | 2000-06-06 | Mitsubishi Electric Corp | パワー半導体モジュール |
JP2003188336A (ja) | 2001-12-18 | 2003-07-04 | Sansha Electric Mfg Co Ltd | サーミスタ内蔵電力用半導体モジュール |
WO2004032223A1 (ja) | 2002-09-30 | 2004-04-15 | Renesas Technology Corp. | 半導体装置 |
JP2007109880A (ja) | 2005-10-13 | 2007-04-26 | Fuji Electric Holdings Co Ltd | 半導体装置 |
JP2007220704A (ja) | 2006-02-14 | 2007-08-30 | Mitsubishi Electric Corp | 半導体装置 |
US20140361419A1 (en) | 2013-06-10 | 2014-12-11 | Yan Xun Xue | Power control device and preparation method thereof |
WO2016174899A1 (ja) | 2015-04-27 | 2016-11-03 | 富士電機株式会社 | 半導体装置 |
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