JP7360007B2 - Manufacturing method of light emitting device - Google Patents

Manufacturing method of light emitting device Download PDF

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JP7360007B2
JP7360007B2 JP2019036614A JP2019036614A JP7360007B2 JP 7360007 B2 JP7360007 B2 JP 7360007B2 JP 2019036614 A JP2019036614 A JP 2019036614A JP 2019036614 A JP2019036614 A JP 2019036614A JP 7360007 B2 JP7360007 B2 JP 7360007B2
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semiconductor layer
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政樹 米澤
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Nichia Corp
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Description

本発明は、発光装置の製造方法に関する。 The present invention relates to a method for manufacturing a light emitting device.

近年、白色ＬＥＤ等の発光ダイオードは高輝度化が進み、一般照明や車載用途等の光源として広く用いられている。そして、用途が拡大されるにつれさらなる高輝度化が求められている。特許文献１には、単位面積当たりの発光効率を高めるために複数の発光ダイオードチップを縦に重ねた発光装置が開示されている。 In recent years, light emitting diodes such as white LEDs have become increasingly bright and are widely used as light sources for general lighting, vehicle-mounted applications, and the like. As the applications expand, even higher brightness is required. Patent Document 1 discloses a light emitting device in which a plurality of light emitting diode chips are stacked vertically to increase luminous efficiency per unit area.

特開２０１０－４１０５７号公報Japanese Patent Application Publication No. 2010-41057

しかしながら、特許文献１に開示された発光装置は、発光ダイオードチップごとに正又は負の一方の電極を設けているために、発光ダイオードチップごとに一方の電極を形成する領域を確保する必要があり、単位面積当たりにおける活性層の形成範囲が小さくなるという課題がある。 However, in the light emitting device disclosed in Patent Document 1, each light emitting diode chip is provided with either a positive or negative electrode, so it is necessary to secure an area for forming one electrode for each light emitting diode chip. However, there is a problem that the formation range of the active layer per unit area becomes smaller.

また、複数の発光ダイオードを重ねる発光装置において、発光ダイオード間の接合部分における光吸収を抑制し、発光装置の光取り出し効率を向上させる必要がある。 Furthermore, in a light emitting device in which a plurality of light emitting diodes are stacked, it is necessary to suppress light absorption at the junction between the light emitting diodes and improve the light extraction efficiency of the light emitting device.

そこで、本発明は、複数の発光部が重ねられた発光装置において、単位面積当たりにおける活性層の形成範囲を大きくしつつ、光取り出し効率が向上された発光装置の製造方法を提供することを課題とする。 SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a light emitting device in which a plurality of light emitting parts are stacked, in which the formation range of the active layer per unit area is increased and the light extraction efficiency is improved. shall be.

以上の課題を解決するために、本発明に係る一実施形態の発光装置の製造方法は、第１基板と、前記第１基板上に、第１導電型の第１半導体層と、第１活性層と、前記第１導電型とは異なる第２導電型の第２半導体層と、を前記第１基板側から順に含む第１ウエハを準備する第１ウエハ準備工程と、第２基板と、前記第２基板上に、前記第２導電型の第４半導体層と、第２活性層と、前記第１導電型の第３半導体層と、を前記第２基板側から順に含む第２ウエハを準備する第２ウエハ準備工程と、前記第１ウエハの表面に露出した前記第２半導体層上に、前記第２半導体層と電気的に接続された透光性を有する第１導電性酸化膜と、前記第１導電性酸化膜上に設けられた第１導電性部材と、を形成する第１形成工程と、前記第２ウエハの前記第３半導体層上に、前記第３半導体層と電気的に接続された透光性を有する第２導電性酸化膜と、前記第２導電性酸化膜上に設けられた第２導電性部材と、を形成する第２形成工程と、前記第１ウエハ及び前記第２ウエハを、前記第１導電性部材と前記第２導電性部材とを熱圧着させることにより接合する接合工程と、前記接合工程の後、前記第２ウエハの前記第２基板を除去し、前記第４半導体層を露出させる露出工程と、を備え、前記接合工程後の前記第１導電性部材及び前記第２導電性部材の前記第１活性層からの光の波長に対する透過率は、前記第１形成工程及び前記第２形成工程における前記第１導電性部材及び前記第２導電性部材の前記第１活性層からの光の波長に対する透過率よりも高い。 In order to solve the above problems, a method for manufacturing a light emitting device according to an embodiment of the present invention includes a first substrate, a first semiconductor layer of a first conductivity type, and a first active layer on the first substrate. and a second semiconductor layer of a second conductivity type different from the first conductivity type, in order from the first substrate side; a second substrate; A second wafer is prepared on a second substrate, including the fourth semiconductor layer of the second conductivity type, the second active layer, and the third semiconductor layer of the first conductivity type in this order from the second substrate side. a second wafer preparation step, and a first conductive oxide film having a light-transmitting property and electrically connected to the second semiconductor layer on the second semiconductor layer exposed on the surface of the first wafer; a first forming step of forming a first conductive member provided on the first conductive oxide film; and a first forming step of forming a first conductive member provided on the third semiconductor layer of the second wafer; a second forming step of forming a connected second conductive oxide film having light-transmitting properties and a second conductive member provided on the second conductive oxide film; a joining step of joining a second wafer by thermocompression bonding the first conductive member and the second conductive member; and after the joining step, removing the second substrate of the second wafer; an exposing step of exposing the fourth semiconductor layer, and the transmittance of the first conductive member and the second conductive member after the bonding step with respect to the wavelength of light from the first active layer is as follows: The transmittance of the first conductive member and the second conductive member in the first forming step and the second forming step is higher than that of the first conductive member with respect to the wavelength of light from the first active layer.

以上のように構成された本発明の一実施形態に係る発光装置の製造方法によれば、複数の発光部が重ねられた発光装置において、単位面積当たりにおける活性層の形成範囲を大きくしつつ、光取り出し効率が向上された発光装置を容易に製造することができる。 According to the method for manufacturing a light emitting device according to an embodiment of the present invention configured as described above, in a light emitting device in which a plurality of light emitting parts are stacked, the formation range of the active layer per unit area is increased, A light emitting device with improved light extraction efficiency can be easily manufactured.

本発明の一実施形態に係る発光装置の構成を示す模式的断面図である。1 is a schematic cross-sectional view showing the configuration of a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention. 本発明の一実施形態に係る発光装置の製造方法を説明するための模式的断面図である。1 is a schematic cross-sectional view for explaining a method of manufacturing a light emitting device according to an embodiment of the present invention.

以下、図面を参照しながら実施形態の発光装置とその製造方法について説明する。 Hereinafter, a light emitting device according to an embodiment and a method for manufacturing the same will be described with reference to the drawings.

図１は、本発明の一実施形態の発光装置の構成を示す断面図である。
本実施形態の発光装置は、図１に示すように、基板７上に、第１発光部１と、第１発光部１の上方に設けられた第２発光部２とが形成されている。第１発光部１は、第１導電型の第１半導体層１１と、第１活性層１２と、第１導電型とは異なる第２導電型の第２半導体層１３と、を基板７側から順に含んでいる。第２発光部２は、第１導電型の第３半導体層２１と、第２活性層２２と、第２導電型の第４半導体層２３と、を第１発光部１側から順に含んでいる。第１発光部１と第２発光部２との間には、第１導電性酸化膜４ａ、第２導電性酸化膜４ｂ、及び導電性部材５が設けられている。第１発光部１からの光は、第１導電性酸化膜４ａ、第２導電性酸化膜４ｂ、及び導電性部材５を介して第２発光部２の第４半導体層２３側から出射される。 FIG. 1 is a sectional view showing the configuration of a light emitting device according to an embodiment of the present invention.
In the light emitting device of this embodiment, as shown in FIG. 1, a first light emitting section 1 and a second light emitting section 2 provided above the first light emitting section 1 are formed on a substrate 7. The first light emitting section 1 includes a first semiconductor layer 11 of a first conductivity type, a first active layer 12, and a second semiconductor layer 13 of a second conductivity type different from the first conductivity type from the substrate 7 side. Contains in order. The second light emitting section 2 includes a third semiconductor layer 21 of the first conductivity type, a second active layer 22, and a fourth semiconductor layer 23 of the second conductivity type in order from the first light emitting section 1 side. . A first conductive oxide film 4a, a second conductive oxide film 4b, and a conductive member 5 are provided between the first light emitting part 1 and the second light emitting part 2. Light from the first light emitting section 1 is emitted from the fourth semiconductor layer 23 side of the second light emitting section 2 via the first conductive oxide film 4a, the second conductive oxide film 4b, and the conductive member 5. .

実施形態の発光装置において、第１発光部１は基板７上に金属層６により接合されており、第１発光部１と金属層６の間には、第１発光部１の第１半導体層１１に接続された第２電極３２が設けられている。これにより、例えば、基板７として導電性を有する基板７を用いることによって、本実施形態の発光装置は基板７を介して第１発光部１に給電することが可能になる。本実施形態の発光装置において、図１に示すように、第２発光部２の第４半導体層２３の上面には、第１電極３１が設けられている。また、上述したように、第１発光部１と第２発光部２の間に第１導電性酸化膜４ａ、第２導電性酸化膜４ｂ、及び導電性部材５が設けられ、第１発光部１と第２発光部２が電気的に接続されている。以上のように、第１電極３１と第２電極３２間に直列に第１発光部１と第２発光部２が接続され、第１電極３１と第２電極３２間に電圧を印加することにより第１発光部１及び第２発光部２を発光させることができる。 In the light emitting device of the embodiment, the first light emitting section 1 is joined to the substrate 7 by a metal layer 6, and between the first light emitting section 1 and the metal layer 6, the first semiconductor layer of the first light emitting section 1 is connected. A second electrode 32 connected to 11 is provided. Thus, for example, by using the conductive substrate 7 as the substrate 7, the light emitting device of this embodiment can supply power to the first light emitting section 1 via the substrate 7. In the light emitting device of this embodiment, as shown in FIG. 1, a first electrode 31 is provided on the upper surface of the fourth semiconductor layer 23 of the second light emitting section 2. Further, as described above, the first conductive oxide film 4a, the second conductive oxide film 4b, and the conductive member 5 are provided between the first light emitting part 1 and the second light emitting part 2, and the first light emitting part 1 and the second light emitting section 2 are electrically connected. As described above, the first light emitting section 1 and the second light emitting section 2 are connected in series between the first electrode 31 and the second electrode 32, and by applying a voltage between the first electrode 31 and the second electrode 32, The first light emitting section 1 and the second light emitting section 2 can be caused to emit light.

以下、実施形態の発光装置の製造方法について説明する。 Hereinafter, a method for manufacturing a light emitting device according to an embodiment will be described.

＜第１ウエハ準備工程＞
第１ウエハ準備工程では、例えば、Ｓｉからなる第３基板７３を準備する。そして、図２に示すように、第３基板７３上に、第２導電型の第２半導体層１３と、第１活性層１２と、第１導電型の第１半導体層１１と、を第３基板７３側から順に形成する。なお、第３基板７３上にバッファ層を介して第２半導体層１３を形成するようにしてもよい。半導体層は、例えば、有機金属気相成長法（ＭＯＣＶＤ）、ハイドライド気相成長法（ＨＶＰＥ）、分子線エピタキシャル成長法（ＭＢＥ）等の公知の技術により形成することができる。第３基板７３としては、第１発光部１を構成するそれぞれの半導体層を積層させることができる基板を用いることができ、例えば、Ｓｉ基板、サファイア基板、ガリウムヒ素基板、ＧａＮ基板等を用いることができる。本実施形態においては、第３基板７３にＳｉ基板を用いることが特に好ましく、これにより、後記する工程において、第３基板７３を除去しやすくなる。Ｓｉ基板は、比較的加工が容易でウェットエッチング等により除去することが可能であるため、レーザリフトオフにより第３基板７３を除去する場合に比較して、半導体層からなる半導体積層体へのダメージを軽減できる。 <First wafer preparation process>
In the first wafer preparation step, for example, a third substrate 73 made of Si is prepared. Then, as shown in FIG. 2, the second semiconductor layer 13 of the second conductivity type, the first active layer 12, and the first semiconductor layer 11 of the first conductivity type are formed on the third substrate 73. They are formed in order from the substrate 73 side. Note that the second semiconductor layer 13 may be formed on the third substrate 73 with a buffer layer interposed therebetween. The semiconductor layer can be formed, for example, by a known technique such as metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), or molecular beam epitaxial growth (MBE). As the third substrate 73, a substrate on which the respective semiconductor layers constituting the first light emitting section 1 can be stacked can be used, and for example, a Si substrate, a sapphire substrate, a gallium arsenide substrate, a GaN substrate, etc. can be used. I can do it. In this embodiment, it is particularly preferable to use a Si substrate as the third substrate 73, which makes it easier to remove the third substrate 73 in a step to be described later. Since the Si substrate is relatively easy to process and can be removed by wet etching, etc., damage to the semiconductor stack made of semiconductor layers can be reduced compared to the case where the third substrate 73 is removed by laser lift-off. It can be reduced.

次に、図３に示すように、第１半導体層１１上に、所定のパターンの第２電極３２を形成する。第２電極３２は、例えばフォトレジストを用いたリフトオフ法により形成する。例えば、第１半導体層１１上の第２電極３２を形成しない部分にフォトレジストを形成し、そのフォトレジストをマスクにして第１半導体層１１上及びそのフォトレジスト上に金属膜を形成する。そして、フォトレジスト上に形成された金属膜とともにフォトレジストを除去することにより第２電極３２を形成することができる。 Next, as shown in FIG. 3, a second electrode 32 in a predetermined pattern is formed on the first semiconductor layer 11. The second electrode 32 is formed, for example, by a lift-off method using photoresist. For example, a photoresist is formed on a portion of the first semiconductor layer 11 where the second electrode 32 is not formed, and a metal film is formed on the first semiconductor layer 11 and the photoresist using the photoresist as a mask. Then, the second electrode 32 can be formed by removing the photoresist together with the metal film formed on the photoresist.

次に、図３に示すように、第２電極３２を形成しない部分に絶縁膜３５を形成する。絶縁膜３５は、例えば、第１半導体層１１上及び第２電極３２上にフォトレジストを形成し、そのフォトレジストをマスクにして絶縁膜を形成する。そして、フォトレジストを第２電極３２上に形成された絶縁膜とともに除去する。これにより、第２電極３２が形成されていない部分に絶縁膜３５を形成することができる。絶縁膜３５は、例えば、後記する図１３に示すように、切断位置ＣＬ上に設けられる。このように絶縁膜３５を配置することで、絶縁膜３５により第２電極３２が発光装置の側面から露出しない構成とすることができる。その結果、発光装置の側面における短絡の発生が抑制され、信頼性を向上させることができる。 Next, as shown in FIG. 3, an insulating film 35 is formed in a portion where the second electrode 32 is not formed. For example, the insulating film 35 is formed by forming a photoresist on the first semiconductor layer 11 and the second electrode 32, and using the photoresist as a mask. Then, the photoresist is removed together with the insulating film formed on the second electrode 32. Thereby, the insulating film 35 can be formed in the portion where the second electrode 32 is not formed. The insulating film 35 is provided on the cutting position CL, for example, as shown in FIG. 13, which will be described later. By arranging the insulating film 35 in this manner, it is possible to create a structure in which the second electrode 32 is not exposed from the side surface of the light emitting device due to the insulating film 35. As a result, the occurrence of short circuits on the side surfaces of the light emitting device is suppressed, and reliability can be improved.

次に、図４に示すように、第１半導体層１１上に形成された第２電極３２及び絶縁膜３５上に、金属層６を形成する。別途、一方の面に金属層６が形成された第１基板７１を準備する。そして、図５及び図６に示すように、その金属層６同士を接合することで、第１半導体層１１上に第２電極３２と絶縁膜３５とを介して第１基板７１を接合する。ここで、第１基板７１は、図１における基板７に相当する。第３基板７３上に、第２導電型の第２半導体層１３と、第１活性層１２と、第１導電型の第１半導体層１１とが設けられた構造体に第１基板７１を金属層６により接合した後、図７に示すように、第３基板７３を除去する。第３基板７３の除去は、例えば、第３基板７３と第２半導体層１３との界面付近にレーザ光を照射し、第３基板７３と第２半導体層１３とを分離するレーザリフトオフにより行う。または、第３基板７３をエッチングできる溶液を用いてウェットエッチングを行うことにより第３基板７３の除去を行う。 Next, as shown in FIG. 4, a metal layer 6 is formed on the second electrode 32 and the insulating film 35 formed on the first semiconductor layer 11. Separately, a first substrate 71 having a metal layer 6 formed on one surface is prepared. Then, as shown in FIGS. 5 and 6, the first substrate 71 is bonded onto the first semiconductor layer 11 via the second electrode 32 and the insulating film 35 by bonding the metal layers 6 together. Here, the first substrate 71 corresponds to the substrate 7 in FIG. The first substrate 71 is attached to a structure in which the second semiconductor layer 13 of the second conductivity type, the first active layer 12, and the first semiconductor layer 11 of the first conductivity type are provided on the third substrate 73. After bonding with layer 6, third substrate 73 is removed, as shown in FIG. The removal of the third substrate 73 is performed, for example, by laser lift-off, which irradiates the vicinity of the interface between the third substrate 73 and the second semiconductor layer 13 with laser light to separate the third substrate 73 and the second semiconductor layer 13. Alternatively, the third substrate 73 is removed by performing wet etching using a solution that can etch the third substrate 73.

以上のようにして、第３基板７３上に形成した半導体積層構造を、第１基板７１上に金属層６と第２電極３２及び絶縁膜３５とを介して転写する。これらの工程により、図７に示す、第１基板７１上に、第１半導体層１１と、第１活性層１２と、第２半導体層１３と、が第１基板７１側から順に形成された第１発光部１を備えた第１ウエハ１００を準備する。すなわち、第１ウエハ１００において、第１基板７１上には、金属層６と第２電極３２及び絶縁膜３５とを介して第１半導体層１１、第１活性層１２、第２半導体層１３とが順に積層されている。第１ウエハ１００において、第２半導体層１３は第１ウエハ１００の表面に露出している。第２電極３２は、第１基板７１と第１半導体層１１との間に位置し、第１基板７１と第１半導体層１１とを電気的に接続する。ここで、第１基板７１は、シリコン基板であることが好ましく、第１基板７１をシリコン基板とすることで、後記する切断工程において、第１基板７１を容易に分割することができる。 The semiconductor stacked structure formed on the third substrate 73 as described above is transferred onto the first substrate 71 via the metal layer 6, the second electrode 32, and the insulating film 35. Through these steps, the first semiconductor layer 11, the first active layer 12, and the second semiconductor layer 13 are sequentially formed on the first substrate 71 from the first substrate 71 side, as shown in FIG. A first wafer 100 having one light emitting section 1 is prepared. That is, in the first wafer 100, the first semiconductor layer 11, the first active layer 12, and the second semiconductor layer 13 are formed on the first substrate 71 via the metal layer 6, the second electrode 32, and the insulating film 35. are stacked in order. In the first wafer 100, the second semiconductor layer 13 is exposed on the surface of the first wafer 100. The second electrode 32 is located between the first substrate 71 and the first semiconductor layer 11 and electrically connects the first substrate 71 and the first semiconductor layer 11. Here, the first substrate 71 is preferably a silicon substrate, and by making the first substrate 71 a silicon substrate, the first substrate 71 can be easily divided in a cutting process to be described later.

＜第２ウエハ準備工程＞
第２ウエハ準備工程では、例えば、Ｓｉからなる第２基板７２を準備する。そして、図８に示すように、第２基板７２上に、第２導電型の第４半導体層２３と、第２活性層２２と、第１導電型の第３半導体層２１と、を第２基板７２側から順に形成する。なお、第２基板７２上にバッファ層を介して第４半導体層２３を形成するようにしてもよい。このようにして、第２基板７２上に、第４半導体層２３と、第２活性層２２と、第３半導体層２１と、が第２基板７２側から順に形成された第２発光部２を備えた第２ウエハ２００を準備する。 <Second wafer preparation process>
In the second wafer preparation step, a second substrate 72 made of Si, for example, is prepared. Then, as shown in FIG. 8, a fourth semiconductor layer 23 of the second conductivity type, a second active layer 22, and a third semiconductor layer 21 of the first conductivity type are formed on the second substrate 72. They are formed in order from the substrate 72 side. Note that the fourth semiconductor layer 23 may be formed on the second substrate 72 with a buffer layer interposed therebetween. In this way, the second light emitting section 2 is formed, in which the fourth semiconductor layer 23, the second active layer 22, and the third semiconductor layer 21 are sequentially formed on the second substrate 72 from the second substrate 72 side. A second wafer 200 is prepared.

＜第１形成工程＞
第１形成工程では、第１ウエハ１００の表面に露出した第２半導体層１３上に、第２半導体層１３と電気的に接続された第１導電性酸化膜４ａを形成する。さらに、第１導電性酸化膜４ａ上に第１導電性部材５ａを形成する。図９に示すように、第２半導体層１３上には、第１導電性酸化膜４ａと第１導電性部材５ａとが積層される。第１導電性酸化膜４ａ及び第１導電性部材５ａは、例えば、スパッタリング法、蒸着法等の公知の技術により形成することができる。 <First formation step>
In the first formation step, a first conductive oxide film 4 a electrically connected to the second semiconductor layer 13 is formed on the second semiconductor layer 13 exposed on the surface of the first wafer 100 . Furthermore, a first conductive member 5a is formed on the first conductive oxide film 4a. As shown in FIG. 9, on the second semiconductor layer 13, a first conductive oxide film 4a and a first conductive member 5a are laminated. The first conductive oxide film 4a and the first conductive member 5a can be formed by, for example, a known technique such as a sputtering method or a vapor deposition method.

第１形成工程において、第１導電性酸化膜４ａを形成する前に、第２半導体層１３の表面に凹凸構造を形成する粗面化工程を行うことが好ましい。これにより、作製後の発光装置の光取り出し効率を向上させることができる。特に、この凹凸構造があることにより第１発光部１から第２発光部に向かう光を散乱し、第２発光部２の第４半導体層２３側から取り出しやすくすることができる。第２半導体層１３の表面の粗面化は、例えば、ウェットエッチングにより行う。この粗面化工程により第２半導体層１３の表面に凹凸構造を形成した後、その第２半導体層１３の表面に第１導電性酸化膜４ａを形成した場合、第１導電性酸化膜４ａの表面にも第２半導体層１３の表面の凹凸構造に沿った凹凸構造が形成される。凹凸構造が形成された第１導電性酸化膜４ａ上に第１導電性部材５ａを形成する場合、第１導電性部材５ａの膜厚を、第１導電性酸化膜４ａの凹凸構造が覆われる程度、つまり第１導電性酸化膜４ａの凸部よりも厚く形成することが好ましい。これにより、後記する接合工程において、第１導電性部材５ａによる接合が第１導電性酸化膜４ａの凹凸構造により阻害されるおそれを低減することできる。凹凸構造は、例えば、１μｍ以上２μｍ以下の高さを有する複数の凸部を有する。 In the first formation step, it is preferable to perform a surface roughening step of forming an uneven structure on the surface of the second semiconductor layer 13 before forming the first conductive oxide film 4a. Thereby, the light extraction efficiency of the manufactured light emitting device can be improved. In particular, this uneven structure scatters light traveling from the first light emitting section 1 to the second light emitting section, making it easier to take out the light from the fourth semiconductor layer 23 side of the second light emitting section 2. The surface of the second semiconductor layer 13 is roughened, for example, by wet etching. When the first conductive oxide film 4a is formed on the surface of the second semiconductor layer 13 after forming an uneven structure on the surface of the second semiconductor layer 13 by this roughening process, the first conductive oxide film 4a is An uneven structure along the uneven structure of the surface of the second semiconductor layer 13 is also formed on the surface. When forming the first conductive member 5a on the first conductive oxide film 4a on which the uneven structure is formed, the thickness of the first conductive member 5a is set such that the uneven structure of the first conductive oxide film 4a is covered. It is preferable to form the first conductive oxide film 4a thicker than the convex portion of the first conductive oxide film 4a. Thereby, in the bonding process to be described later, it is possible to reduce the possibility that bonding by the first conductive member 5a will be inhibited by the uneven structure of the first conductive oxide film 4a. The uneven structure has, for example, a plurality of protrusions having a height of 1 μm or more and 2 μm or less.

第１導電性部材５ａとしては、インジウム、亜鉛、錫、インジウム錫等の金属を用いることができる。第１導電性部材５ａは、複数の金属層が積層された多層構造とすることもできる。例えば、第１導電性酸化膜４ａ側から順に、インジウム層と錫層とを積層した多層構造とすることができる。これにより、後記する接合工程において、第１ウエハ１００と第２ウエハ２００との接合を安定して行うことができる。第１導電性部材５ａを上記した多層構造とする場合、それぞれの層の膜厚を０．１ｎｍ以上５ｎｍ以下とすることができる。例えば、第１導電性部材５ａを第１導電性酸化膜４ａ側から順に、インジウム層と錫層とを積層した多層構造とする場合には、インジウム層の膜厚を０．８ｎｍ程度、錫層の膜厚を０．４ｎｍ程度にすることができる。 As the first conductive member 5a, metals such as indium, zinc, tin, indium tin, etc. can be used. The first conductive member 5a can also have a multilayer structure in which a plurality of metal layers are laminated. For example, it may have a multilayer structure in which an indium layer and a tin layer are laminated in order from the first conductive oxide film 4a side. Thereby, the first wafer 100 and the second wafer 200 can be stably bonded in the bonding process described later. When the first conductive member 5a has the multilayer structure described above, the thickness of each layer can be 0.1 nm or more and 5 nm or less. For example, when the first conductive member 5a has a multilayer structure in which an indium layer and a tin layer are laminated in order from the first conductive oxide film 4a side, the thickness of the indium layer is about 0.8 nm, and the thickness of the tin layer is about 0.8 nm. The film thickness can be made approximately 0.4 nm.

第１導電性部材５ａの膜厚は、例えば、１ｎｍ以上１０ｎｍ以下で形成することが好ましい。第１導電性部材５ａの膜厚を１ｎｍ以上とすることで、後記する接合工程において、第１導電性部材５ａを十分に酸化させ透過率を向上させやすい。第１導電性部材５ａの膜厚を１０ｎｍ以下とすることで、後記する接合工程後における第１導電性部材５ａによる光吸収を抑制し、光取り出し効率を向上させることができる。 The thickness of the first conductive member 5a is preferably, for example, 1 nm or more and 10 nm or less. By setting the film thickness of the first conductive member 5a to 1 nm or more, it is easy to sufficiently oxidize the first conductive member 5a and improve the transmittance in the bonding process described later. By setting the film thickness of the first conductive member 5a to 10 nm or less, light absorption by the first conductive member 5a after the bonding process described later can be suppressed, and light extraction efficiency can be improved.

＜第２形成工程＞
第２形成工程では、第２ウエハ２００の第３半導体層２１上に、第３半導体層２１と電気的に接続された第２導電性酸化膜４ｂを形成する。さらに、第２導電性酸化膜４ｂ上に第２導電性部材５ｂを形成する。図１０に示すように、第３半導体層２１上には、第２導電性酸化膜４ｂと第２導電性部材５ｂとが積層される。第２導電性酸化膜４ｂ及び第２導電性部材５ｂは、例えば、スパッタリング法、蒸着法等の公知の技術により形成することができる。 <Second formation step>
In the second formation step, a second conductive oxide film 4b electrically connected to the third semiconductor layer 21 is formed on the third semiconductor layer 21 of the second wafer 200. Further, a second conductive member 5b is formed on the second conductive oxide film 4b. As shown in FIG. 10, on the third semiconductor layer 21, a second conductive oxide film 4b and a second conductive member 5b are laminated. The second conductive oxide film 4b and the second conductive member 5b can be formed by, for example, a known technique such as a sputtering method or a vapor deposition method.

第２形成工程において、第２導電性酸化膜４ｂを形成する前に、第３半導体層２１の表面に凹凸構造を形成する第２粗面化工程を行うことが好ましい。これにより、作製後の発光装置の光取り出し効率を向上させることができる。特に、凹凸構造があることにより第１発光部１から第２発光部２に向かう光を散乱し、第２発光部２の第４半導体層２３側から取り出しやすくすることができる。第３半導体層２１の表面の粗面化は、例えば、ウェットエッチングにより行う。第２粗面化工程により第３半導体層２１の表面に凹凸構造を形成した後、その第３半導体層２１の表面に第２導電性酸化膜４ｂを形成した場合、第２導電性酸化膜４ｂの表面にも第３半導体層２１の表面の凹凸構造に沿った凹凸構造が形成される。凹凸構造が形成された第２導電性酸化膜４ｂ上に第２導電性部材５ｂを形成する場合、第２導電性部材５ｂの膜厚を、第２導電性酸化膜４ｂの凹凸構造が覆われる程度、つまり第２導電性酸化膜４ｂの凸部よりも厚くすることが好ましい。これにより、後記する接合工程において、第２導電性部材５ｂによる接合が第２導電性酸化膜４ｂの凹凸構造により阻害されるおそれを低減することできる。凹凸構造は、例えば、１μｍ以上２μｍ以下の高さを有する複数の凸部を有する。 In the second formation step, it is preferable to perform a second roughening step of forming an uneven structure on the surface of the third semiconductor layer 21 before forming the second conductive oxide film 4b. Thereby, the light extraction efficiency of the manufactured light emitting device can be improved. In particular, the uneven structure scatters light traveling from the first light emitting section 1 to the second light emitting section 2, making it easier to take out the light from the fourth semiconductor layer 23 side of the second light emitting section 2. The surface of the third semiconductor layer 21 is roughened, for example, by wet etching. When the second conductive oxide film 4b is formed on the surface of the third semiconductor layer 21 after forming the uneven structure on the surface of the third semiconductor layer 21 by the second roughening step, the second conductive oxide film 4b An uneven structure along the uneven structure on the surface of the third semiconductor layer 21 is also formed on the surface of the third semiconductor layer 21 . When forming the second conductive member 5b on the second conductive oxide film 4b on which the uneven structure is formed, the thickness of the second conductive member 5b is set such that the uneven structure of the second conductive oxide film 4b is covered. In other words, it is preferable to make it thicker than the convex portion of the second conductive oxide film 4b. Thereby, in the bonding process to be described later, it is possible to reduce the possibility that bonding by the second conductive member 5b will be inhibited by the uneven structure of the second conductive oxide film 4b. The uneven structure has, for example, a plurality of protrusions having a height of 1 μm or more and 2 μm or less.

第２導電性部材５ｂとしては、前記した第１導電性部材５ａと同様の金属を用いることができる。また第１導電性部材５ａと同様に、第２導電性部材５ｂは、複数の金属層が積層された多層構造とすることもできる。例えば、第２導電性酸化膜４ｂ側から順に、インジウム層と錫層とを積層した多層構造とすることができる。これにより、後記する接合工程において、第１ウエハ１００と第２ウエハ２００との接合を安定して行うことができる。第２導電性部材５ｂを上記した多層構造とする場合、それぞれの層の膜厚を０．１ｎｍ以上５ｎｍ以下とすることができる。例えば、第２導電性部材５ｂを第１導電性酸化膜４ａ側から順に、インジウム層と錫層とを積層した多層構造とする場合には、インジウム層の膜厚を０．８ｎｍ程度、錫層の膜厚を０．４ｎｍ程度にすることができる。 As the second conductive member 5b, the same metal as the first conductive member 5a described above can be used. Further, like the first conductive member 5a, the second conductive member 5b can also have a multilayer structure in which a plurality of metal layers are laminated. For example, a multilayer structure may be formed in which an indium layer and a tin layer are laminated in order from the second conductive oxide film 4b side. Thereby, the first wafer 100 and the second wafer 200 can be stably bonded in the bonding process described later. When the second conductive member 5b has the multilayer structure described above, the thickness of each layer can be 0.1 nm or more and 5 nm or less. For example, when the second conductive member 5b has a multilayer structure in which an indium layer and a tin layer are laminated in order from the first conductive oxide film 4a side, the thickness of the indium layer is about 0.8 nm, and the thickness of the tin layer is about 0.8 nm. The film thickness can be made approximately 0.4 nm.

第２導電性部材５ｂの膜厚は、例えば、１ｎｍ以上１０ｎｍ以下で形成することが好ましい。第２導電性部材５ｂの膜厚を１ｎｍ以上とすることで、後記する接合工程において第２導電性部材５ｂを十分に酸化させ透過率を向上させやすい。第２導電性部材５ｂの膜厚を１０ｎｍ以下とすることで、第２導電性部材５ｂによる光吸収を抑制し、光取り出し効率を向上させることができる。 The thickness of the second conductive member 5b is preferably, for example, greater than or equal to 1 nm and less than or equal to 10 nm. By setting the film thickness of the second conductive member 5b to 1 nm or more, it is easy to sufficiently oxidize the second conductive member 5b and improve the transmittance in the bonding process described later. By setting the film thickness of the second conductive member 5b to 10 nm or less, light absorption by the second conductive member 5b can be suppressed and light extraction efficiency can be improved.

＜接合工程＞
図１１に示すように、接合工程では、第１導電性酸化膜４ａ上に設けた第１導電性部材５ａと第２導電性酸化膜４ｂ上に設けた第２導電性部材５ｂとを熱圧着により接合する。これにより、第１ウエハ１００と第２ウエハ２００とを接合する。図１２に示すように、第１基板７１上に、第１発光部１と第２発光部２とが設けられる。接合工程における熱圧着は、例えば、温度を２５０℃以上５５０℃以下とした真空中で、６０分以上９０分以下の間、圧力をかけることにより行う。 <Joining process>
As shown in FIG. 11, in the bonding step, the first conductive member 5a provided on the first conductive oxide film 4a and the second conductive member 5b provided on the second conductive oxide film 4b are bonded by thermocompression. Join by. Thereby, the first wafer 100 and the second wafer 200 are bonded. As shown in FIG. 12, a first light emitting section 1 and a second light emitting section 2 are provided on a first substrate 71. The thermocompression bonding in the bonding step is performed, for example, by applying pressure in a vacuum at a temperature of 250° C. or more and 550° C. or less for 60 minutes or more and 90 minutes or less.

接合工程後の第１導電性部材５ａ及び第２導電性部材５ｂの第１活性層１２からの光の波長に対する透過率は、上記した第１形成工程及び第２形成工程における第１導電性部材５ａ及び第２導電性部材５ｂの第１活性層１２からの光の波長に対する透過率よりも高くなっている。つまり、第１導電性部材５ａ及び第２導電性部材５ｂは、接合工程を行うことで第１活性層１２からの光の波長に対する透過率が接合工程前に比べて高くなる。これは、第１導電性部材５ａ及び第２導電性部材５ｂを構成する金属膜の一部が熱圧着を行うことにより酸化し、金属酸化膜に変化していることによるものであると推測される。例えば、第１導電性部材５ａ及び第２導電性部材５ｂをインジウム層と錫層とを積層した多層構造で形成した後、接合工程を行うことにより、接合工程後の第１導電性部材５ａ及び第２導電性部材５ｂの一部は酸化インジウム錫（ＩＴＯ）を含む部材に変化する。 The transmittance for the wavelength of light from the first active layer 12 of the first conductive member 5a and the second conductive member 5b after the bonding process is the same as that of the first conductive member in the first forming process and the second forming process described above. It is higher than the transmittance of the wavelength of light from the first active layer 12 of the first active layer 5a and the second conductive member 5b. That is, by performing the bonding process, the first conductive member 5a and the second conductive member 5b have higher transmittance for the wavelength of light from the first active layer 12 than before the bonding process. It is presumed that this is because a part of the metal film constituting the first conductive member 5a and the second conductive member 5b is oxidized by thermocompression bonding and changed into a metal oxide film. Ru. For example, by forming the first conductive member 5a and the second conductive member 5b with a multilayer structure in which an indium layer and a tin layer are laminated, and then performing a bonding process, the first conductive member 5a and the second conductive member 5b after the bonding process are A part of the second conductive member 5b changes to a member containing indium tin oxide (ITO).

また、本実施形態において、第１導電性部材５ａ及び第２導電性部材５ｂは、第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂにそれぞれ接した状態で接合工程が行われる。そのため、第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂに含まれる酸素を第１導電性部材５ａ及び第２導電性部材５ｂに供給し、第１導電性部材５ａ及び第２導電性部材５ｂを構成する金属膜の酸化をより促進させることができる。したがって、本実施形態によれば、接合工程後の第１導電性部材５ａ及び第２導電性部材５ｂの酸化を促進させ、第１活性層１２からの光の波長に対する透過率を効率良く高くすることができる。 Further, in this embodiment, the bonding process is performed with the first conductive member 5a and the second conductive member 5b in contact with the first conductive oxide film 4a and the second conductive oxide film 4b, respectively. Therefore, oxygen contained in the first conductive oxide film 4a and the second conductive oxide film 4b is supplied to the first conductive member 5a and the second conductive member 5b, and Oxidation of the metal film constituting the member 5b can be further promoted. Therefore, according to the present embodiment, the oxidation of the first conductive member 5a and the second conductive member 5b after the bonding process is promoted, and the transmittance for the wavelength of light from the first active layer 12 is efficiently increased. be able to.

第１導電性部材５ａ及び第２導電性部材５ｂを、上記したインジウム層と錫層とを積層した多層構造として接合工程を行う場合、第１導電性部材５ａ及び第２導電性部材５ｂそれぞれの錫層が接触した状態で熱圧着が行われる。このため、接合工程において、第１導電性部材５ａ及び第２導電性部材５ｂそれぞれの錫層同士による接合が安定して行われる。その結果、第１ウエハ１００と第２ウエハ２００を安定して接合しつつ、第１導電性部材５ａ及び第２導電性部材５ｂの第１活性層１２からの光の波長に対する透過率を接合工程の前よりも高くすることができる。 When the first conductive member 5a and the second conductive member 5b are formed into a multilayer structure in which the above-described indium layer and tin layer are laminated, the joining process is performed, the first conductive member 5a and the second conductive member 5b are Thermocompression bonding is performed with the tin layers in contact. Therefore, in the bonding step, the tin layers of the first conductive member 5a and the second conductive member 5b are stably bonded to each other. As a result, while stably bonding the first wafer 100 and the second wafer 200, the transmittance of the first conductive member 5a and the second conductive member 5b with respect to the wavelength of light from the first active layer 12 can be adjusted during the bonding process. can be higher than before.

＜露出工程＞
接合工程の後、図１１に示す、第２ウエハ２００の第２基板７２を除去し、図１２に示すように、第４半導体層２３を露出させる。第２基板７２の除去は、上記した第３基板７３の除去方法と同様にレーザリフトオフ、あるいはウェットエッチングにより行うことができる。第２基板７２にシリコン基板を用いることにより、第２基板７２の除去を上記した第３基板７３の除去と同様に行いやすくなる。 <Exposure process>
After the bonding process, the second substrate 72 of the second wafer 200 shown in FIG. 11 is removed, and the fourth semiconductor layer 23 is exposed as shown in FIG. 12. The second substrate 72 can be removed by laser lift-off or wet etching, similar to the method for removing the third substrate 73 described above. By using a silicon substrate for the second substrate 72, the second substrate 72 can be easily removed in the same manner as the third substrate 73 described above.

＜第１電極形成工程＞
図１３に示すように、第１電極３１形成工程では、第２発光部２の第４半導体層２３上に、所定のパターンの第１電極３１を形成する。例えば、第１電極３１を、第４半導体層２３の上面の後記する切断位置ＣＬを避けた位置に形成する。第１電極３１は、例えばフォトレジストを用いたリフトオフ法により形成する。例えば、第４半導体層２３上の第１電極３１を形成しない部分にフォトレジストを形成し、そのフォトレジストをマスクにして第４半導体層２３上及びそのフォトレジスト上に金属膜を形成する。そして、フォトレジスト上に形成された金属膜とともにフォトレジストを除去することにより第１電極３１を形成することができる。 <First electrode formation process>
As shown in FIG. 13, in the first electrode 31 forming step, the first electrode 31 in a predetermined pattern is formed on the fourth semiconductor layer 23 of the second light emitting section 2. As shown in FIG. For example, the first electrode 31 is formed on the upper surface of the fourth semiconductor layer 23 at a position avoiding a cutting position CL, which will be described later. The first electrode 31 is formed, for example, by a lift-off method using photoresist. For example, a photoresist is formed on a portion of the fourth semiconductor layer 23 where the first electrode 31 is not formed, and a metal film is formed on the fourth semiconductor layer 23 and the photoresist using the photoresist as a mask. The first electrode 31 can then be formed by removing the photoresist together with the metal film formed on the photoresist.

＜分割工程＞
最後に、第１電極３１が形成されたウエハを、所望の大きさの個々の発光装置に分割する。この分割は、ダイシングにより行われ、例えば図１３に示す切断位置ＣＬに沿って行う。 <Dividing process>
Finally, the wafer on which the first electrode 31 is formed is divided into individual light emitting devices of a desired size. This division is performed by dicing, for example along the cutting position CL shown in FIG. 13.

以上の実施形態の発光装置の製造方法によれば、第１導電性部材５ａ及び第２導電性部材５ｂを用いた接合工程により、接合部における活性層からの光の波長に対する透過率を向上させつつ、第１ウエハ１００と第２ウエハ２００とを接合することができる。したがって、第１発光部１と第２発光部２とを有し、光取り出し効率が向上された発光装置を容易に製造することができる。また、第１発光部１と第２発光部２を含む構造体の上下に第１電極３１及び第２電極３２を形成することが可能になる。その結果、発光装置の上面視における単位面積当たりの第１活性層１２及び第２活性層２２の形成範囲を大きくでき、発光面積を大きくとれる発光装置を容易に製造することができる。 According to the method for manufacturing a light emitting device of the above embodiment, the transmittance of the wavelength of light from the active layer at the bonding portion is improved by the bonding process using the first conductive member 5a and the second conductive member 5b. At the same time, the first wafer 100 and the second wafer 200 can be bonded. Therefore, it is possible to easily manufacture a light emitting device that includes the first light emitting section 1 and the second light emitting section 2 and has improved light extraction efficiency. Moreover, it becomes possible to form the first electrode 31 and the second electrode 32 above and below the structure including the first light emitting part 1 and the second light emitting part 2. As a result, the formation range of the first active layer 12 and the second active layer 22 per unit area in the top view of the light emitting device can be increased, and a light emitting device with a large light emitting area can be easily manufactured.

次に、実施形態の発光装置の各構成部材について説明する。 Next, each component of the light emitting device of the embodiment will be explained.

＜基板７＞
基板７としては、Ｓｉ、ＣｕＷ、Ｍｏ等からなる基板を用いることができる。基板７にシリコンからなる基板を用いる場合には、電気抵抗が小さいことが好ましい。例えば、Ｓｉからなる基板にホウ素等をドープすることで低抵抗化してもよい。また、基板７にシリコンからなる基板を用いることで、後述する切断工程において、ウエハを容易に割断することが可能となり生産性を向上させることができる。 <Substrate 7>
As the substrate 7, a substrate made of Si, CuW, Mo, etc. can be used. When using a substrate made of silicon as the substrate 7, it is preferable that the electrical resistance is low. For example, the resistance may be lowered by doping a substrate made of Si with boron or the like. Further, by using a silicon substrate as the substrate 7, the wafer can be easily cut in the cutting process described later, and productivity can be improved.

＜第１発光部１、第２発光部２＞
第１発光部１は、基板７側から順に、第１導電型の第１半導体層１１と、第１活性層１２と、第１導電型とは異なる第２導電型の第２半導体層１３と、を含む。第２発光部２は、第１発光部１と同様に、第１発光部側から順に、第１導電型の第３半導体層２１と、第２活性層２２と、第２導電型の第４半導体層２３と、を含む。ここで、第１導電型とは、ｎ型及びｐ型の一方の導電型のことをいい、第２導電型とは、他方の導電型のことをいう。本実施形態においては、第１導電型をｐ型とし、第２導電型をｎ型としている。 <First light emitting section 1, second light emitting section 2>
The first light emitting section 1 includes, in order from the substrate 7 side, a first semiconductor layer 11 of a first conductivity type, a first active layer 12, and a second semiconductor layer 13 of a second conductivity type different from the first conductivity type. ,including. Like the first light emitting part 1, the second light emitting part 2 includes, in order from the first light emitting part side, a third semiconductor layer 21 of the first conductivity type, a second active layer 22, and a fourth semiconductor layer of the second conductivity type. A semiconductor layer 23 is included. Here, the first conductivity type refers to one of the n-type and p-type conductivity type, and the second conductivity type refers to the other conductivity type. In this embodiment, the first conductivity type is p type, and the second conductivity type is n type.

第１発光部１及び第２発光部２を構成する半導体材料としては、ＩＩＩ－Ｖ族窒化物半導体（ＩｎＸＡｌＹＧａ１－Ｘ－ＹＮ（０≦Ｘ、０≦Ｙ、Ｘ＋Ｙ≦１））の積層半導体等を用いることができる。 Semiconductor materials constituting the first light emitting section 1 and the second light emitting section 2 include III -V group nitride semiconductors ( In )) can be used.

第１半導体層１１、第２半導体層１３、第３半導体層２１、及び第４半導体層２３は、それぞれ単一の層で構成されていてもよいし、複数の層を含んだ積層構造で構成されていてもよい。また、第１半導体層１１及び第３半導体層２１は、第１導電型ではない層、例えば、アンドープの半導体層を一部に含んでいてもよく、第２半導体層１３及び第４半導体層２３は、第２導電型ではない層、アンドープの半導体層を一部に含んでいてもよい。ここで、アンドープの半導体層とは、成長させるときに第１又は第２導電型の不純物を添加することなく成長させた層のことをいい、例えば、隣接する層から拡散等により混入する不可避的な不純物を含んでいてもよい。 The first semiconductor layer 11, the second semiconductor layer 13, the third semiconductor layer 21, and the fourth semiconductor layer 23 may each be composed of a single layer, or may be composed of a stacked structure including a plurality of layers. may have been done. Further, the first semiconductor layer 11 and the third semiconductor layer 21 may partially include a layer that is not of the first conductivity type, for example, an undoped semiconductor layer, and the second semiconductor layer 13 and the fourth semiconductor layer 23 may partially include a layer that is not of the second conductivity type, or an undoped semiconductor layer. Here, the undoped semiconductor layer refers to a layer that is grown without adding impurities of the first or second conductivity type during growth. It may contain impurities.

また、第１活性層１２及び第２活性層２２は、単一又は多重量子井戸構造であってもよい。また、第１活性層１２及び第２活性層２２は略同じ発光ピーク波長を有する。第１活性層１２及び第２活性層２２の発光ピーク波長はそれぞれ、例えば、４３０ｎｍ以上４８０ｎｍ以下である。 Further, the first active layer 12 and the second active layer 22 may have a single quantum well structure or a multiple quantum well structure. Further, the first active layer 12 and the second active layer 22 have substantially the same emission peak wavelength. The emission peak wavelengths of the first active layer 12 and the second active layer 22 are each, for example, 430 nm or more and 480 nm or less.

第１発光部１の第２半導体層１３の上面には、凹凸構造が形成されていることが好ましい。後述するように、この第２半導体層１３の上面とは第１透光性導電膜４ａとの界面である。この凹凸構造により、第１発光部１から第２発光部２に向かう光を取り出しやすくすることができる。第２発光部２の第３半導体層２１の下面には、凹凸構造が形成されていることが好ましい。この凹凸構造により、第１発光部１から第２発光部２に向かう光を取り出しやすくすることができる。 It is preferable that an uneven structure is formed on the upper surface of the second semiconductor layer 13 of the first light emitting section 1. As will be described later, the upper surface of the second semiconductor layer 13 is the interface with the first transparent conductive film 4a. This uneven structure allows light to be easily extracted from the first light emitting section 1 toward the second light emitting section 2. It is preferable that an uneven structure is formed on the lower surface of the third semiconductor layer 21 of the second light emitting section 2. This uneven structure allows light to be easily extracted from the first light emitting section 1 toward the second light emitting section 2.

＜第１導電性酸化膜４ａ、第２導電性酸化膜４ｂ＞
第１導電性酸化膜４ａは、第１発光部１の第２半導体層１３の上面に設けられている。第２導電性酸化膜４ｂは、第２発光部２の第３半導体層２１の下面に設けられている。第１導電性酸化膜４ａは、第１発光部１の第２半導体層１３とオーミック接触するための電極として機能する。第２導電性酸化膜４ｂは、第２発光部２の第３半導体層２１とオーミック接触するための電極として機能する。 <First conductive oxide film 4a, second conductive oxide film 4b>
The first conductive oxide film 4 a is provided on the upper surface of the second semiconductor layer 13 of the first light emitting section 1 . The second conductive oxide film 4b is provided on the lower surface of the third semiconductor layer 21 of the second light emitting section 2. The first conductive oxide film 4a functions as an electrode for making ohmic contact with the second semiconductor layer 13 of the first light emitting section 1. The second conductive oxide film 4b functions as an electrode for making ohmic contact with the third semiconductor layer 21 of the second light emitting section 2.

凹凸構造が形成された第２半導体層１３の表面に第１導電性酸化膜４ａを形成する場合には、第１導電性酸化膜４ａの表面に第２半導体層１３の凹凸構造に沿った凹凸構造が形成されていることが好ましい。同様に、凹凸構造が形成された第３半導体層２１の表面に第２導電性酸化膜４ｂを形成する場合には、第２導電性酸化膜４ｂの表面に第３半導体層２１の凹凸構造に沿った凹凸構造が形成されていることが好ましい。第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂの表面に凹凸構造が形成されていることで、第１発光部１から第２発光部２に向かう光が、第１導電性酸化膜４ａと導電性部材５との界面、または第２導電性酸化膜４ｂと導電性部材５との界面で散乱される。そのため、第１発光部１から第２発光部２に向かう光のうち第２発光部１側に反射される光を低減し発光装置の光取り出し効率を向上させることができる。凹凸構造は、例えば、１μｍ以上２μｍ以下の高さを有する複数の凸部を有する。 When forming the first conductive oxide film 4a on the surface of the second semiconductor layer 13 having an uneven structure, the surface of the first conductive oxide film 4a has an uneven structure along the uneven structure of the second semiconductor layer 13. Preferably, a structure is formed. Similarly, when forming the second conductive oxide film 4b on the surface of the third semiconductor layer 21 on which the uneven structure is formed, the uneven structure of the third semiconductor layer 21 is formed on the surface of the second conductive oxide film 4b. It is preferable that a concavo-convex structure along the surface is formed. Since the uneven structure is formed on the surfaces of the first conductive oxide film 4a and the second conductive oxide film 4b, the light directed from the first light emitting section 1 to the second light emitting section 2 can be directed to the first conductive oxide film 4b. It is scattered at the interface between 4a and conductive member 5, or at the interface between second conductive oxide film 4b and conductive member 5. Therefore, of the light traveling from the first light emitting section 1 to the second light emitting section 2, the light reflected toward the second light emitting section 1 side can be reduced, and the light extraction efficiency of the light emitting device can be improved. The uneven structure has, for example, a plurality of protrusions having a height of 1 μm or more and 2 μm or less.

第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂを構成する材料としては、第１活性層１２及び第２活性層２２からの光に対して、高い透光性及び導電性を備えるものを用いることが好ましい。第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂには、例えば、酸化インジウム錫（ＩＴＯ）、酸化インジウム亜鉛（ＩＺＯ）などの金属酸化物を用いることができる。これにより、第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂにより第１発光部１及び第２発光部２からの光が吸収されることを抑制し、発光装置の光取り出し効率を向上させることができる。 The materials constituting the first conductive oxide film 4a and the second conductive oxide film 4b have high translucency and conductivity for light from the first active layer 12 and the second active layer 22. It is preferable to use For the first conductive oxide film 4a and the second conductive oxide film 4b, metal oxides such as indium tin oxide (ITO) and indium zinc oxide (IZO) can be used, for example. This suppresses absorption of light from the first light emitting section 1 and the second light emitting section 2 by the first conductive oxide film 4a and the second conductive oxide film 4b, improving the light extraction efficiency of the light emitting device. can be done.

第１導電性酸化膜４ａの膜厚は、例えば１０ｎｍ以上１０００ｎｍ以下とすることができる。及び第２導電性酸化膜４ｂの膜厚は、例えば１０ｎｍ以上１０００ｎｍ以下とすることができる。第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂの膜厚を１０ｎｍ以上とすることで、半導体層とのオーミック接触を確保しやすくできる。第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂの膜厚を１０００ｎｍ以下とすることで、第１導電性酸化膜４ａ及び第２導電性酸化膜４ｂによる光吸収を低減させることができる。 The thickness of the first conductive oxide film 4a can be, for example, 10 nm or more and 1000 nm or less. The thickness of the second conductive oxide film 4b can be, for example, 10 nm or more and 1000 nm or less. By setting the film thickness of the first conductive oxide film 4a and the second conductive oxide film 4b to 10 nm or more, ohmic contact with the semiconductor layer can be easily ensured. By setting the thickness of the first conductive oxide film 4a and the second conductive oxide film 4b to 1000 nm or less, light absorption by the first conductive oxide film 4a and the second conductive oxide film 4b can be reduced. .

＜導電性部材５＞
導電性部材５は、第１導電性酸化膜４ａと第２導電性酸化膜４ｂとの間に設けられ、第１発光部１と第２発光部２とを電気的に接続する。導電性部材５は、第１導電性部材５ａと第２導電性部材５ｂとが接合されることで形成される。導電性部材５を構成する材料としては、インジウム、錫、及び亜鉛、またはこれらの金属を主成分とする合金や酸化物があげられる。 <Conductive member 5>
The conductive member 5 is provided between the first conductive oxide film 4a and the second conductive oxide film 4b, and electrically connects the first light emitting section 1 and the second light emitting section 2. The conductive member 5 is formed by joining a first conductive member 5a and a second conductive member 5b. Examples of materials constituting the conductive member 5 include indium, tin, and zinc, and alloys and oxides containing these metals as main components.

＜金属層６＞
金属層６としては、ＡｕＳｎ、ＮｉＳｎ、ＡｇＳｎ等を主成分とするはんだ材料、またはＡｕ及びＡｕを主成分とする合金等を用いることができる。金属層６は、金属層６を形成する部材との密着力を向上させるための金属層が含まれていることが好ましい。例えば、Ｐｔ、Ｔｉからなる金属層を密着層として含んでいることが好ましい。本実施形態において、金属層６の膜厚は、接合性や導電性を考慮して適宜変更することができる。 <Metal layer 6>
As the metal layer 6, a solder material mainly composed of AuSn, NiSn, AgSn, etc., or an alloy mainly composed of Au and Au, etc. can be used. It is preferable that the metal layer 6 includes a metal layer for improving adhesion to the member forming the metal layer 6. For example, it is preferable to include a metal layer made of Pt or Ti as an adhesion layer. In this embodiment, the thickness of the metal layer 6 can be changed as appropriate in consideration of bondability and conductivity.

＜第１電極３１＞
第１電極３１は、第２発光部２の第４半導体層２３の上面に設けられている。第１電極３１としては、Ａｕを主成分とする金属層を用いることができる。また、密着性を向上させるため、あるいは金属層同士の拡散を防止するために、Ｔｉ、Ｐｔ、Ｎｉ、Ｗ、Ｒｈ等の金属層を積層した多層構造としてもよい。第１電極３１は、例えば、第４半導体層２３の表面から、Ｔｉ層、Ｐｔ層、Ａｕ層、Ｔｉ層がこの順に積層された多層構造とすることができる。第１電極３１は、例えば、スパッタリング法、蒸着法等の公知の技術により形成することができる。 <First electrode 31>
The first electrode 31 is provided on the upper surface of the fourth semiconductor layer 23 of the second light emitting section 2 . As the first electrode 31, a metal layer containing Au as a main component can be used. Further, in order to improve adhesion or prevent diffusion between metal layers, a multilayer structure may be used in which metal layers such as Ti, Pt, Ni, W, and Rh are laminated. The first electrode 31 can have, for example, a multilayer structure in which a Ti layer, a Pt layer, an Au layer, and a Ti layer are stacked in this order from the surface of the fourth semiconductor layer 23. The first electrode 31 can be formed, for example, by a known technique such as a sputtering method or a vapor deposition method.

＜第２電極３２＞
第２電極３２は、第１発光部１の第１半導体層１１の下面に設けられている。第２電極３２としては、第１発光部１からの光の波長を反射することができる金属を含む金属層を用いることが好ましく、例えば、Ａｇ、Ａｌ等の金属、またはこれらの金属を主成分とする合金を含んでいることが好ましい。これにより、第１発光部１及び第２発光部２からの光を第２発光部２の第４半導体層２３側に反射できるため、発光装置の光取り出し効率を向上させることができる。また、密着性等を向上させるために、Ｎｉ、Ｔｉ、Ｐｔ等からなる金属層を備える多層構造としてもよい。例えば、第１半導体層１１の表面から、Ａｇ層、Ｎｉ層、Ｔｉ層、Ｐｔ層がこの順に積層された多層構造とすることができる。第２電極３２は、例えば、スパッタリング法、蒸着法等の公知の技術により形成することができる。 <Second electrode 32>
The second electrode 32 is provided on the lower surface of the first semiconductor layer 11 of the first light emitting section 1 . As the second electrode 32, it is preferable to use a metal layer containing a metal that can reflect the wavelength of light from the first light emitting part 1. For example, a metal layer such as Ag, Al, etc., or a layer containing these metals as a main component is preferably used. It is preferable that the alloy contains the following alloys. Thereby, the light from the first light emitting section 1 and the second light emitting section 2 can be reflected toward the fourth semiconductor layer 23 side of the second light emitting section 2, so that the light extraction efficiency of the light emitting device can be improved. Further, in order to improve adhesion and the like, a multilayer structure including a metal layer made of Ni, Ti, Pt, etc. may be used. For example, a multilayer structure may be formed in which an Ag layer, a Ni layer, a Ti layer, and a Pt layer are stacked in this order from the surface of the first semiconductor layer 11. The second electrode 32 can be formed, for example, by a known technique such as a sputtering method or a vapor deposition method.

１ 第１発光部
２ 第２発光部
４ 導電性酸化膜
４ａ 第１導電性酸化膜
４ｂ 第２導電性酸化膜
５ 導電性部材
５ａ 第１導電性部材
５ｂ 第２導電性部材
６ 金属層
７ 基板
７１ 第１基板
７２ 第２基板
７３ 第３基板
１１ 第１半導体層
１２ 第１活性層
１３ 第２半導体層
２１ 第３半導体層
２２ 第２活性層
２３ 第４半導体層
３１ 第１電極
３２ 第２電極
３５ 絶縁膜
１００ 第１ウエハ
２００ 第２ウエハ 1 First light emitting part 2 Second light emitting part 4 Conductive oxide film 4a First conductive oxide film 4b Second conductive oxide film 5 Conductive member 5a First conductive member 5b Second conductive member 6 Metal layer 7 Substrate 71 first substrate 72 second substrate 73 third substrate 11 first semiconductor layer 12 first active layer 13 second semiconductor layer 21 third semiconductor layer 22 second active layer 23 fourth semiconductor layer 31 first electrode 32 second electrode 35 Insulating film 100 First wafer 200 Second wafer

Claims (5)

第１基板と、前記第１基板上に、第１導電型の第１半導体層と、第１活性層と、前記第１導電型とは異なる第２導電型の第２半導体層と、を前記第１基板側から順に含む第１ウエハを準備する第１ウエハ準備工程と、
第２基板と、前記第２基板上に、前記第２導電型の第４半導体層と、第２活性層と、前記第１導電型の第３半導体層と、を前記第２基板側から順に含む第２ウエハを準備する第２ウエハ準備工程と、
前記第１ウエハの表面に露出した前記第２半導体層上に、前記第２半導体層と電気的に接続された透光性を有する第１導電性酸化膜と、前記第１導電性酸化膜上に設けられ、前記第１導電性酸化膜側から順に、インジウム層と錫層とを積層した多層構造である第１導電性部材と、を形成する第１形成工程と、
前記第２ウエハの前記第３半導体層上に、前記第３半導体層と電気的に接続された透光性を有する第２導電性酸化膜と、前記第２導電性酸化膜上に設けられ、前記第２導電性酸化膜側から順に、インジウム層と錫層とを積層した多層構造である第２導電性部材と、を形成する第２形成工程と、
前記第１ウエハ及び前記第２ウエハを、前記第１導電性部材と前記第２導電性部材とを熱圧着させることにより接合する接合工程と、
前記接合工程の後、前記第２ウエハの前記第２基板を除去し、前記第４半導体層を露出させる露出工程と、を備え、
前記接合工程後の前記第１導電性部材及び前記第２導電性部材の前記第１活性層からの光の波長に対する透過率は、前記第１形成工程及び前記第２形成工程における前記第１導電性部材及び前記第２導電性部材の前記第１活性層からの光の波長に対する透過率よりも高い発光装置の製造方法。 a first substrate, a first semiconductor layer of a first conductivity type, a first active layer, and a second semiconductor layer of a second conductivity type different from the first conductivity type on the first substrate; a first wafer preparation step of preparing first wafers including the first substrate in order from the first substrate side;
a second substrate, and on the second substrate, a fourth semiconductor layer of the second conductivity type, a second active layer, and a third semiconductor layer of the first conductivity type, in order from the second substrate side. a second wafer preparation step of preparing a second wafer containing the
a first conductive oxide film having a light-transmitting property and electrically connected to the second semiconductor layer on the second semiconductor layer exposed on the surface of the first wafer; a first conductive member having a multilayer structure in which an indium layer and a tin layer are laminated in order from the first conductive oxide film side;
a second conductive oxide film having a light-transmitting property and electrically connected to the third semiconductor layer on the third semiconductor layer of the second wafer; and a second conductive oxide film provided on the second conductive oxide film, a second forming step of forming a second conductive member having a multilayer structure in which an indium layer and a tin layer are laminated in order from the second conductive oxide film side;
a joining step of joining the first wafer and the second wafer by thermocompression bonding the first conductive member and the second conductive member;
After the bonding step, an exposing step of removing the second substrate of the second wafer and exposing the fourth semiconductor layer,
The transmittance for the wavelength of light from the first active layer of the first conductive member and the second conductive member after the bonding step is the same as that of the first conductive member in the first forming step and the second forming step. A method for manufacturing a light emitting device, wherein the transmittance of the conductive member and the second conductive member to the wavelength of light from the first active layer is higher than that of the first active layer. 前記第１形成工程において、前記第１導電性酸化膜を形成する前に、前記第２半導体層の表面に凹凸構造を形成する請求項１に記載の発光装置の製造方法。 2. The method of manufacturing a light emitting device according to claim 1, wherein in the first forming step, an uneven structure is formed on the surface of the second semiconductor layer before forming the first conductive oxide film. 前記第２形成工程において、前記第２導電性酸化膜を形成する前に、前記第３半導体層の表面に凹凸構造を形成する請求項１又は２に記載の発光装置の製造方法。 3. The method of manufacturing a light emitting device according to claim 1, wherein in the second forming step, an uneven structure is formed on the surface of the third semiconductor layer before forming the second conductive oxide film. 前記露出工程において露出させた前記第４半導体層の表面に、第１電極を形成する第１電極形成工程をさらに含み、
前記第１ウエハ準備工程において、前記第１基板と前記第１半導体層との間に、前記第１基板と前記第１半導体層とを電気的に接続する第２電極を形成する請求項１～３のいずれか１つに記載の発光装置の製造方法。 further comprising a first electrode forming step of forming a first electrode on the surface of the fourth semiconductor layer exposed in the exposing step,
2. A second electrode is formed between the first substrate and the first semiconductor layer in the first wafer preparation step, the second electrode electrically connecting the first substrate and the first semiconductor layer. 3. The method for manufacturing a light emitting device according to any one of 3. 前記第１導電性酸化膜及び前記第２導電性酸化膜を、酸化インジウム錫により形成する請求項１～４のいずれか１つに記載の発光装置の製造方法。 5. The method for manufacturing a light emitting device according to claim 1, wherein the first conductive oxide film and the second conductive oxide film are formed of indium tin oxide.
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