JP6652337B2 - Method of inspecting mounting state of semiconductor device and semiconductor device mounted on mounting substrate - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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Description
本発明は、露出した放熱部を有する半導体装置の実装状態の検査方法に関する。 The present invention relates to a method for inspecting a mounted state of a semiconductor device having an exposed heat radiating portion.
消費電力が大きく、発熱量の多い半導体装置において、その放熱構造として半導体装置の上面に放熱部を搭載する以外に、半導体装置自身に組み込まれた放熱部を有するものがある。例えば、放熱部を内蔵した樹脂封止型の半導体装置が提案されている。また、基板とのはんだ接続を介して、基板へ放熱する構造も提案されている(例えば、特許文献1参照)。 2. Description of the Related Art Some semiconductor devices that consume a large amount of heat and generate a large amount of heat have, as a heat dissipation structure, a heat dissipation portion incorporated in the semiconductor device itself in addition to a heat dissipation portion mounted on an upper surface of the semiconductor device. For example, a resin-sealed semiconductor device having a built-in heat radiating section has been proposed. Further, a structure has been proposed in which heat is radiated to a substrate via a solder connection with the substrate (for example, see Patent Document 1).
このような放熱構造において、信頼性を確保するためには接続部の良否を判定する必要がある。図5は半導体装置及びその接続部の構造を示す一例である。半導体装置51内のICチップ57に接触するように放熱部58が設けられ、放熱部58がはんだ55によって基板52に接続されている。このように放熱部が目視確認できる場合には、直接放熱部の接続の良否を判定できる。
In such a heat dissipation structure, it is necessary to determine the quality of the connection portion in order to ensure reliability. FIG. 5 is an example showing a structure of a semiconductor device and a connection portion thereof. A heat radiating portion 58 is provided so as to contact an
しかし、図6のように半導体装置51の中央部に放熱部58を有し、接続部が直接目視で確認できない場合、何らかの間接的な方法で実装後の放熱部の接続の良否判定を行わねばならない。このような場合、半導体装置にヒーターを接触させて基板の温度を測定することで接続部の良否を確認する方法を用いたり、半導体装置に通電して実動作させ、抵抗を測定したりして接続部の良否の確認をしていた。 However, as shown in FIG. 6, the semiconductor device 51 has a heat radiating portion 58 in the central portion, and when the connection portion cannot be directly visually confirmed, it is necessary to determine the connection quality of the mounted heat radiating portion by some indirect method. No. In such a case, a method in which a heater is brought into contact with the semiconductor device to measure the temperature of the substrate to check the quality of the connection portion is used, or the semiconductor device is energized and actually operated, and the resistance is measured. The quality of the connection was checked.
しかしながら、半導体装置自身を実動作させることは、所望する放熱効果の直接的確認としては意味があるが、一般に周辺回路が必要となる。製品出荷前の検査などで周辺回路を含めて動作させることが出来る場合や一品のみの検査であるならばこの方法でも良い。しかし、対象となる半導体装置のみを評価するために周辺回路まで部品を実装していない場合や、周辺回路が実装してあっても温度サイクル試験などで周辺回路の方が先に不良になってしまった場合においては、実動作させる方法では放熱部の良否の検査ができなくなってしまう。 However, although the actual operation of the semiconductor device itself is meaningful as a direct confirmation of a desired heat radiation effect, a peripheral circuit is generally required. This method may be used when the operation including the peripheral circuit can be performed in the inspection before product shipment or when only one product is inspected. However, in order to evaluate only the target semiconductor device, parts are not mounted up to the peripheral circuit, or even if the peripheral circuit is mounted, the peripheral circuit becomes defective first in a temperature cycle test etc. In such a case, it is impossible to perform a quality inspection of the heat radiating portion by the method of actually operating the heat radiating portion.
また、半導体装置表面にヒーターを接触させ実装基板の温度を測定する場合、ヒーターと温度計をセットする必要があるので、そのために周辺回路の高さが制約されてしまうことがある。また、熱の伝わり方を測定するので測定には電気測定よりはるかに長い時間を要する。
なお、破壊的手段として接続部を切断し断面観察する手法もあり得るが、断面以外の箇所の接続性の良否が判定できないことや、継続的な評価が出来なくなるという問題点がある。
Further, when a heater is brought into contact with the surface of the semiconductor device to measure the temperature of the mounting substrate, it is necessary to set the heater and the thermometer, which may limit the height of the peripheral circuit. In addition, the measurement takes much longer time than the electrical measurement because it measures how heat is transmitted.
As a destructive means, there is a method of cutting a connection portion and observing a cross section. However, there is a problem that it is not possible to determine whether or not the connectivity of a portion other than the cross section is good, and it is not possible to perform a continuous evaluation.
本発明は、上記課題を解決するために、半導体装置を動作させたり、試料を破壊したりする事なしに、放熱部の接続の検査を可能とする検査方法を提供するものである。 SUMMARY OF THE INVENTION In order to solve the above-described problems, an object of the present invention is to provide an inspection method capable of inspecting a connection of a heat radiating unit without operating a semiconductor device or destroying a sample.
上記課題を解決のために以下の手段を用いる。
まず、封止樹脂から露出した放熱部を有し、前記放熱部を実装基板に接続して放熱する実装構造の半導体装置の実装状態の検査方法であって、
前記放熱部から延伸された吊りリード先端の外部リードに第1の抵抗測定用プローブを接触させる工程と、前記放熱部と接続された前記実装基板上のランドから延伸された端子部に第2の抵抗測定用プローブを接触させる工程と、前記第1および第2の抵抗測定用プローブ間の抵抗を測定する工程と、合否判定基準に従い良否判定する工程と、からなることを特徴とする半導体装置の実装状態の検査方法とする。
The following means are used to solve the above problems.
First, a method for inspecting a mounting state of a semiconductor device having a mounting structure having a heat radiating portion exposed from a sealing resin, and connecting the heat radiating portion to a mounting substrate to radiate heat,
Contacting a first resistance-measuring probe with an external lead at the tip of a suspension lead extended from the heat radiating portion; and attaching a second terminal to a terminal portion extended from a land on the mounting board connected to the heat radiating portion. A semiconductor device comprising: a step of bringing a resistance measurement probe into contact; a step of measuring a resistance between the first and second resistance measurement probes; and a step of judging pass / fail according to a pass / fail judgment criterion. This is an inspection method for the mounting state.
また、封止樹脂から露出した放熱部を有し、前記放熱部を実装基板に接続して放熱する実装構造の半導体装置の実装状態の検査方法であって、
前記放熱部から延伸された吊りリード先端の外部リードに第1の抵抗測定用プローブを接触させる工程と、前記放熱部と接続された前記実装基板上の複数のランドの一方から延伸された端子部に第2の抵抗測定用プローブを接触させる工程と、前記第1および第2の抵抗測定用プローブ間の抵抗を測定する工程と、合否判定基準に従い良否判定する工程と、からなることを特徴とする半導体装置の実装状態の検査方法とする。
Further, a method for inspecting a mounting state of a semiconductor device having a mounting structure having a heat radiating portion exposed from a sealing resin and connecting the heat radiating portion to a mounting substrate to radiate heat,
Contacting a first resistance-measuring probe with an external lead at a tip of a suspension lead extended from the heat radiating portion; and a terminal portion extended from one of a plurality of lands on the mounting board connected to the heat radiating portion. Contacting a second resistance measurement probe with the second probe, measuring a resistance between the first and second resistance measurement probes, and determining whether the resistance is acceptable according to a pass / fail determination criterion. Inspection method of the mounting state of the semiconductor device to be performed.
また、封止樹脂から露出した放熱部を有し、前記放熱部を実装基板に接続して放熱する実装構造の半導体装置の実装状態の検査方法であって、
前記放熱部と接続された前記実装基板上の複数のランドの第1のランドから延伸された第1端子部に第1の抵抗測定用プローブを接触させる工程と、前記実装基板上の複数のランドの第2のランドから延伸された第2端子部に第2の抵抗測定用プローブを接触させる工程と、前記第1および第2の抵抗測定用プローブ間の抵抗を測定する工程と、合否判定基準に従い良否判定する工程と、からなることを特徴とする半導体装置の実装状態の検査方法とする。
Further, a method for inspecting a mounting state of a semiconductor device having a mounting structure having a heat radiating portion exposed from a sealing resin and connecting the heat radiating portion to a mounting substrate to radiate heat,
Contacting a first resistance measuring probe with a first terminal portion extending from a first land of the plurality of lands on the mounting board connected to the heat radiating section; Contacting a second resistance measurement probe with a second terminal portion extended from the second land, measuring a resistance between the first and second resistance measurement probes, And determining whether the semiconductor device is good or bad according to the following.
以上の本発明の検査方法によれば、半導体装置を動作させたり、試料を破壊したりする事なしに、放熱部の接続の検査を行うことが出来る。 According to the above-described inspection method of the present invention, it is possible to inspect the connection of the heat radiating portion without operating the semiconductor device or destroying the sample.
以下に、本発明の実施の形態について、図面を参照しながら詳細に説明する。
図1は半導体装置の実装構造の断面図であり、本発明の第1の実施の形態による検査方法を示している。図1は、半導体装置1、実装基板2、吊リード3、はんだ5、封止樹脂6、ICチップ7、吊リードから一方に延伸した放熱部8、放熱部8の裏面とはんだ5を介して接続する実装基板のランド9、吊リードから他方に延伸した外部リード10、放熱部と接続する実装基板のランドから延伸した端子部11、抵抗測定用プローブ12を示している。ICチップ7は吊りリード3から一方に延伸した放熱部8の上に載置され、封止樹脂6によって被覆されており、放熱部8の裏面は封止樹脂6から露出している。半導体装置1は、はんだ5を介して放熱部8が実装基板2の放熱部と接続する実装基板のランド9に接続されている。実装基板のランド9から延伸した端子部11は半導体装置1の下には配置されず、抵抗測定用プローブ12が接触できる位置に配置される。通常の動作時には、ICチップ7の発熱が放熱部8とはんだ5を伝って実装基板2に放熱される。
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a sectional view of a mounting structure of a semiconductor device, showing an inspection method according to a first embodiment of the present invention. FIG. 1 shows a
ここで、半導体装置1の放熱部8につながる吊りリード3が他方に延伸されたプローブ接触可能な外部リード10と、半導体装置の放熱部8にはんだ5で接続されている実装基板接続部であるランド9から延伸されて電気的に接続している端子部11に、プローブ12をそれぞれ接触させ、半導体装置の放熱部8と実装基板の接続部9の間の抵抗を測定する事で接続状態の検査が可能となる。
Here, the suspension leads 3 connected to the
本実施例は半導体装置の構造が中央部裏面に放熱部を有するSOPタイプである。一般に外部リードであるリード端子は平行する二辺にあり、放熱部は半導体装置下面中央にあるため外観目視による接続検査は不可能であるが、半導体装置1半導体装置の放熱部につながる吊りリードを延伸したプローブ接触可能な外部リード10と、半導体装置の放熱部にはんだで接続されている実装基板接続部から延伸して電気的に接続している端子部11にプローブを接続し、半導体装置の放熱部と実装基板の接続部の間の抵抗を測定する事で接続状態の検査が可能となる。
In this embodiment, the structure of the semiconductor device is an SOP type having a heat radiating portion on the back surface of the central portion. In general, the lead terminals, which are external leads, are on two parallel sides, and the heat radiating portion is located at the center of the lower surface of the semiconductor device. Therefore, it is impossible to visually inspect the connection. A probe is connected to the extended
放熱部8のはんだ接続が十分な場合と接続が不十分な場合で抵抗には差が現れる。これは放熱部と実装基板とのはんだ接続の良否により電気抵抗に差が出るためである。また、接続の良否は接続面積すなわち抵抗の大小として現れるので、必要とされる接続面積の抵抗を試作時に把握することで検査時に合否判定する基準を明確にし、この合否判定基準に従い良否判定をすることができる。
以上のように、本発明の検査方法を用いることで、半導体装置の放熱部と実装基板との接続の良否を判定することができる。
There is a difference in resistance between the case where the solder connection of the
As described above, by using the inspection method of the present invention, it is possible to determine the quality of the connection between the heat radiating portion of the semiconductor device and the mounting board.
図2は半導体装置の実装構造の断面図であり、本発明の第2の実施の形態による検査方法を示している。露出した放熱部8が実装基板2にはんだ接続して、半導体装置の放熱部と接続される実装基板の接続部(ランド)9が2個以上に分離された接続部からなり、接続部から延伸された端子部11と、この半導体装置の放熱部8から延長された吊リード3を延伸したプローブ接触可能な外部リード10とに抵抗測定用プローブ12をそれぞれ接触させて抵抗を測定することで第1の実施形態と同様に放熱部の接続の良否が判定できることわかる。
FIG. 2 is a sectional view of a mounting structure of a semiconductor device, showing an inspection method according to a second embodiment of the present invention. The exposed
図1との違いは、はんだ接続の電気抵抗が低く測定ばらつきとはんだ接続の変化が判別しにくい場合、実装基板の接続部を2個以上に分離することにより接続部の面積を小さくして接続部から延伸された端子部11とこの半導体装置の放熱部から延長された吊リード3を延伸したプローブ接触可能な外部リード10との抵抗値を高くして、はんだ接続の抵抗変化に対する感度を上げることができる点である。ここで、2個以上に分離された接続部はICチップの直下においては相対的に大きい面積を有し、端子部11につながる接続部は相対的に小さい面積であるという特徴を有する。これにより、高感度の検査が可能となる。
The difference from Fig. 1 is that when the electrical resistance of the solder connection is so low that it is difficult to distinguish the measurement variation and the change of the solder connection, the connection area of the mounting board is reduced by separating the connection area of the mounting board into two or more parts. The resistance value between the terminal portion 11 extended from the portion and the
図3は半導体装置の実装構造の断面図であり、本発明の第3の実施の形態による検査方法を示している。半導体装置の放熱部と接続される実装基板の接続部が2個以上に分離された接続部からなり、2箇所の接続部からそれぞれ延伸された端子部11に抵抗測定用プローブをそれぞれ接触させて抵抗を測定することで図1と同様に放熱部の接続の良否が判定できることわかる。 FIG. 3 is a sectional view of a mounting structure of a semiconductor device, showing an inspection method according to a third embodiment of the present invention. The connecting portion of the mounting board connected to the heat radiating portion of the semiconductor device is composed of two or more separate connecting portions, and the resistance measuring probes are respectively brought into contact with the terminal portions 11 extending from the two connecting portions. It can be seen that by measuring the resistance, the quality of the connection of the heat radiating portion can be determined as in FIG.
図1との違いは、半導体装置の放熱部に連なる吊リードを延伸した外部リードの大きさが抵抗測定用プローブで接触するのに必要な面積が確保できない場合、半導体装置の放熱部から延長された吊リードあるいは外部リードではなく、実装基板の接続部から延伸された端子部のみによりはんだ接続の抵抗測定が可能であり、かつ実装基板の接続部が2個以上に分離された接続部を用いるので図2と同様に抵抗値を高くしてはんだ接続の抵抗変化に対する感度を上げることができる。図では接続部が中央部と左右の3個に分離されたものが示されているが、中央部と左右のいずれかを一緒にすることでも放熱部の接続の良否を判定できる。 The difference from FIG. 1 is that when the size of the external lead extending from the suspension lead connected to the heat radiating portion of the semiconductor device cannot secure the area required for contact with the resistance measuring probe, the external lead is extended from the heat radiating portion of the semiconductor device. It is possible to measure the resistance of solder connection only with the terminal extending from the connection part of the mounting board, not using the hanging lead or external lead, and use a connection part where the connection part of the mounting board is separated into two or more. Therefore, as in FIG. 2, the resistance value can be increased to increase the sensitivity to the change in resistance of the solder connection. In the figure, the connection part is shown as being divided into three parts: the center part and the left and right parts. However, the connection of the heat radiating part can be determined by combining either the center part or the left and right parts.
図4は半導体装置の実装構造の断面図であり、本発明の第4の実施の形態による検査方法を示している。半導体装置の放熱部と接続される実装基板の接続部が2個以上に分離された接続部からなり、それぞれの接続部から延伸された端子部11を該半導体装置の放熱部から延長された吊リードとは異なるリード4に接続させている。それぞれの接続部から延伸された端子部11に抵抗測定用プローブをそれぞれ接触させて抵抗を測定することで図1と同様に放熱部の接続の良否が判定できることがわかる。なお、抵抗測定用プローブを用いないでも、半導体装置の内部の抵抗を測定するのと同様の回路でリード4の間の抵抗を測定することで、図1と同様に放熱部の接続の良否を判定することが可能である。
FIG. 4 is a sectional view of a mounting structure of a semiconductor device, showing an inspection method according to a fourth embodiment of the present invention. The connecting portion of the mounting substrate connected to the heat radiating portion of the semiconductor device is composed of two or more separate connecting portions, and the terminal portion 11 extending from each connecting portion is connected to a suspension extending from the heat radiating portion of the semiconductor device. It is connected to a
半導体装置を実装基板に実装した後の実装状態の検査として、放熱部と接続する実装基板のランドから延伸した端子部11に抵抗測定用プローブ12を接触して抵抗測定を行なえることは図3と同様であるが、その後、半導体装置が実装状態にある製品の電気動作中にこの半導体装置自身が抵抗測定用プローブ12を用いることなく、はんだ接続の抵抗測定を行うことが可能なので、この製品の長期使用中に、はんだ接続部の抵抗測定からはんだ接続の実装状態を検知しその結果を半導体装置内部でフィードバックを行いこの半導体装置の入出力電力(入出力電圧および入出力電流)の制御を行い、実装状態で許容できるICチップの発熱になるように電力供給を制御することで、半導体装置の熱破壊の前に半導体装置ひいてはシステムの破綻を防ぐことに応用することが可能である。 As an inspection of the mounting state after the semiconductor device is mounted on the mounting board, the resistance measurement can be performed by contacting the resistance measuring probe 12 with the terminal section 11 extending from the land of the mounting board connected to the heat radiating section in FIG. However, since the semiconductor device itself can perform the resistance measurement of the solder connection without using the resistance measurement probe 12 during the electrical operation of the product in which the semiconductor device is mounted, During long-term use, the mounting state of the solder connection is detected from the resistance measurement of the solder connection, and the result is fed back inside the semiconductor device to control the input / output power (input / output voltage and input / output current) of this semiconductor device. By controlling the power supply so that the IC chip generates heat that can be tolerated in the mounted state, the semiconductor device and, consequently, the system can be damaged before the semiconductor device is thermally damaged. It can be applied to be prevented.
本発明の検査方法による放熱部の接続の良否の判定は次のようにすればよい。実動作によって放熱性を直接的確認することやX線観察によりはんだ接続が確実にされていることを確認した試料と意図的にはんだ接続が不十分な試料を本発明の検査方法であらかじめ測定し、検査対象である半導体装置の実装状態の本発明の検査方法によって得られた電気抵抗値を、上記の試料の測定で得られた抵抗値と比較することで放熱部の接続の良否を判断する。はんだ接続の有無で明らかな差があるので判断は容易に行える。 The determination of the quality of the connection of the heat radiating portion by the inspection method of the present invention may be performed as follows. The test method of the present invention was used to directly check the heat radiation by actual operation, and to measure in advance the sample whose solder connection was confirmed by X-ray observation and the sample whose solder connection was intentionally insufficient. By comparing the electrical resistance value obtained by the inspection method of the present invention in the mounting state of the semiconductor device to be inspected with the resistance value obtained by the measurement of the sample, it is determined whether or not the connection of the heat radiating portion is good. . Judgment can be made easily because there is a clear difference between the presence and absence of solder connection.
また、本実施例では、裏面に放熱部を有するSOPに対し説明したがQFPやBGAパッケージのように中央部の放熱部やはんだボールを介して基板に放熱させる実装構造においても、本発明は有効である。 In this embodiment, the SOP having a heat radiating portion on the back surface has been described. However, the present invention is also applicable to a mounting structure in which heat is radiated to a substrate through a central heat radiating portion or a solder ball, such as a QFP or BGA package. It is.
本発明にかかる検査方法は、半導体装置を動作させたり試料を破壊したりする事なく放熱部の接続の検査を行うことが出来るものであり、露出した放熱部を有する半導体装置等の実装構造の検査において有用である。また、半導体装置の長期使用における実装状態の悪化に対し、その実装状態を検査、フィードバックすることで熱暴走による半導体装置ひいてはシステムの破綻を防ぐことができる。 The inspection method according to the present invention is capable of inspecting the connection of the heat radiating portion without operating the semiconductor device or destroying the sample, and the mounting method of a semiconductor device or the like having an exposed heat radiating portion. Useful in testing. Further, when the mounting state is deteriorated due to long-term use of the semiconductor device, the mounting state is inspected and fed back to prevent the semiconductor device and the system from breaking down due to thermal runaway.
1 半導体装置
2 実装基板
3 吊リード
4 リード
5 はんだ
6 封止樹脂
7 ICチップ
8 放熱部
9 放熱部と接続する実装基板のランド
10 吊リードから延伸した外部リード
11 放熱部と接続する実装基板のランドから延伸した端子部
12 抵抗測定用プローブ
DESCRIPTION OF
Claims (2)
前記放熱部から延伸された吊りリード先端の、前記放熱部よりも高い位置に設けられた外部リードに第1の抵抗測定用プローブを接触させる工程と、
前記放熱部と接続された前記実装基板上のランドから延伸された端子部に第2の抵抗測定用プローブを接触させる工程と、
前記第1および第2の抵抗測定用プローブ間の抵抗を測定する工程と、
合否判定基準に従い良否判定する工程と、
からなることを特徴とする半導体装置の実装状態の検査方法。 A method for inspecting a mounting state of a semiconductor device having a mounting structure having a heat radiating portion exposed from a sealing resin and connecting the heat radiating portion to a mounting substrate to radiate heat,
A step of contacting the first resistance measuring probe with an external lead provided at a position higher than the heat radiating portion, at the tip of the suspension lead extending from the heat radiating portion,
Contacting a second resistance measurement probe with a terminal portion extending from a land on the mounting board connected to the heat radiating portion;
Measuring a resistance between the first and second resistance measurement probes;
A step of judging pass / fail according to pass / fail judgment criteria;
A method for inspecting a mounting state of a semiconductor device, comprising:
前記放熱部から延伸された吊りリード先端の、前記放熱部よりも高い位置に設けられた外部リードに第1の抵抗測定用プローブを接触させる工程と、
前記放熱部と接続された前記実装基板上の複数のランドの一方から延伸された端子部に第2の抵抗測定用プローブを接触させる工程と
前記第1および第2の抵抗測定用プローブ間の抵抗を測定する工程と、
合否判定基準に従い良否判定する工程と、
からなることを特徴とする半導体装置の実装状態の検査方法。 A method for inspecting a mounting state of a semiconductor device having a mounting structure having a heat radiating portion exposed from a sealing resin and connecting the heat radiating portion to a mounting substrate to radiate heat,
A step of contacting the first resistance measurement probe with an external lead provided at a position higher than the heat radiating portion, at the tip of the suspension lead extended from the heat radiating portion,
Contacting a second resistance measuring probe with a terminal extending from one of a plurality of lands on the mounting board connected to the heat radiating portion; and a resistance between the first and second resistance measuring probes. Measuring the
A step of judging pass / fail according to pass / fail judgment criteria;
A method for inspecting a mounting state of a semiconductor device, comprising:
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