JP6442009B2 - 不揮発性大容量メモリ・システムによるキャッシュ移動を提供するための装置および方法 - Google Patents
不揮発性大容量メモリ・システムによるキャッシュ移動を提供するための装置および方法 Download PDFInfo
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Description
CPU 中央処理装置
DMA ダイレクト・メモリ・アクセス
eMMC 組込み型マルチメディア・カード
exFAT 拡張ファイル・アロケーション・テーブル
HW ハードウェア
JEDEC 電子素子技術連合評議会
LBA 論理ブロック・アドレス
MMC マルチメディア・カード
MRAM 磁気ランダム・アクセス・メモリ
RAM ランダム・アクセス・メモリ
SCSI 小型コンピュータ・システム・インタフェース
SD セキュア・デジタル
SW ソフトウェア
UFS ユニバーサル・フラッシュ・ストレージ
(4)UFSホスト・コントローラ13は、この(書込み)コマンド・セットをUFSメモリ・モジュール20に転送する。UFSメモリ・モジュール20に局在的に書き込まれたコマンドに関連するデータを処理することができないとUFSメモリ・モジュール20が判断すると、仮定する。この点に関して、留意すべき点は、例えば、書込みコマンド(複数の書込みコマンド)の実行の緊急性を強調するために、コマンドに関連するイニシエータによるキュー指示のヘッドがあり、UFSメモリ・モジュール20は、現在のところ、指示された緊急レベルを満たすことができないと判断する場合があるということである。
1) コマンドの種類(移動(move)、フィル(fill));
2) フィル・データ(全(all)0,全(all)1,01シーケンス(sequence)、...)、オプション;
3) 宛先アドレス(フィル、移動)および送信元アドレス(移動)、アドレスは実装に依存;
4) 動作サイズ(細分性は実装に依存)。
1) コマンド(フィル(fill)0、フィル(fill)1、...、フィル_パターン(fill_pattern)、移動(move)を配信;
2) 宛先アドレス(バンク(bank)、ロー(row)、カラム(column)、バイト(byte))を配信;
3) 送信元アドレス(バンク(bank)、ロー(row)、カラム(column)、バイト(byte))を配信;
4) 動作サイズを配信。
Claims (22)
- メモリ・モジュールであって、
コントロール・モジュールと、
前記コントロール・モジュールによって読み書き可能なメモリと、
前記メモリ・モジュールをホスト装置のメモリ・コントローラに接続するためのインタフェースと、
を有し、
前記コントロール・モジュールは、
前記メモリに格納されたデータに関連するコマンドを前記ホスト装置のメモリ・コントローラから受信し、
所定値に前記メモリ内の指定された複数のメモリ・ロケーションを設定するためのフィル・パターンであって、前記メモリ・モジュールに格納された所定のフィル・パターンの1つ、又は前記ホスト装置のメモリ・コントローラからの前記コマンドに含まれる受信したフィル・パターンであるフィル・パターンを決定し、
前記コマンドに少なくとも部分的に基づいて、前記メモリ・モジュール内の1つ又は複数の基本メモリ動作であってデータ移動動作、又は前記所定値に前記メモリ内の指定された前記複数のメモリ・ロケーションを設定することを含むデータ・フィル動作を含む基本メモリ動作を実行するように構成される、
メモリ・モジュール。 - 前記コントロール・モジュールは、前記コマンドの受信後に前記メモリ・モジュール内の前記1つ又は複数の基本メモリ動作を自律的に実行するようにさらに構成される、請求項1に記載のメモリ・モジュール。
- 前記データ移動動作は、前記メモリ内の第1の指定された複数のメモリ・ロケーションから第2の指定された複数のメモリ・ロケーションに前記データをコピーすることを含む、請求項1に記載のメモリ・モジュール。
- 前記データ移動動作は、前記メモリ・モジュールに格納された所定値又は前記コマンドに含まれる1つ又は複数の値のうちの少なくとも1つに前記メモリ内の前記第1の指定された複数のメモリ・ロケーションを設定することをさらに含む、請求項3に記載のメモリ・モジュール。
- 前記メモリ・モジュールは、ダイナミック・ランダム・アクセス・メモリ(DRAM)モジュール又は大容量メモリ・モジュールのうちの1つであることを特徴とする請求項1に記載のメモリ・モジュール。
- ホスト装置のメモリ・コントローラからメモリに記憶されたデータに関連するコマンドを受信するステップと、
所定値に前記メモリ内の前記指定された複数のメモリ・ロケーションを設定するためのフィル・パターンであって、前記メモリ・モジュールに格納された所定のフィル・パターンの1つ、又は前記ホスト装置の前記メモリ・コントローラからの前記コマンドに含まれる受信されたフィル・パターンを決定するステップと、
前記コマンドの少なくとも一部分に基づいて、前記メモリに関連付けられたメモリ・モジュール内の1つ又は複数の基本メモリ動作であってデータ移動動作、又は前記所定値に前記メモリ内の指定された複数のメモリ・ロケーションを設定することを含むデータ・フィル動作を含む基本メモリ動作を実行するステップと、
を含む方法。 - 前記コマンドの受信後に前記メモリ・モジュール内の前記1つ又は複数の基本メモリ動作を自律的に実行するステップ、をさらに含む、請求項6に記載の方法。
- 前記データ移動動作は、前記メモリ内の第1の指定された複数のメモリ・ロケーションから第2の指定された複数のメモリ・ロケーションに前記データをコピーすることを含む、請求項6に記載の方法。
- 前記データ移動動作は、所定値に前記メモリ内の前記第1の指定された複数のメモリ・ロケーションを設定することをさらに含む、請求項8に記載の方法。
- メモリ・コントローラと、
前記メモリ・コントローラをメモリ・モジュールに接続するためのインタフェースと、
を有し、
前記メモリ・コントローラは、
前記メモリ・モジュールのメモリに記憶されたデータに関連するコマンドであって、前記メモリ・モジュールに前記メモリ・モジュール内の1つ又は複数の基本メモリ動作であってデータ移動動作、又は構成可能なデータ・フィル動作を含む基本メモリ動作を実行させるコマンドを前記メモリ・モジュールに送信するように構成され、
前記メモリ・コントローラは、大容量メモリ・モジュール又は大容量メモリ・ホスト・コントローラのうちの1つによって制御される、ホスト装置。 - 前記大容量メモリ・ホスト・コントローラをさらに有し、前記コマンドは、前記大容量メモリ・ホスト・コントローラによって起動され、前記インタフェースを介して前記メモリ・コントローラによって前記メモリ・モジュールに送信される、請求項10に記載のホスト装置。
- 前記1つ又は複数の基本メモリ動作は、前記構成可能なデータ・フィル動作を含み、前記構成可能なデータ・フィル動作は、所定値に前記メモリ内の指定された複数のメモリ・ロケーションを設定することを含む、請求項10に記載のホスト装置。
- 前記メモリ・コントローラは、前記所定値に前記メモリ内の前記指定された複数のメモリ・ロケーションを設定するために、前記メモリ・モジュールにフィル・パターンを送信するようにさらに構成される、請求項12に記載のホスト装置。
- 前記1つ又は複数の基本メモリ動作は、前記データ移動動作を含み、前記データ移動動作は、前記メモリ内の第1の指定された複数のメモリ・ロケーションから第2の指定された複数のメモリ・ロケーションに前記データをコピーすることを含む、請求項10に記載のホスト装置。
- 前記データ移動動作は、所定値に前記メモリ内の前記第1の指定された複数のメモリ・ロケーションを設定することをさらに含む、請求項14に記載のホスト装置。
- 前記メモリ・モジュールは、ダイナミック・ランダム・アクセス・メモリ(DRAM)モジュールである、請求項10に記載のホスト装置。
- ダイナミック・ランダム・アクセス・メモリ(DRAM)メモリ・モジュールであって、
コントロール・モジュールと、
前記コントロール・モジュールによって読み書き可能なメモリと、
前記DRAMメモリ・モジュールをホスト装置のメモリ・コントローラに接続するためのインタフェースと、
を有し、
前記コントロール・モジュールは、
前記メモリ内の複数のメモリ・ロケーションに関連する1つ又は複数のコマンドを前記ホスト装置の前記メモリ・コントローラから受信し、
所定値に前記メモリ内の前記複数のメモリ・ロケーションを設定するフィル・パターンであって、前記DRAMメモリ・モジュールに格納された所定のフィル・パターン又は前記ホスト装置の前記メモリ・コントローラからの前記1つ又は複数のコマンドに含まれる受信されたフィル・パターンであるフィル・パターンを決定し、
前記1つ又は複数のコマンド少なくとも一部分に基づいて、前記所定値に前記メモリ内の前記複数のメモリ・ロケーションを設定することを含むデータ・フィル動作を実行するように構成される、DRAMメモリ・モジュール。 - 前記所定値は、単一のゼロビット、単一の1ビット、2ビットの第1パターン、4ビットの第2パターン、又は複数ビットの第3パターンのうちの少なくとも1つである、請求項17に記載のDRAMメモリ・モジュール。
- 前記コントロール・モジュールは、前記1つ以上のコマンドの受信に続いて前記DRAMメモリ・モジュール内のデータ・フィル動作を自律的に実行するようにさらに構成される、請求項17に記載のDRAMメモリ・モジュール。
- 前記コントロール・モジュールは、前記1つ以上のコマンドに少なくとも部分的に基づいて、データ移動動作を実行するようにさらに構成される、請求項17に記載のDRAMメモリ・モジュール。
- 前記データ移動操作は、前記メモリ内の第1の指定された複数のメモリ・ロケーションから第2の指定された複数のメモリ・ロケーションへデータをコピーすることを含む、請求項20に記載のDRAMメモリ・モジュール。
- 前記データ移動動作は、前記メモリ内の指定された複数のメモリ・ロケーションを、前記メモリ・モジュールに格納された所定値又は前記1つ以上のコマンドに含まれる1つ以上の値のうちの少なくとも1つに設定することを含む、請求項20に記載のDRAMメモリ・モジュール。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US13/358,806 | 2012-01-26 | ||
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US10877665B2 (en) | 2020-12-29 |
KR102458334B1 (ko) | 2022-10-24 |
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