JP6381480B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6381480B2 JP6381480B2 JP2015097593A JP2015097593A JP6381480B2 JP 6381480 B2 JP6381480 B2 JP 6381480B2 JP 2015097593 A JP2015097593 A JP 2015097593A JP 2015097593 A JP2015097593 A JP 2015097593A JP 6381480 B2 JP6381480 B2 JP 6381480B2
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- 230000015654 memory Effects 0.000 claims description 240
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- 238000012545 processing Methods 0.000 claims description 31
- 238000012544 monitoring process Methods 0.000 claims description 11
- 230000004044 response Effects 0.000 claims description 3
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- 238000000034 method Methods 0.000 description 12
- 238000012546 transfer Methods 0.000 description 10
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells
- G11C16/225—Preventing erasure, programming or reading when power supply voltages are outside the required ranges
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0653—Monitoring storage devices or systems
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Security & Cryptography (AREA)
- Memory System (AREA)
- Measuring Temperature Or Quantity Of Heat (AREA)
- Read Only Memory (AREA)
Description
図1乃至図3は、第1実施形態に係る半導体装置1と該半導体装置1が組み込まれたシステム100を示す。システム100は、「電子機器」の一例である。半導体装置1は、「半導体モジュール」及び「半導体記憶装置」の其々一例である。本実施形態に係る半導体装置1は、例えばSSD(Solid State Drive)等のメモリシステムであるが、これに限られるものではない。
図10に第2実施形態に係る半導体装置1に実装されるコントローラ13のシステム構成の一例を示す。また、図11では、第2実施形態における半導体装置1に実装されたコントローラ13のホストからの命令処理の一例をフローチャートで示す。尚、本実施形態の説明において、第1実施形態と同様の構成については、同様の符号を付して詳細な説明を省略する。また、本実施形態における半導体装置1の外観及び構成は、図4と同様とする。
次に、事前に受け取ったライトコマンドによってホスト装置2から指定されたNANDメモリ12に対してデータの書き込み処理を行うが、このとき指定されたNANDメモリ12の温度を測る(Step1)。
Claims (7)
- ホスト装置と電気的に接続可能な基板と、
前記基板に搭載された第1メモリと、
前記基板に搭載された第2メモリと、
前記第1メモリの第1温度を測定する第1温度センサと、前記第2メモリの第2温度を
測定する第2温度センサと、を含んだ複数の温度センサと、
前記基板に搭載されるとともに、前記ホスト装置からのコマンドに応じて、
前記第1温度が第1値よりも大きく、前記第2温度が第1値よりも小さい場合、前記第2
メモリに対してコマンド処理を実行するコントローラと、
を有した半導体装置。 - 前記基板には、
第3メモリが搭載され、
前記複数の温度センサは、
前記第3メモリの第3温度を測定する第3温度センサを含むことを特徴とする請求項1に
記載の半導体装置。 - 前記コントローラは、
前記第3温度が前記第1値より小さい場合、前記第2温度及び前記第3温度に応じてコマ
ンド処理を実行することを特徴とする請求項2に記載の半導体装置。 - 前記コントローラは、
前記第2温度が第2値よりも大きく、前記第3温度が第2値よりも小さい場合、前記第3
メモリに対してコマンド処理を行うことを特徴とする請求項3に記載の半導体装置。 - 前記複数の温度センサは、
前記第1温度が前記第1値よりも大きいことを前記コントローラが確認した後で、前記
第2温度及び前記第3温度を測定することを特徴とする請求項3に記載の半導体装置。 - 前記コントローラは、
前記第1メモリに書き込まれた第1データ量と、前記第2メモリに書き込まれた第2デー
タ量と、前記第3メモリに書き込まれた第3データ量とを監視するデータ監視部を備える
とともに、
前記第3温度が前記第1値よりも小さい場合、前記第2データ量及び前記第3データ量に
応じてコマンド処理を行うことを特徴とする請求項2に記載の半導体装置。 - 前記複数の温度センサは、
其々第1メモリ及び第2メモリと一部が当接することを特徴とする請求項1乃至請求項6
のいずれか一項に記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015097593A JP6381480B2 (ja) | 2015-05-12 | 2015-05-12 | 半導体装置 |
US15/051,221 US20160334992A1 (en) | 2015-05-12 | 2016-02-23 | Semiconductor device that changes a target memory unit based on temperature |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015097593A JP6381480B2 (ja) | 2015-05-12 | 2015-05-12 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016212745A JP2016212745A (ja) | 2016-12-15 |
JP6381480B2 true JP6381480B2 (ja) | 2018-08-29 |
Family
ID=57277069
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015097593A Active JP6381480B2 (ja) | 2015-05-12 | 2015-05-12 | 半導体装置 |
Country Status (2)
Country | Link |
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US (1) | US20160334992A1 (ja) |
JP (1) | JP6381480B2 (ja) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP1528484S (ja) * | 2015-01-14 | 2015-07-13 | ||
JP1528936S (ja) * | 2015-01-14 | 2015-07-13 | ||
JP1528485S (ja) * | 2015-01-14 | 2015-07-13 | ||
TWD189068S (zh) * | 2017-02-17 | 2018-03-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
TWD189067S (zh) * | 2017-02-17 | 2018-03-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
TWD189066S (zh) * | 2017-02-17 | 2018-03-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
TWD189070S (zh) * | 2017-02-17 | 2018-03-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
TWD190983S (zh) * | 2017-02-17 | 2018-06-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
TWD189071S (zh) * | 2017-02-17 | 2018-03-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
TWD189069S (zh) * | 2017-02-17 | 2018-03-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
TWD189065S (zh) * | 2017-02-17 | 2018-03-11 | 三星電子股份有限公司 | 固態硬碟儲存裝置 |
US11543967B2 (en) | 2017-02-23 | 2023-01-03 | Samsung Electronics Co., Ltd. | Method for controlling BW SLA in NVME-of ethernet SSD storage systems |
JP2019057194A (ja) | 2017-09-22 | 2019-04-11 | 東芝メモリ株式会社 | メモリシステム、及び不揮発性メモリの制御方法 |
JP6942039B2 (ja) * | 2017-12-12 | 2021-09-29 | キオクシア株式会社 | 半導体記憶装置 |
US10339983B1 (en) * | 2017-12-29 | 2019-07-02 | Micron Technology, Inc. | Temperature-based memory operations |
USD869469S1 (en) * | 2018-04-09 | 2019-12-10 | Samsung Electronics Co., Ltd. | SSD storage device |
AU201815958S (en) * | 2018-04-09 | 2018-11-06 | Samsung Electronics Co Ltd | SSD Storage Device |
JP7095566B2 (ja) * | 2018-11-20 | 2022-07-05 | Tdk株式会社 | メモリコントローラ及びこれを備えるフラッシュメモリシステム |
US11042208B2 (en) * | 2019-03-08 | 2021-06-22 | Micron Technology, Inc. | Thermal leveling |
TW202137200A (zh) * | 2019-03-20 | 2021-10-01 | 日商鎧俠股份有限公司 | 半導體記憶裝置之控制方法及記憶體系統之控制方法 |
JP2020161098A (ja) * | 2019-03-20 | 2020-10-01 | キオクシア株式会社 | 半導体記憶装置 |
JP7381269B2 (ja) | 2019-09-20 | 2023-11-15 | キオクシア株式会社 | ストレージコントローラ、ストレージ装置及びストレージ装置の制御方法 |
US20210132817A1 (en) * | 2019-10-31 | 2021-05-06 | Western Digital Technologies, Inc. | Relocation of Data in Memory At Different Transfer Rates Based on Temperature |
JP2021125275A (ja) | 2020-02-03 | 2021-08-30 | キオクシア株式会社 | メモリシステム |
US11467729B2 (en) * | 2020-06-29 | 2022-10-11 | Microsoft Technology Licensing, Llc | Allocating memory and redirecting memory writes in a cloud computing system based on temperature of memory modules |
US11630002B2 (en) * | 2021-02-08 | 2023-04-18 | Macronix International Co., Ltd. | Method for sensing temperature in memory die, memory die and memory with temperature sensing function |
EP4394577A1 (en) * | 2022-11-17 | 2024-07-03 | Samsung Electronics Co., Ltd. | Method for operating non-volatile memory on basis of temperature of memory and electronic device for supporting same |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7500078B2 (en) * | 2006-08-25 | 2009-03-03 | Dell Products L.P. | Thermal control of memory modules using proximity information |
JP5554974B2 (ja) * | 2009-12-11 | 2014-07-23 | ルネサスエレクトロニクス株式会社 | データ処理用半導体装置 |
US8566538B2 (en) * | 2011-08-16 | 2013-10-22 | International Business Machines Corporation | Administering thermal distribution among memory modules with call stack frame size management |
US9513884B2 (en) * | 2011-08-16 | 2016-12-06 | International Business Machines Corporation | Thermal-aware source code compilation |
US9164898B2 (en) * | 2011-09-09 | 2015-10-20 | International Business Machines Corporation | Administering thermal distribution among memory modules of a computing system |
US9152568B1 (en) * | 2011-12-05 | 2015-10-06 | Seagate Technology Llc | Environmental-based device operation |
JP2014044527A (ja) * | 2012-08-24 | 2014-03-13 | Canon Inc | 情報処理装置及びその制御方法、並びに、そのプログラムと記憶媒体 |
JP2014098978A (ja) * | 2012-11-13 | 2014-05-29 | Sony Corp | メモリ制御装置、メモリシステム、情報処理システムおよびメモリ制御方法 |
US9342443B2 (en) * | 2013-03-15 | 2016-05-17 | Micron Technology, Inc. | Systems and methods for memory system management based on thermal information of a memory system |
US9678490B2 (en) * | 2014-06-23 | 2017-06-13 | Dell Products L.P. | Systems and methods for temperature-based performance optimization of memory devices |
US9489146B2 (en) * | 2014-12-09 | 2016-11-08 | Sandisk Technologies Llc | Memory system and method for selecting memory dies to perform memory access operations in based on memory die temperatures |
-
2015
- 2015-05-12 JP JP2015097593A patent/JP6381480B2/ja active Active
-
2016
- 2016-02-23 US US15/051,221 patent/US20160334992A1/en not_active Abandoned
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US20160334992A1 (en) | 2016-11-17 |
JP2016212745A (ja) | 2016-12-15 |
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