JP6286453B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP6286453B2 JP6286453B2 JP2015560970A JP2015560970A JP6286453B2 JP 6286453 B2 JP6286453 B2 JP 6286453B2 JP 2015560970 A JP2015560970 A JP 2015560970A JP 2015560970 A JP2015560970 A JP 2015560970A JP 6286453 B2 JP6286453 B2 JP 6286453B2
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- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
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- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 1
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- H01L29/772—Field effect transistors
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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- H01L29/76—Unipolar devices, e.g. field effect transistors
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Description
上述した製造方法に基づいてTFT基板を作製し、そのTFT基板を用いて実施例1の液晶表示装置を作製した。シリコン窒化物膜の厚さは300nmとした。シリコン窒化物膜を形成する工程における成膜条件は以下に示す通りである。
パワー密度: 0.36W/cm2
チェンバ内圧力: 1400mTorr
基板温度: 200℃
ガス流量比: SiH4:NH3:N2=1:4:20
電極間距離: 20mm
パワー密度を0.41W/cm2としたこと以外は実施例1の液晶表示装置と同様にして、実施例2の液晶表示装置を作製した。
パワー密度を0.45W/cm2としたこと以外は実施例1の液晶表示装置と同様にして、実施例3の液晶表示装置を作製した。
パワー密度を0.49W/cm2としたこと以外は実施例1の液晶表示装置と同様にして、実施例4の液晶表示装置を作製した。
パワー密度を0.28W/cm2としたこと以外は実施例1の液晶表示装置と同様にして、比較例1の液晶表示装置を作製した。
パワー密度を0.32W/cm2としたこと以外は実施例1の液晶表示装置と同様にして、比較例2の液晶表示装置を作製した。
11 基板
12g ゲート電極
14 ゲート絶縁膜
16 酸化物半導体層
17 エッチストップ層
18s ソース電極
18d ドレイン電極
22 保護層
24 有機絶縁層
32 下層電極
34 誘電体層
36 上層電極
100A、100B TFT基板
G 走査配線(ゲートバスライン)
S 信号配線(ソースバスライン)
Claims (8)
- 基板と、
前記基板に支持された薄膜トランジスタであって、酸化物半導体層を有する薄膜トランジスタと、
前記薄膜トランジスタを覆うように設けられた有機絶縁層と、
前記有機絶縁層上に設けられた下層電極と、
前記下層電極上に設けられた誘電体層と、
前記誘電体層上に設けられた上層電極であって、前記誘電体層を介して前記下層電極に対向する部分を有する上層電極と、
を備え、
前記誘電体層は、水素含有量が5.33×1021個/cm3以下のシリコン窒化物膜であり、
前記シリコン窒化物膜の比誘電率は、6.56以下である、半導体装置。 - 前記酸化物半導体層は、In−Ga−Zn−O系半導体を含む、請求項1に記載の半導体装置。
- 前記In−Ga−Zn−O系半導体は結晶質部分を含む、請求項2に記載の半導体装置。
- 前記酸化物半導体層は、In−Sn−Zn−O系半導体、In−Ga−Sn−O系半導体またはIn−Ga−O系半導体を含む、請求項1に記載の半導体装置。
- 前記上層電極および前記下層電極のそれぞれは、透明な導電材料から形成されている、請求項1から4のいずれかに記載の半導体装置。
- 基板を用意する工程(a)と、
前記基板上に、酸化物半導体層を有する薄膜トランジスタを形成する工程(b)と、
前記薄膜トランジスタを覆うように有機絶縁層を形成する工程(c)と、
前記有機絶縁層上に下層電極を形成する工程(d)と、
前記下層電極上に誘電体層を形成する工程(e)と、
前記誘電体層上に上層電極を形成する工程(f)と、
を包含し、
前記工程(e)は、前記誘電体層としてシリコン窒化物膜を形成する工程であり、前記シリコン窒化物膜の水素含有量が5.33×1021個/cm3以下となるような成膜条件で実行され、
前記工程(e)は、前記シリコン窒化物膜の比誘電率が6.56以下となるような成膜条件で実行される、半導体装置の製造方法。 - 基板を用意する工程(a)と、
前記基板上に、酸化物半導体層を有する薄膜トランジスタを形成する工程(b)と、
前記薄膜トランジスタを覆うように有機絶縁層を形成する工程(c)と、
前記有機絶縁層上に下層電極を形成する工程(d)と、
前記下層電極上に誘電体層を形成する工程(e)と、
前記誘電体層上に上層電極を形成する工程(f)と、
を包含し、
前記工程(e)は、前記誘電体層としてシリコン窒化物膜を形成する工程であり、前記シリコン窒化物膜の水素含有量が5.33×10 21 個/cm 3 以下となるような成膜条件で実行され、
前記工程(e)は、プラズマCVD法により、SiH4と、NH3および/またはN2とを含む混合ガスを用いて、チェンバ内圧力が1200mTorr以上1500mTorr以下、基板温度が180℃以上220℃以下、電極間距離が18mm以上25mm以下、前記混合ガスの全流量に対するSiH4の流量比が3%以上5%以下、パワー密度が0.36W/cm2以上の成膜条件で実行される、半導体装置の製造方法。 - 前記工程(e)は、0.49W/cm2以下のパワー密度で実行される、請求項7に記載の半導体装置の製造方法。
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CN105607365A (zh) * | 2015-12-31 | 2016-05-25 | 深圳市华星光电技术有限公司 | 一种coa基板及其制作方法 |
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JP2006294750A (ja) * | 2005-04-07 | 2006-10-26 | Toshiba Corp | 薄膜堆積装置及び方法 |
US20090098741A1 (en) * | 2007-10-15 | 2009-04-16 | Asm Japan K.K. | Method for forming ultra-thin boron-containing nitride films and related apparatus |
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