JP6167825B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6167825B2 JP6167825B2 JP2013209929A JP2013209929A JP6167825B2 JP 6167825 B2 JP6167825 B2 JP 6167825B2 JP 2013209929 A JP2013209929 A JP 2013209929A JP 2013209929 A JP2013209929 A JP 2013209929A JP 6167825 B2 JP6167825 B2 JP 6167825B2
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- semiconductor element
- semiconductor device
- heat sink
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- semiconductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
図1は、この発明の実施の形態1の半導体装置の断面構造模式図である。図1において、半導体装置100は、半導体素子2、リードフレーム3、金属部であるヒートシンク4、ボンディングワイヤ5、絶縁層6、金属箔7、封止樹脂8、接合材9を備える。
SiC製半導体素子2を一方の面に接合し、他方の面に絶縁層を設けたヒートシンク4にリードフレーム3を接合し、全体をエポキシ樹脂で封止したモールド型半導体装置を作製した。表1に試作・評価したヒートシンクのサイズと信頼性との関係を示す。SiC製半導体素子2のサイズはCL及びCWで示され、厚みは0.3mmとし、ヒートシンク4のサイズは表1に示され、厚みは3mmとした。ここで、ヒートシンク4の半導体素子搭載面4aのサイズはL1及びW1で示され、張出部4bのサイズはL2及びW4で示され、半導体素子搭載面4aにおける張出部4bの設置位置はL3で示されている。また、張出部4cのサイズはW2及びL4で示され、半導体素子搭載面4aにおける張出部4cの設置位置はW3で示されている(図5参照)。ヒートシンク4とリードフレーム3とは放熱性を考えて銅とした。ヒートシンク4上には半導体素子2として、MOSFETとショットキーバリアダイオード(SBD:Schottky Barrier Diode)の2種を搭載した。
Claims (6)
- 半導体素子と、
前記半導体素子の接合面と同一形状であって前記半導体素子を搭載する搭載面と、前記搭載面の辺部と接する領域の長さが前記辺部の長さよりも短く張り出し長さが前記半導体素子の辺方向の長さ以下で前記辺部から張り出した張出部とを有し、それぞれの前記辺部の端部に前記張出部がない金属部と、
前記張出部と別部材であり、前記張出部と電気的に接続するリードフレームと、
前記張出部を含み、前記半導体素子と前記金属部と前記リードフレームとを封止する封止樹脂と、
を備えたことを特徴とする半導体装置。 - 前記張出部は、多角形であることを特徴とする請求項1に記載の半導体装置。
- 前記張出部は、円弧状であることを特徴とする請求項1に記載の半導体装置。
- 前記搭載面は、多角形であることを特徴とする請求項1〜請求項3のいずれか1項に記載の半導体装置。
- 前記張出部の前記辺部と接する領域の長さは、2mm以上であり、かつ、前記張出部が接する前記辺部の一方の前記端部から前記一方の前記端部側の前記張出部の端部までの長さは、前記辺部の長さの0.02倍以上であることを特徴とする請求項1〜請求項4のいずれか1項に記載の半導体装置。
- 前記張出部の前記辺部からの張り出し長さは、2mm以上であることを特徴とする請求項1〜請求項5のいずれか1項に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2013209929A JP6167825B2 (ja) | 2013-10-07 | 2013-10-07 | 半導体装置 |
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JP2013209929A JP6167825B2 (ja) | 2013-10-07 | 2013-10-07 | 半導体装置 |
Publications (2)
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JP2015076426A JP2015076426A (ja) | 2015-04-20 |
JP6167825B2 true JP6167825B2 (ja) | 2017-07-26 |
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JP2013209929A Expired - Fee Related JP6167825B2 (ja) | 2013-10-07 | 2013-10-07 | 半導体装置 |
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Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP6430422B2 (ja) * | 2016-02-29 | 2018-11-28 | 株式会社東芝 | 半導体装置 |
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JP3924481B2 (ja) * | 2002-03-08 | 2007-06-06 | ローム株式会社 | 半導体チップを使用した半導体装置 |
JP4321742B2 (ja) * | 2002-03-26 | 2009-08-26 | ローム株式会社 | 半導体チップを使用した半導体装置 |
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