JP6143190B2 - ランプ信号発生回路及びcmosイメージセンサ - Google Patents
ランプ信号発生回路及びcmosイメージセンサ Download PDFInfo
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- JP6143190B2 JP6143190B2 JP2013544302A JP2013544302A JP6143190B2 JP 6143190 B2 JP6143190 B2 JP 6143190B2 JP 2013544302 A JP2013544302 A JP 2013544302A JP 2013544302 A JP2013544302 A JP 2013544302A JP 6143190 B2 JP6143190 B2 JP 6143190B2
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- ramp signal
- generation circuit
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- signal generation
- unit circuits
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- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 title claims description 41
- 239000003990 capacitor Substances 0.000 claims description 52
- 238000010586 diagram Methods 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 239000006185 dispersion Substances 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
- H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
- H03K4/90—Linearisation of ramp; Synchronisation of pulses
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K4/00—Generating pulses having essentially a finite slope or stepped portions
- H03K4/02—Generating pulses having essentially a finite slope or stepped portions having stepped portions, e.g. staircase waveform
- H03K4/026—Generating pulses having essentially a finite slope or stepped portions having stepped portions, e.g. staircase waveform using digital techniques
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0634—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale
- H03M1/0643—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the spatial domain
- H03M1/0646—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by averaging out the errors, e.g. using sliding scale in the spatial domain by analogue redistribution among corresponding nodes of adjacent cells, e.g. using an impedance network connected among all comparator outputs in a flash converter
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/74—Circuitry for scanning or addressing the pixel array
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/123—Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/56—Input signal compared with linear ramp
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Solid State Image Pick-Up Elements (AREA)
Description
Claims (5)
- 一端の電位が固定されたキャパシタと、前記キャパシタの他端に接続される電流源と、を有する複数の単位回路を備え、
前記複数の単位回路が有する前記キャパシタの前記他端の各々が互いに配線部材によって接続されており、
前記複数の単位回路がそれぞれランプ信号を発生する、ランプ信号発生回路。 - 前記キャパシタの前記他端を基準電位線に接続するためのスイッチをさらに備える、請求項1に記載のランプ信号発生回路。
- 前記複数の単位回路が有する前記キャパシタの容量値は全て等しくなるように設計されており、
前記複数の単位回路が有する前記電流源が流す電流の大きさは全て等しくなるように設計されている、請求項1または2に記載のランプ信号発生回路。 - 複数行複数列の2次元に配列された画素を有する画素アレイと、
請求項1〜3のいずれか一項に記載のランプ信号発生回路を有する列並列ADCと、
を備え、
前記ランプ信号発生回路が備える複数の単位回路のそれぞれが、前記画素アレイの各列に対応して設けられている、CMOSイメージセンサ。 - 前記列並列ADCは、前記画素アレイの各列の画素に接続される列ADCを備え、
前記列ADCは、
前記ランプ信号発生回路が備える前記単位回路と、
前記画素アレイの各列の画素の出力と前記単位回路の出力とを比較する電圧比較器と、
前記電圧比較器の出力が変化するまでの時間を計数するカウンタと、
を備える請求項4に記載のCMOSイメージセンサ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011250777 | 2011-11-16 | ||
JP2011250777 | 2011-11-16 | ||
PCT/JP2012/079535 WO2013073585A1 (ja) | 2011-11-16 | 2012-11-14 | ランプ信号発生回路及びcmosイメージセンサ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2013073585A1 JPWO2013073585A1 (ja) | 2015-04-02 |
JP6143190B2 true JP6143190B2 (ja) | 2017-06-07 |
Family
ID=48429640
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013544302A Active JP6143190B2 (ja) | 2011-11-16 | 2012-11-14 | ランプ信号発生回路及びcmosイメージセンサ |
Country Status (5)
Country | Link |
---|---|
US (1) | US9270258B2 (ja) |
EP (1) | EP2782258A4 (ja) |
JP (1) | JP6143190B2 (ja) |
KR (1) | KR101970942B1 (ja) |
WO (1) | WO2013073585A1 (ja) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6218428B2 (ja) * | 2013-05-08 | 2017-10-25 | オリンパス株式会社 | 固体撮像装置 |
US20170132466A1 (en) | 2014-09-30 | 2017-05-11 | Qualcomm Incorporated | Low-power iris scan initialization |
US10728450B2 (en) | 2014-09-30 | 2020-07-28 | Qualcomm Incorporated | Event based computer vision computation |
US10515284B2 (en) | 2014-09-30 | 2019-12-24 | Qualcomm Incorporated | Single-processor computer vision hardware control and application execution |
US9986179B2 (en) | 2014-09-30 | 2018-05-29 | Qualcomm Incorporated | Sensor architecture using frame-based and event-based hybrid scheme |
US9554100B2 (en) | 2014-09-30 | 2017-01-24 | Qualcomm Incorporated | Low-power always-on face detection, tracking, recognition and/or analysis using events-based vision sensor |
US9762834B2 (en) | 2014-09-30 | 2017-09-12 | Qualcomm Incorporated | Configurable hardware for computing computer vision features |
US9940533B2 (en) | 2014-09-30 | 2018-04-10 | Qualcomm Incorporated | Scanning window for isolating pixel values in hardware for computer vision operations |
US9923004B2 (en) | 2014-09-30 | 2018-03-20 | Qualcomm Incorporated | Hardware acceleration of computer vision feature detection |
US9838635B2 (en) | 2014-09-30 | 2017-12-05 | Qualcomm Incorporated | Feature computation in a sensor element array |
WO2016121523A1 (ja) * | 2015-01-30 | 2016-08-04 | ソニー株式会社 | 固体撮像素子および制御方法、並びに電子機器 |
US9704056B2 (en) | 2015-04-02 | 2017-07-11 | Qualcomm Incorporated | Computing hierarchical computations for computer vision calculations |
US9712146B2 (en) * | 2015-09-18 | 2017-07-18 | University Of Notre Dame Du Lac | Mixed signal processors |
US10984235B2 (en) | 2016-12-16 | 2021-04-20 | Qualcomm Incorporated | Low power data generation for iris-related detection and authentication |
US10614332B2 (en) | 2016-12-16 | 2020-04-07 | Qualcomm Incorportaed | Light source modulation for iris size adjustment |
JP2018148528A (ja) * | 2017-03-09 | 2018-09-20 | ソニーセミコンダクタソリューションズ株式会社 | 固体撮像装置および電子機器 |
KR102507188B1 (ko) | 2018-02-06 | 2023-03-09 | 에스케이하이닉스 주식회사 | 램프 신호 발생 장치 및 그를 이용한 씨모스 이미지 센서 |
KR102510671B1 (ko) * | 2018-09-21 | 2023-03-20 | 에스케이하이닉스 주식회사 | 램프신호 생성기 및 이를 포함하는 이미지 센서 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7230561B2 (en) * | 2005-01-27 | 2007-06-12 | Micron Technology, Inc. | Programmable integrating ramp generator and method of operating the same |
JP4654857B2 (ja) | 2005-09-26 | 2011-03-23 | ソニー株式会社 | Da変換装置、ad変換装置、半導体装置 |
JP3848358B1 (ja) * | 2006-02-15 | 2006-11-22 | 株式会社日出ハイテック | マルチチャネル駆動回路 |
JP4802767B2 (ja) * | 2006-03-06 | 2011-10-26 | ソニー株式会社 | アナログ−デジタル変換装置と、それを用いた固体撮像装置とその駆動方法 |
JP2009130828A (ja) | 2007-11-27 | 2009-06-11 | Konica Minolta Business Technologies Inc | 固体撮像装置 |
JP5178458B2 (ja) | 2008-10-31 | 2013-04-10 | キヤノン株式会社 | 固体撮像装置、撮像システム、および、固体撮像装置の駆動方法 |
KR101198249B1 (ko) * | 2010-07-07 | 2012-11-07 | 에스케이하이닉스 주식회사 | 이미지센서의 컬럼 회로 및 픽셀 비닝 회로 |
-
2012
- 2012-11-14 EP EP12850707.6A patent/EP2782258A4/en not_active Withdrawn
- 2012-11-14 JP JP2013544302A patent/JP6143190B2/ja active Active
- 2012-11-14 KR KR1020147014172A patent/KR101970942B1/ko active IP Right Grant
- 2012-11-14 US US14/358,970 patent/US9270258B2/en active Active
- 2012-11-14 WO PCT/JP2012/079535 patent/WO2013073585A1/ja active Application Filing
Also Published As
Publication number | Publication date |
---|---|
EP2782258A4 (en) | 2015-08-12 |
WO2013073585A1 (ja) | 2013-05-23 |
US20140319325A1 (en) | 2014-10-30 |
EP2782258A1 (en) | 2014-09-24 |
KR20140093246A (ko) | 2014-07-25 |
US9270258B2 (en) | 2016-02-23 |
JPWO2013073585A1 (ja) | 2015-04-02 |
KR101970942B1 (ko) | 2019-04-23 |
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