JP6140207B2 - ゴム基板上での高パフォーマンスエレクトロニクスのための伸縮性単結晶シリコン - Google Patents
ゴム基板上での高パフォーマンスエレクトロニクスのための伸縮性単結晶シリコン Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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Description
ここで、Eはヤング率、L0は平衡長さ、ΔLは加えた応力下での長さ変化、Fは加えた力およびAは力が加えられた面積である。ヤング率は、以下の式によりラメ定数でも表すことができる。
ここで、λおよびμはラメ定数である。高いヤング率(すなわち「高い弾性率」)および低いヤング率(すなわち「低い弾性率」)が、所与の材料、層またはデバイスにおけるヤング率の大きさの相対的記述子である。本発明では、高いヤング率が低いヤング率よりも用途によって好ましくは約10倍、他の用途ではより好ましくは約100倍、さらに他の用途ではより一層好ましくは1000倍大きい。
[0110]本発明者らは、マイクロスケールで周期的な波状ジオメトリ形状の構造をもったサブミクロン単結晶素子からなる伸縮性シリコンを生成した。弾性基板により支持されると、この「波状」シリコンは、シリコンを損傷させることなく大きな歪みレベルまで可逆的に伸縮可能である。波の振幅および周期がこの変形を吸収するように変化し、それによってシリコン自体の相当な歪みを回避する。シリコンと直接一体化された誘電体、ドーパントのパターン、電極、およびその他の素子により、同様の大きな歪みレベルまで伸縮可能な、完全に形成された、高性能「波状」金属酸化物半導体電界効果トランジスタ、pnダイオード、および他の電子回路用デバイスが得られる。
ここで、
が座屈の臨界値、座屈歪みεpreは前歪みのレベル、λ0は波長、A0は振幅である。ポアソン比がν、ヤング率がE、添え字がSiまたはPDMSの特性を示している。Siの厚さはhである。この処理は作製された波状構造の多くの特徴を捉えている。例えば、図11のDは、前歪み値が固定されていれば(これらのデータについて〜0.9%)、波長および振幅がともにSi厚に線形的に依存することを示している。波長は前歪みのレベルに依存しない(図12)。さらに、SiおよびPDMSの文献値(28,29)を用いた機械的特性の計算(ESi=130GPa、EPDMS=2MPa、νSi=0.27、νPDMS=0.48)により、測定値の〜10%(最大偏差)以内の振幅および波長が得られる。(原子間力顕微鏡(AFM)により測定された表面距離から決定された)その実際の長さに対する(波長から決定された)リボンの有効長の比から算出された「リボン歪み」により、〜3.5%までの前歪みについて、PDMSにおける前歪みとほぼ等しい値が得られる。Si自体におけるピーク(すなわち最大)歪み(これを本発明者らはSi歪みと呼ぶ)は、波が存在し、且つ臨界歪み(ここで考察しているケースについて〜0.03%)が曲げに関連したピーク歪みと比較して小さい歪みである場合に、κを曲率としたときのκh/2に応じた波の極値でのリボンの厚さおよび曲率半径から推定可能である。図11のデータについて、ピークSi歪みは〜0.36(±0.08%)であり、リボン歪みの1/2より小さい。このSi歪みは全てのリボンの厚さ、任意の前歪み(図13)について同じである。結果得られるピークSi歪みは実質的にリボン歪みより小さいという機械的な利点が、伸縮性を達成するために非常に重要である。座屈薄膜は、(ここで述べたように、予備成形され、転写された単結晶素子およびデバイスとは対照的に)PDMS上に蒸着またはスピンキャスティングされた金属および誘電体においても観察されている。
この伸張/圧縮の非対称性が、例えば、圧縮中に形成される、PDMSとSiの***した領域の間のわずかな可逆的分離から生じうる。このケースについて、この非対称的挙動を示さないシステムと同様に、波の振幅Aが、伸張および圧縮のいずれについても、低めの歪み(<10〜15%)で有効な1つの式で与えられる。
ここで、A0は初期の座屈状態に対応する値である。図14Aに示したように、これらの式によりパラメータの近似がなくとも実験と量的な一致が得られる。伸張/圧縮歪みを吸収する波性が存続すると、ピークSi歪みが曲げ項に支配され、以下の式で与えられる。
これは、図14Bの曲率から測定された歪みとよく一致する(図18も参照)。このような解析式は、システムがSiを破壊せずに持ちこたえられるような加える歪みの範囲を規定するのに役立つ。0.9%の前歪みについて、Si破損歪みが(圧縮または伸張のいずれかに対して)〜2%だとすると、この範囲は−27%〜−%29である。前歪みのレベルを制御して、この歪みの範囲(すなわち、およそ30%)により所望の圧縮および伸張変形性の度合いのバランスをとる。例えば、3.5%の前歪み(本発明者らが考察する最大値)により−24%〜5.5%の範囲が得られる。このような計算は、変形の究極レベルでも加えた歪みがリボン歪みに等しいことを仮定している。実験的には、リボン両端部外側およびリボン間のPDMSが歪みを吸収することができるため、これらの推定を上回ることが多く、加えた歪みはリボンに完全には移送されない。
材料および方法
として算出可能である。波状Siのリボン歪みは、
を用いて算出した。ピークシリコン歪みは波の山および谷で発生し、
を用いて算出可能である。ここでhはSiの厚さ、Rcは山または谷での曲率半径であり、
により与えられ、ここでnは整数でありy”はyのxについての二次導関数である。この正弦関数近似を実際の形状に用いると、シリコンピーク歪みは
により与えられる。図12は、前歪みを生じさせる温度の関数として波長を示す。図13に示すように、波の振幅および波長が厚みに線形依存するので(A〜h、λ〜h)、ピーク歪みはSi厚さhに依存しない。図15は、波状構造がリボン間のPDMS表面のレベルに対してほぼ等しい上方および下方への変位を含むことを示す。ここで考察するシステムについては、シリコンリボン歪みが加えた歪みに等しい(図16)。
この式はA0/λ0<<1について漸近解
を有する。小さい圧縮歪みでは、この式が式(3)に縮小される。これはSiをPDMSから分離不可能であり、システムが座屈機構に従う場合にも適用される。ピークシリコン歪みは以下の式で与えられる。
比較的小さい圧縮歪みについては、この式が式(4)とほぼ同じになる。ピークシリコン歪みは、比較的小さい加える歪みの限界において、波の振幅と同様、蛇腹および座屈モデルのいずれについても類似の関数形式を有する。図18は上記式により計算され、式(4)に従うピーク歪みを示している。
[0125]サブミクロン範囲の厚さおよび明瞭な「波状」および/または「座屈」ジオメトリを持った単結晶GaAsリボンが作製される。得られる構造は、エラストマー基板の表面上または基板中に埋め込まれて、GaAs自体のものより10倍超大きい>10%の歪みまでの可逆的な伸張性および圧縮性を示す。これらの構造を有するGaAsリボン上にオームおよびショットキー接点を組み込むことにより、高パフォーマンス伸縮性電子デバイス(例えば金属−半導体電界効果トランジスタ)が達成可能である。この種の電子システムは、単独でも、あるいは同様に設計されたシリコン、誘電体および/または金属材料と組み合わせて、伸縮性、極度の柔軟性または複雑な曲線形状の表面に合致する能力と共に高周波動作が求められる用途向けの回路を形成するのに使用可能である。
[0138]本発明は、互いに直交する方向を含む複数の方向に伸張、圧縮および/または屈曲可能な伸縮性半導体および伸縮性電子デバイスを提供する。本発明のこの態様の伸縮性半導体および伸縮性電子デバイスは、複数の方向に伸張および/または圧縮される際に良好な機械的および電子的特性および/またはデバイスパフォーマンスを示す。
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Claims (13)
- 支持表面を有するフレキシブル基板と、
前記支持表面によって支持される半導体構造であって、前記支持表面に沿った平面における少なくとも2つの異なる方向において、前記平面に対して少なくとも2つの空間次元において変動する、空間的に変動する外形プロファイルを有する、半導体構造と、
を備え、
少なくとも2つの空間次元において変動する前記外形プロファイルが、複数の方向における伸張及び/又は圧縮に適合する、二次元伸縮性電子デバイス。 - 前記平面において、前記2つの異なる空間次元が互いに直交する、請求項1に記載の二次元伸縮性電子デバイス。
- 前記フレキシブル基板に直交する方向から見て、前記空間的に変動する外形プロファイルが、ヘリンボーン波状形態又はランダム波状形態である、請求項1に記載の二次元伸縮性電子デバイス。
- 前記半導体構造が前記支持表面に連続的に結合されている、請求項1に記載の二次元伸縮性電子デバイス。
- 前記半導体構造が前記支持表面に不連続的に結合されている、請求項1に記載の二次元伸縮性電子デバイス。
- 前記半導体構造が、前記支持表面から物理的に離間された座屈領域を備える、請求項5に記載の二次元伸縮性電子デバイス。
- 前記支持表面及び前記半導体構造上に位置して前記座屈領域を埋め込む封入層を更に備える、請求項6に記載の二次元伸縮性電子デバイス。
- 前記半導体構造を少なくとも部分的に埋め込む封入層を更に備える、請求項1に記載の二次元伸縮性電子デバイス。
- 二次元伸縮性電子デバイスを製造する方法であって、
表面を有する印刷可能な半導体構造を設けるステップと、
外表面を有し、第1及び第2の軸に沿った膨張状態で前歪みが加えられた弾性基板を設けるステップと、
前記印刷可能な半導体構造を、前記前歪みが加えられた弾性基板の前記外表面に印刷するステップであり、前記印刷可能な半導体構造の少なくとも一部が、前記前歪みが加えられた弾性基板に結合される、ステップと、
前記前歪みが加えられた弾性基板を少なくとも部分的に弛緩状態へと弛緩させ、前記前歪みが加えられた弾性基板の弛緩が、前記第1及び第2の軸に沿って前記半導体構造を湾曲する力を生成して、前記外表面に対して少なくとも2つの空間次元において変動する、空間的に変動する半導体構造の外形プロファイルを生成するステップと、
を備える、方法。 - 前記前歪みが加えられた弾性基板が複数の軸に沿って膨張される、請求項9に記載の方法。
- 前記外表面に沿った平面において、前記第1及び第2の軸が互いに直交する、請求項9に記載の方法。
- 前記前歪みが熱的前歪みによって与えられる、請求項9に記載の方法。
- 前記湾曲された半導体構造を封入するステップを更に備える、請求項9に記載の方法。
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KR101207442B1 (ko) * | 2003-12-15 | 2012-12-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 박막 집적회로장치의 제조방법, 비접촉형 박막 집적회로장치 및 그 제조 방법, 비접촉형 박막 집적회로 장치를 가지는 아이디 태그 및 동전 |
JP5110766B2 (ja) * | 2003-12-15 | 2012-12-26 | 株式会社半導体エネルギー研究所 | 薄膜集積回路装置の作製方法及び非接触型薄膜集積回路装置の作製方法 |
JP4841807B2 (ja) * | 2004-02-27 | 2011-12-21 | 株式会社半導体エネルギー研究所 | 薄膜集積回路及び薄型半導体装置 |
CN101427182B (zh) * | 2004-04-27 | 2011-10-19 | 伊利诺伊大学评议会 | 用于软光刻法的复合构图设备 |
JP2008502151A (ja) * | 2004-06-04 | 2008-01-24 | ザ ボード オブ トラスティーズ オブ ザ ユニヴァーシティー オブ イリノイ | 印刷可能半導体素子を製造して組み立てるための方法及びデバイス |
TWI427802B (zh) * | 2005-06-02 | 2014-02-21 | Univ Illinois | 可印刷半導體結構及製造和組合之相關方法 |
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TW201216641A (en) | 2012-04-16 |
JP5851457B2 (ja) | 2016-02-03 |
KR20130133733A (ko) | 2013-12-09 |
KR20140107158A (ko) | 2014-09-04 |
JP2019004151A (ja) | 2019-01-10 |
TWI336491B (en) | 2011-01-21 |
TW201519287A (zh) | 2015-05-16 |
TWI533459B (zh) | 2016-05-11 |
JP6574157B2 (ja) | 2019-09-11 |
KR20070100617A (ko) | 2007-10-11 |
JP2015133510A (ja) | 2015-07-23 |
MY163588A (en) | 2017-09-29 |
MY143492A (en) | 2011-05-31 |
JP2014017495A (ja) | 2014-01-30 |
TWI489523B (zh) | 2015-06-21 |
TWI466488B (zh) | 2014-12-21 |
MY152238A (en) | 2014-09-15 |
JP2017038064A (ja) | 2017-02-16 |
TW200739681A (en) | 2007-10-16 |
TW201428984A (zh) | 2014-07-16 |
KR20150044865A (ko) | 2015-04-27 |
KR20170077097A (ko) | 2017-07-05 |
TWI570776B (zh) | 2017-02-11 |
TWI427802B (zh) | 2014-02-21 |
JP2017103459A (ja) | 2017-06-08 |
TW201042951A (en) | 2010-12-01 |
JP2007281406A (ja) | 2007-10-25 |
TW200721517A (en) | 2007-06-01 |
JP6377689B2 (ja) | 2018-08-22 |
TW201717261A (zh) | 2017-05-16 |
MY151572A (en) | 2014-06-13 |
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