JP6030905B2 - 発光半導体を相互接続するためのオーバーレイ回路構造 - Google Patents
発光半導体を相互接続するためのオーバーレイ回路構造 Download PDFInfo
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- JP6030905B2 JP6030905B2 JP2012215555A JP2012215555A JP6030905B2 JP 6030905 B2 JP6030905 B2 JP 6030905B2 JP 2012215555 A JP2012215555 A JP 2012215555A JP 2012215555 A JP2012215555 A JP 2012215555A JP 6030905 B2 JP6030905 B2 JP 6030905B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Led Device Packages (AREA)
Description
12 LESチップ
14 ヒートシンク
16 はんだ/銀エポキシ層
18 柔軟な相互配線構造
20 表面
22 金属相互配線
24 柔軟な膜
26 ビア
28 接続パッド
30 開口部
32 能動領域
34 反射膜
36 追加層
38 封止剤
Claims (7)
- ヒートシンク(14)と、
前記ヒートシンク(14)上にマウントされ、前記ヒートシンク(14)に電気的に接続されたLESチップ(12)のアレイであって、各LESチップ(12)は、表面および裏面を備え、前記表面が受け取った電力に応じて光を放出するように構成された発光領域(32)を含み且つ前記表面および前記裏面のうちの少なくとも一方がその上に接続パッド(28)を含む、LESチップ(12)のアレイと、
前記LESチップ(12)のアレイの制御された動作を行うために各LESチップ(12)上に設置され且つ電気的に接続された柔軟な相互配線構造(18)であって、前記柔軟な相互配線構造(18)が、
前記ヒートシンク(14)の形状に合うように構成された柔軟な誘電体膜(24)と、
前記柔軟な誘電体膜(24)上に形成された金属相互配線構造(22)であり、前記金属相互配線構造(22)が前記LESチップ(12)の前記接続パッド(28)への直接の金属接続部および電気的接続部を形成するように前記柔軟な誘電体膜(24)を貫通して形成されたビア(26)を通って延びる、金属相互配線構造(22)と、
を備えた、柔軟な相互配線構造(18)と、
を備え、
前記ヒートシンク(14)は、前記ヒートシンク(14)上にマウントされた前記LESチップ(12)のアレイが360度の領域全体にわたって光を放出するように設置されるように円形の形状を有するように作られる、
発光半導体(LES)デバイス(10)。 - 前記金属相互配線構造(22)が、各個々のLESチップの前記発光領域(32)の位置に対応する開口部(30)を含むようにパターニングされる、請求項1に記載のLESデバイス(10)。
- 前記ヒートシンク(14)が、前記LESデバイス(10)中のアノード接続部またはカソード接続部として機能するように構成される、請求項1に記載のLESデバイス(10)。
- 前記柔軟な誘電体膜(24)が、各個々のLESチップの前記発光領域(32)の位置に対応して前記柔軟な誘電体膜(24)中に形成された複数の開口部(30)を含む、請求項1に記載のLESデバイス(10)。
- 前記柔軟な誘電体膜(24)は、各個々のLESチップの前記発光領域(32)から放出された光が通過することを可能にするように構成された透明膜を含む、請求項1に記載のLESデバイス(10)。
- 前記接続パッド(28)が、前記LESチップ(12)の前記表面上に形成され、前記柔軟な相互配線構造(18)が、前記LESチップ(12)の前記表面上に設置される、請求項1に記載のLESデバイス(10)。
- 前記金属相互配線構造(22)が、外側表面上にコーティングされた反射膜(34)を備え、前記反射膜(34)が、前記LESデバイス(10)の反射を最大にし且つ光学的損失を減少させるために前記金属相互配線構造(22)のスペクトル反射率を増加させるように構成される、請求項1に記載のLESデバイス(10)。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012215555A JP6030905B2 (ja) | 2012-09-28 | 2012-09-28 | 発光半導体を相互接続するためのオーバーレイ回路構造 |
Applications Claiming Priority (1)
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---|---|---|---|
JP2012215555A JP6030905B2 (ja) | 2012-09-28 | 2012-09-28 | 発光半導体を相互接続するためのオーバーレイ回路構造 |
Related Child Applications (1)
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JP2016151633A Division JP6541629B2 (ja) | 2016-08-02 | 2016-08-02 | 発光半導体を相互接続するためのオーバーレイ回路構造 |
Publications (3)
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JP2014072271A JP2014072271A (ja) | 2014-04-21 |
JP2014072271A5 JP2014072271A5 (ja) | 2015-11-05 |
JP6030905B2 true JP6030905B2 (ja) | 2016-11-24 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9526829B2 (en) | 2001-10-18 | 2016-12-27 | Bayer Healthcare Llc | Flow based pressure isolation and fluid delivery system including flow based pressure isolation and flow initiating mechanism |
US9782576B2 (en) | 2004-10-22 | 2017-10-10 | Carefusion 303, Inc. | Fluid control device with valve and methods of use |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
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DE19922176C2 (de) * | 1999-05-12 | 2001-11-15 | Osram Opto Semiconductors Gmbh | Oberflächenmontierte LED-Mehrfachanordnung und deren Verwendung in einer Beleuchtungseinrichtung |
MXPA06011114A (es) * | 2004-03-29 | 2007-01-25 | Articulated Technologies Llc | Hoja luminosa fabricada de rodillo a rodillo y dispositivos encapsulados de circuito semiconductor. |
JP5162979B2 (ja) * | 2007-06-28 | 2013-03-13 | 日亜化学工業株式会社 | 発光装置 |
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2012
- 2012-09-28 JP JP2012215555A patent/JP6030905B2/ja active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9526829B2 (en) | 2001-10-18 | 2016-12-27 | Bayer Healthcare Llc | Flow based pressure isolation and fluid delivery system including flow based pressure isolation and flow initiating mechanism |
US9782576B2 (en) | 2004-10-22 | 2017-10-10 | Carefusion 303, Inc. | Fluid control device with valve and methods of use |
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JP2014072271A (ja) | 2014-04-21 |
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