JP5696302B2 - Metal-clad laminate for interposer and semiconductor package using the same - Google Patents
Metal-clad laminate for interposer and semiconductor package using the same Download PDFInfo
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- JP5696302B2 JP5696302B2 JP2009221476A JP2009221476A JP5696302B2 JP 5696302 B2 JP5696302 B2 JP 5696302B2 JP 2009221476 A JP2009221476 A JP 2009221476A JP 2009221476 A JP2009221476 A JP 2009221476A JP 5696302 B2 JP5696302 B2 JP 5696302B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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Description
本発明は、インターポーザ用の金属張積層板とそれを用いた半導体パッケージに関するものである。 The present invention relates to a metal-clad laminate for an interposer and a semiconductor package using the same.
デジタルカメラや携帯電話等のモバイル機器を代表とする最近の電子機器では小型化、薄型化、高性能化のニーズがますます高まっている。これに伴い、搭載される半導体パッケージにもさらなる薄型化や微細配線化が要求されている。 In recent electronic devices represented by mobile devices such as digital cameras and mobile phones, there is an increasing need for downsizing, thinning, and high performance. Along with this, further thinning and fine wiring are required for the semiconductor package to be mounted.
このような背景において、ＬＳＩ等の半導体パッケージは挿入実装から表面実装へ、周辺端子からエリア端子へ、そして単独チップから複数チップ積層へと発展し、高密度実装を可能とするＦＢＧＡ（Fine Ball Grid Array）、ＣＳＰ（Chip Size Package）等に移行してきている。 Against this background, semiconductor packages such as LSIs have evolved from insertion mounting to surface mounting, from peripheral terminals to area terminals, and from single chips to multi-chip stacks, enabling FBGA (Fine Ball Grid) that enables high-density mounting. Array), CSP (Chip Size Package), etc.
このような表面実装型の半導体パッケージは、例えば、電子回路を構成するインターポーザの片面に半導体チップを搭載し、その反対側の面に半田ボールを接続して構成される。インターポーザにはガラスエポキシ樹脂等のリジッド基板やポリイミド樹脂等のフレキシブル基板等が用いられている（特許文献１、２参照）。 Such a surface-mount type semiconductor package is configured, for example, by mounting a semiconductor chip on one side of an interposer constituting an electronic circuit and connecting a solder ball on the opposite side. As the interposer, a rigid substrate such as a glass epoxy resin or a flexible substrate such as a polyimide resin is used (see Patent Documents 1 and 2).
近年では、上記したような半導体パッケージの薄型化に伴い、インターポーザの厚みも例えば０．２ｍｍ以下と薄くなってきており、そのため剛性が低下して半導体パッケージの反りが問題となっている。半導体パッケージの反りは、マザーボード等の回路基板への実装時に接続不良が発生する要因となる。 In recent years, with the reduction in thickness of the semiconductor package as described above, the thickness of the interposer has also been reduced to, for example, 0.2 mm or less. Therefore, the rigidity is lowered and the warpage of the semiconductor package becomes a problem. The warpage of the semiconductor package becomes a cause of poor connection when mounted on a circuit board such as a mother board.
この半導体パッケージの反りを低減するために、従来、封止樹脂やインターポーザにおいて各種のアプローチが行われてきたが、半導体パッケージの薄型化に伴い封止樹脂も厚みが小さくなり、封止樹脂からのアプローチだけでは実装時の反りの抑制に一定の限界がある。 In order to reduce the warpage of the semiconductor package, various approaches have been conventionally performed in the sealing resin and the interposer. However, as the semiconductor package becomes thinner, the thickness of the sealing resin also decreases. The approach alone has a certain limit in suppressing warping during mounting.
しかしながら、薄型化している近年の半導体パッケージにおいては、その反りの抑制において従来提案されている方法は必ずしも満足できるものではない。特に、常温時とリフロー等の加熱時の両方において半導体パッケージの反りを適切に抑制することは困難であった。 However, in recent semiconductor packages that have been made thinner, the conventionally proposed methods are not always satisfactory in suppressing the warpage. In particular, it has been difficult to appropriately suppress the warpage of the semiconductor package both at room temperature and during heating such as reflow.
すなわち、封止成形後、常温では半導体チップよりもインターポーザの収縮が大きいため、インターポーザ側が凹むように反りが発生する。一方、リフロー等の加熱時には、片面フルモールドの半導体パッケージの場合、封止樹脂の熱膨張の方がインターポーザの熱膨張よりも大きくなるため、同様の反りが発生する。そしてこれらの２種類の反りを同時に抑制するのに有効な技術は未だ提案されていない。 That is, after sealing molding, the interposer contracts more than the semiconductor chip at room temperature, and thus warpage occurs so that the interposer side is recessed. On the other hand, at the time of heating such as reflow, in the case of a single-sided full mold semiconductor package, the thermal expansion of the sealing resin is larger than the thermal expansion of the interposer, and thus the same warp occurs. An effective technique for suppressing these two types of warpage has not been proposed yet.
本発明は、以上の通りの事情に鑑みてなされたものであり、常温時および加熱時の両方において半導体パッケージの反りを抑制することができるインターポーザ用の金属張積層板とそれを用いた半導体パッケージを提供することを課題としている。 The present invention has been made in view of the circumstances as described above, and a metal-clad laminate for an interposer capable of suppressing warpage of a semiconductor package both at room temperature and during heating, and a semiconductor package using the same It is an issue to provide.
本発明は、上記の課題を解決するために、以下のことを特徴としている。 The present invention is characterized by the following in order to solve the above problems.
第１に、本発明の金属張積層板は、基材のガラスクロスを含有する絶縁樹脂層と、最外面に設けられた金属箔とを少なくとも含む片面封止の半導体パッケージのインターポーザ用の金属張積層板であって、絶縁樹脂層における絶縁樹脂が熱硬化性樹脂および無機充填材を必須成分として含有し、絶縁樹脂のＤＭＡ法によるガラス転移温度が２４０〜３１０℃であり、２５０℃における金属箔を除いた部分の曲げ弾性率が１０ＧＰａ以上である。 1stly, the metal-clad laminated board of this invention is the metal-clad for the interposer of the semiconductor package of the single-sided sealing which contains the insulating resin layer containing the glass cloth of a base material, and the metal foil provided in the outermost surface. A laminated plate, wherein the insulating resin in the insulating resin layer contains a thermosetting resin and an inorganic filler as essential components, the glass transition temperature of the insulating resin by the DMA method is 240 to 310 ° C., and a metal foil at 250 ° C. The bending elastic modulus of the part excluding is 10 GPa or more.
第２に、上記第１の金属張積層板において、絶縁樹脂層における熱硬化性樹脂がエポキシ樹脂である。 Second, in the first metal-clad laminate, the thermosetting resin in the insulating resin layer is an epoxy resin.
第３に、上記第１または第２の金属張積層板において、絶縁樹脂層における絶縁樹脂が、樹脂１００質量部に対して１００〜３００質量部の無機充填材を含有する。 Thirdly, in the first or second metal-clad laminate, the insulating resin in the insulating resin layer contains 100 to 300 parts by mass of an inorganic filler with respect to 100 parts by mass of the resin.
第４に、本発明の半導体パッケージは、上記第１ないし第３のいずれかの金属張積層板に回路を形成したプリント配線板をインターポーザとして備え、インターポーザの半導体チップ搭載面が封止樹脂により封止されている。 Fourth, a semiconductor package of the present invention includes a printed wiring board in which a circuit is formed on any one of the first to third metal-clad laminates as an interposer, and the semiconductor chip mounting surface of the interposer is sealed with a sealing resin. It has been stopped.
上記第１の発明によれば、絶縁樹脂層における絶縁樹脂が熱硬化性樹脂および無機充填材を必須成分として含有することで、絶縁樹脂のガラス転移温度を２４０〜３１０℃とし、２５０℃における曲げ弾性率を１０ＧＰａ以上としている。そして絶縁樹脂のガラス転移温度を２４０〜３１０℃とすることで、封止成形後において、常温でのインターポーザの収縮による半導体パッケージの反りを抑制できる。さらに、２５０℃における曲げ弾性率を１０ＧＰａ以上とすることで、リフロー等の加熱時におけるインターポーザの曲げ弾性率の加熱による低下を最小限とし、インターポーザの剛性により封止樹脂の熱膨張を抑制し、加熱時の反りを抑制できる。このように、本発明によれば、常温時および加熱時の両方において半導体パッケージの反りを抑制することができる。 According to the first invention, the insulating resin in the insulating resin layer contains a thermosetting resin and an inorganic filler as essential components, so that the glass transition temperature of the insulating resin is 240 to 310 ° C., and bending at 250 ° C. The elastic modulus is 10 GPa or more. And the glass transition temperature of insulating resin shall be 240-310 degreeC, and the curvature of the semiconductor package by shrinkage | contraction of the interposer at normal temperature can be suppressed after sealing molding. Furthermore, by setting the bending elastic modulus at 250 ° C. to 10 GPa or more, the decrease in bending elastic modulus of the interposer during heating such as reflow is minimized, and the thermal expansion of the sealing resin is suppressed by the rigidity of the interposer, Warpage during heating can be suppressed. Thus, according to the present invention, it is possible to suppress the warpage of the semiconductor package both at normal temperature and during heating.
上記第２の発明によれば、絶縁樹脂層における熱硬化性樹脂がエポキシ樹脂であることで、上記第１の発明の効果に加え、耐熱性や接着特性に優れ、また、ガラスクロスを基材として用い、絶縁樹脂のガラス転移温度を２４０〜３１０℃とし、２５０℃における曲げ弾性率を１０ＧＰａ以上とする構成にも適している。 According to the second invention, since the thermosetting resin in the insulating resin layer is an epoxy resin, in addition to the effects of the first invention, it is excellent in heat resistance and adhesive properties, and glass cloth is used as a base material. It is also suitable for a configuration in which the glass transition temperature of the insulating resin is 240 to 310 ° C. and the flexural modulus at 250 ° C. is 10 GPa or more.
上記第３の発明によれば、絶縁樹脂層における絶縁樹脂が、樹脂１００質量部に対して１００〜３００質量部の無機充填材を含有することで、上記第１および第２の発明の効果に加え、２５０℃における曲げ弾性率を１０ＧＰａ以上とし、また熱膨張係数を大きく低減することができ、流動特性も満足することができる。 According to the third invention, the insulating resin in the insulating resin layer contains the inorganic filler in an amount of 100 to 300 parts by mass with respect to 100 parts by mass of the resin, thereby achieving the effects of the first and second inventions. In addition, the flexural modulus at 250 ° C. can be 10 GPa or more, the thermal expansion coefficient can be greatly reduced, and the flow characteristics can also be satisfied.
上記第４の発明によれば、上記第１ないし第３の金属張積層板に回路を形成したプリント配線板をインターポーザとして備えているので、常温時および加熱時の両方において半導体パッケージの反りを抑制することができる。 According to the fourth aspect of the invention, the printed wiring board having the circuit formed on the first to third metal-clad laminates is provided as an interposer, so that the warpage of the semiconductor package can be suppressed both at room temperature and during heating. can do.
以下、本発明を詳細に説明する。 Hereinafter, the present invention will be described in detail.
本発明の金属張積層板を作製するための樹脂組成物に用いられる樹脂は、熱硬化性樹脂および無機充填材が必須成分として配合される。熱硬化性樹脂としては、電子絶縁材料として用いることができるものであれば特に限定されないが、例えば、エポキシ樹脂、ポリイミド樹脂、フェノール樹脂、ビスマレイミド樹脂、不飽和ポリエステル樹脂等を用いることができる。これらは１種単独で用いてもよく、２種以上を併用してもよい。また、これらの熱硬化性樹脂とともに、ポリカーボネート樹脂、ポリフェニレンサルファイド樹脂、ポリエチレンテレフタレート樹脂、液晶ポリマー等の熱可塑性樹脂を併用することができる。 The resin used for the resin composition for producing the metal-clad laminate of the present invention contains a thermosetting resin and an inorganic filler as essential components. The thermosetting resin is not particularly limited as long as it can be used as an electronic insulating material. For example, an epoxy resin, a polyimide resin, a phenol resin, a bismaleimide resin, an unsaturated polyester resin, or the like can be used. These may be used alone or in combination of two or more. In addition to these thermosetting resins, thermoplastic resins such as polycarbonate resins, polyphenylene sulfide resins, polyethylene terephthalate resins, and liquid crystal polymers can be used in combination.
無機充填材としては、特に限定されないが、例えば、球状シリカ、溶融シリカ、天然シリカ、合成シリカ等のシリカ、水酸化アルミニウム、水酸化マグネシウム、ガラス粉末、タルク、焼成タルク、カオリン、焼成カオリン、クレー、焼成クレー等を用いることができる。これらは１種単独で用いてもよく、２種以上を併用してもよい。 The inorganic filler is not particularly limited. For example, silica such as spherical silica, fused silica, natural silica, synthetic silica, aluminum hydroxide, magnesium hydroxide, glass powder, talc, calcined talc, kaolin, calcined kaolin, clay A fired clay or the like can be used. These may be used alone or in combination of two or more.
これらの無機充填材は、シランカップリング剤等により表面処理が施されているものであってもよく、このような表面処理を施すことにより樹脂との界面強度を向上させることができる。 These inorganic fillers may be subjected to a surface treatment with a silane coupling agent or the like, and the interface strength with the resin can be improved by performing such a surface treatment.
無機充填材は、例えば、平均粒径が０．０５〜３０μｍのものを用いることができる。平均粒径が小さ過ぎると流動特性等が低下する場合があり、平均粒径が大き過ぎると樹脂組成物のワニス中の異物除去のためのフィルター工程において目詰まりを起こす可能性がある。なお、平均粒径はミー（Ｍｉｅ）散乱理論に基づくレーザ回折・散乱法により測定することができ、具体的にはレーザ回折式粒度分布測定装置により、無機充填材の粒度分布を体積基準で作成してメディアン径（ｄ５０）を測定し、このメディアン径を平均粒径とすることができる。 As the inorganic filler, for example, one having an average particle diameter of 0.05 to 30 μm can be used. If the average particle size is too small, flow characteristics and the like may be deteriorated. If the average particle size is too large, clogging may occur in a filter process for removing foreign substances in the varnish of the resin composition. The average particle size can be measured by the laser diffraction / scattering method based on the Mie scattering theory. Specifically, the particle size distribution of the inorganic filler is created on a volume basis using a laser diffraction particle size distribution measuring device. Then, the median diameter (d 50 ) is measured, and this median diameter can be used as the average particle diameter.
無機充填材の配合量は、樹脂（熱硬化性樹脂、硬化剤、および硬化促進剤）１００質量部に対して、好ましくは１００〜３００質量部である。無機充填材の配合量をこの範囲内とすることで、２５０℃における曲げ弾性率を１０ＧＰａ以上とし、また熱膨張係数を大きく低減することができ、流動特性も満足することができる。 The blending amount of the inorganic filler is preferably 100 to 300 parts by mass with respect to 100 parts by mass of the resin (thermosetting resin, curing agent, and curing accelerator). By setting the blending amount of the inorganic filler within this range, the flexural modulus at 250 ° C. can be 10 GPa or more, the thermal expansion coefficient can be greatly reduced, and the flow characteristics can also be satisfied.
樹脂組成物には、本発明の効果を損なわない範囲内において、上記の樹脂および無機充填材に加えて他の成分を配合することができる。このような他の成分としては、例えば、プリント配線板用の樹脂組成物に従来より配合されている硬化剤、硬化促進剤、改質材、有機溶剤等が挙げられる。 In the resin composition, other components can be blended in addition to the resin and the inorganic filler as long as the effects of the present invention are not impaired. Examples of such other components include a curing agent, a curing accelerator, a modifier, and an organic solvent that are conventionally blended in a resin composition for a printed wiring board.
本発明では、樹脂組成物として、耐熱性や接着特性に優れ、また、ガラスクロスを基材として用い、絶縁樹脂のガラス転移温度を２４０〜３１０℃とし、２５０℃における曲げ弾性率が１０ＧＰａ以上とする本発明の構成にも適していることから、エポキシ樹脂組成物が好ましく用いられる。 In the present invention, the resin composition is excellent in heat resistance and adhesive properties, uses glass cloth as a base material, the glass transition temperature of the insulating resin is 240 to 310 ° C., and the flexural modulus at 250 ° C. is 10 GPa or more. The epoxy resin composition is preferably used because it is also suitable for the constitution of the present invention.
このエポキシ樹脂組成物に配合されるエポキシ樹脂としては、特に限定されないが、例えば、ビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂等の２官能エポキシ樹脂、クレゾールノボラック型エポキシ樹脂等のノボラック型エポキシ樹脂、ジシクロペンタジエン型エポキシ樹脂、テトラメチルビフェニル型エポキシ樹脂等のビフェニル型エポキシ樹脂、３官能型エポキシ樹脂、４官能型エポキシ樹脂等の多官能型エポキシ樹脂、ハイドロキノン型エポキシ樹脂、およびこれらの臭素化タイプ等を用いることができる。これらは１種単独で用いてもよく、２種以上を併用してもよい。 The epoxy resin blended in the epoxy resin composition is not particularly limited. For example, bifunctional epoxy resins such as bisphenol A type epoxy resin and bisphenol F type epoxy resin, and novolac type epoxy resins such as cresol novolac type epoxy resin. , Dicyclopentadiene type epoxy resin, bimethyl type epoxy resin such as tetramethylbiphenyl type epoxy resin, trifunctional type epoxy resin, polyfunctional type epoxy resin such as tetrafunctional type epoxy resin, hydroquinone type epoxy resin, and bromination of these A type or the like can be used. These may be used alone or in combination of two or more.
エポキシ樹脂組成物には、硬化剤および、必要に応じて硬化促進剤が配合される。硬化剤としては、特に限定されないが、例えば、ノボラック型フェノール樹脂等のフェノール樹脂、ジシアンジアミド、酸無水物、アミン類等が挙げられる。これらは１種単独で用いてもよく、２種以上を併用してもよい。硬化剤は、はんだ耐熱性等を考慮すると、例えば、エポキシ樹脂のエポキシ基１当量に対して、硬化剤の官能基が０．８〜１．２当量の範囲となるように配合することができる。 A curing agent and, if necessary, a curing accelerator are blended in the epoxy resin composition. Although it does not specifically limit as a hardening | curing agent, For example, phenol resins, such as a novolak-type phenol resin, dicyandiamide, an acid anhydride, amines, etc. are mentioned. These may be used alone or in combination of two or more. Considering solder heat resistance and the like, for example, the curing agent can be blended so that the functional group of the curing agent is in the range of 0.8 to 1.2 equivalents with respect to 1 equivalent of the epoxy group of the epoxy resin. .
硬化促進剤としては、特に限定されないが、例えば、イミダゾール系化合物、有機リン系化合物、第３級アミン、第４級アンモニウム塩等が挙げられる。これらは１種単独で用いてもよく、２種以上を併用してもよい。 Although it does not specifically limit as a hardening accelerator, For example, an imidazole type compound, an organophosphorus compound, a tertiary amine, a quaternary ammonium salt etc. are mentioned. These may be used alone or in combination of two or more.
このようなエポキシ樹脂組成物等の樹脂組成物は、上記に例示したような熱硬化性樹脂および無機充填材を配合し、通常は有機溶剤を配合し、さらに必要に応じて他の成分も配合し、これらを例えばミキサー、ナノミル等を用いて均一に混合することにより調製することができる。 Such a resin composition such as an epoxy resin composition contains a thermosetting resin and an inorganic filler as exemplified above, usually contains an organic solvent, and further contains other components as necessary. These can be prepared by, for example, mixing uniformly using a mixer, nanomill or the like.
そして得られた樹脂組成物を基材に含浸し、乾燥機中で例えば１００〜１８０℃で乾燥させることで、半硬化状態（Ｂ−ステージ）のプリプレグを作製することができる。 And the prepreg of a semi-hardened state (B-stage) is producible by impregnating the obtained resin composition in a base material and making it dry at 100-180 degreeC in a dryer, for example.
基材としては、ガラスクロスが用いられる。基材としてガラスクロスを用いることで、機械強度や寸法安定性が優れた金属張積層板が得られる。例えば、Ｅガラス、Ｄガラス、Ｓガラス、Ｔガラス、ＮＥガラス、石英等のガラスクロスを用いることができ、開繊処理を施したものや、シランカップリング剤等で表面処理したものであってもよい。ガラスクロスの厚みは、剛性を確保する点等も考慮すると、例えば、１０〜１５０μｍのものが用いられる。 A glass cloth is used as the substrate. By using glass cloth as the substrate, a metal-clad laminate having excellent mechanical strength and dimensional stability can be obtained. For example, glass cloths such as E glass, D glass, S glass, T glass, NE glass, and quartz can be used, and those subjected to fiber opening treatment or those subjected to surface treatment with a silane coupling agent, etc. Also good. The thickness of the glass cloth is, for example, 10 to 150 μm in consideration of securing rigidity.
上記のようにして得られたプリプレグを所要枚数重ね、両面側の最外層のプリプレグに金属箔を重ね、例えば１００〜２００℃、０．５〜５．０ＭＰａ、２０〜２４０分間の条件下で加熱加圧して積層成形することにより金属張積層板を作製することができる。 The required number of prepregs obtained as described above are stacked, and a metal foil is stacked on the outermost prepreg on both sides, for example, heating under conditions of 100 to 200 ° C., 0.5 to 5.0 MPa, 20 to 240 minutes. A metal-clad laminate can be produced by applying pressure to laminate.
この金属箔としては、特に限定されないが、例えば、銅箔、銀箔、アルミニウム箔、ステンレス箔等を用いることができる。金属箔の厚みは、好ましくは３〜１８μｍである。 Although it does not specifically limit as this metal foil, For example, copper foil, silver foil, aluminum foil, stainless steel foil etc. can be used. The thickness of the metal foil is preferably 3 to 18 μm.
また、上記の金属張積層板のように上記のプリプレグを用いて絶縁樹脂層を形成した内層回路板を用いて、この内層回路板の両外面にプリプレグを重ね、さらに金属箔を重ねて、これを加熱加圧成形することにより、多層の金属張積層板を作製することができる。内層回路板は、両外面に導体回路層を形成しこれらをスルーホール等により導通したものであり、内層回路板の導体回路の表面は黒化処理等により予め粗化処理が施されていることが絶縁樹脂層との密着性を向上させる点から好ましい。 In addition, using an inner layer circuit board in which an insulating resin layer is formed using the above prepreg as in the above metal-clad laminate, the prepreg is stacked on both outer surfaces of the inner layer circuit board, and a metal foil is further stacked. A multilayer metal-clad laminate can be produced by heat and pressure molding. The inner layer circuit board is formed by forming conductor circuit layers on both outer surfaces and conducting them through through holes, etc., and the surface of the conductor circuit of the inner layer circuit board has been subjected to roughening treatment in advance by blackening treatment or the like. Is preferable from the viewpoint of improving the adhesion to the insulating resin layer.
以上のようにして得られる、基材のガラスクロスを含有する絶縁樹脂層と、最外面に設けられた金属箔とを少なくとも含む本発明のインターポーザ用の金属張積層板は、その厚みが好ましくは０．２ｍｍ以下、より好ましくは０．０３〜０．２ｍｍである。このように、インターポーザとして必要な特性を満足し得る範囲内において厚みを小さくした金属張積層板において、特に半導体パッケージの反りを抑制することができる。 The thickness of the metal-clad laminate for the interposer of the present invention comprising at least the insulating resin layer containing the glass cloth of the base material and the metal foil provided on the outermost surface, obtained as described above, is preferably It is 0.2 mm or less, More preferably, it is 0.03-0.2 mm. As described above, in the metal-clad laminate having a reduced thickness within a range that can satisfy the characteristics required for the interposer, the warpage of the semiconductor package can be particularly suppressed.
本発明の金属張積層板は、絶縁樹脂層における絶縁樹脂のＤＭＡ法によるガラス転移温度が２４０〜３１０℃である。このように、インターポーザとして要求される特性を満足し得る範囲内で絶縁樹脂のガラス転移温度を高くすることで、封止成形後において、常温でのインターポーザの収縮による半導体パッケージの反りを抑制できる。 In the metal-clad laminate of the present invention, the glass transition temperature of the insulating resin in the insulating resin layer by the DMA method is 240 to 310 ° C. Thus, by increasing the glass transition temperature of the insulating resin within a range that can satisfy the characteristics required as an interposer, it is possible to suppress the warpage of the semiconductor package due to the shrinkage of the interposer at room temperature after sealing molding.
また、本発明の金属張積層板は、２５０℃における金属箔を除いた部分の曲げ弾性率が１０ＧＰａ以上、好ましくは１０〜３０ＧＰａであるである。このように、インターポーザとして要求される特性を満足し得る範囲内で曲げ弾性率を大きくすることで、リフロー等の加熱時において、インターポーザの剛性により封止樹脂の熱膨張を抑制し、加熱時の反りを抑制できる。 The metal-clad laminate of the present invention has a flexural modulus of 10 GPa or more, preferably 10 to 30 GPa at a portion excluding the metal foil at 250 ° C. In this way, by increasing the flexural modulus within a range that can satisfy the characteristics required as an interposer, the thermal expansion of the sealing resin is suppressed by the rigidity of the interposer during heating such as reflow. Warpage can be suppressed.
そして、上記のようにして作製した本発明の金属張積層板に、必要に応じてスルーホール等の形成のための穴あけやめっきを施し、両面の金属箔に回路を形成する。半導体チップの搭載面にはボンディングパッド等の端子部が設けられ、その反対面にはボールパッド等の端子部が設けられ、これらはスルーホール等により接続される。さらに必要に応じてソルダーレジストの被覆や端子めっき等を行い、プリント配線板としてインターポーザを作製することができる。 Then, the metal-clad laminate of the present invention produced as described above is subjected to drilling or plating for forming through holes or the like as necessary, thereby forming circuits on the metal foils on both sides. A terminal portion such as a bonding pad is provided on the mounting surface of the semiconductor chip, and a terminal portion such as a ball pad is provided on the opposite surface, which are connected by a through hole or the like. If necessary, solder resist coating, terminal plating, and the like can be performed to produce an interposer as a printed wiring board.
このインターポーザには、ＩＣチップ、ＬＳＩチップ等の半導体チップが搭載される。そして半導体チップの搭載面をエポキシ樹脂等の封止樹脂により封止し、裏面にはボールパッドにはんだボールを溶融固定することにより、半導体パッケージを作製することができる。 A semiconductor chip such as an IC chip or an LSI chip is mounted on the interposer. A semiconductor package can be manufactured by sealing the mounting surface of the semiconductor chip with a sealing resin such as an epoxy resin and melt-fixing a solder ball to a ball pad on the back surface.
封止には、従来より封止用に用いられているエポキシ樹脂組成物を用いることができる。この封止には、トランスファ成形等の従来より用いられている成形方法を適用することができる。トランスファ成形の場合、例えば、金型温度１７０〜１８０℃、成形時間３０〜１２０秒にて成形し、その後に後硬化を行う。後硬化の条件は、特に限定されないが、例えば、１７５℃、６時間程度で行うことができる。 For sealing, an epoxy resin composition conventionally used for sealing can be used. For this sealing, a conventionally used molding method such as transfer molding can be applied. In the case of transfer molding, for example, molding is performed at a mold temperature of 170 to 180 ° C. and a molding time of 30 to 120 seconds, and then post-curing is performed. The post-curing conditions are not particularly limited, but can be performed, for example, at 175 ° C. for about 6 hours.
半導体パッケージとしては、表面実装型のパッケージ、例えば、ＦＢＧＡ（Fine Pitch Ball Grid Array）等のＢＧＡ（Ball Grid Array）、ＣＳＰ（Chip Size Package）等が挙げられる。 Examples of the semiconductor package include a surface mount type package, for example, a BGA (Ball Grid Array) such as FBGA (Fine Pitch Ball Grid Array), a CSP (Chip Size Package), and the like.
例えば、電極パッドを備えた半導体チップを、電極パッドを有する面を上に向けて、インターポーザにポリイミド樹脂、エポキシ樹脂、アクリル樹脂等を主成分とするダイアタッチフィルムや導電ペースト等の接着層を介して接着する。そして半導体チップの電極パッドとインターポーザ表面のボンディングパッドとをワイヤでボンディングする。その後、半導体チップが搭載されたインターポーザの表面に封止樹脂を成形し、半導体チップやワイヤ等とともに封止樹脂で一体に封止する。 For example, a semiconductor chip with electrode pads is faced up and the interposer is bonded to a die attach film or conductive paste or the like mainly composed of polyimide resin, epoxy resin, acrylic resin, etc. And glue. Then, the electrode pads of the semiconductor chip and the bonding pads on the surface of the interposer are bonded with wires. Thereafter, a sealing resin is formed on the surface of the interposer on which the semiconductor chip is mounted, and is integrally sealed with the sealing resin together with the semiconductor chip and the wire.
あるいは、インターポーザ表面の端子にバンプを介して半導体チップを搭載し、バンプ間の間隙にアンダーフィルを塗布、充填した後、加熱硬化し、その後、半導体チップ全体の封止を行う。これにより、フリップチップ実装による半導体パッケージを作製することができる。 Alternatively, a semiconductor chip is mounted on a terminal on the surface of the interposer via a bump, and an underfill is applied and filled in a gap between the bumps, followed by heat curing, and then the entire semiconductor chip is sealed. Thereby, a semiconductor package by flip chip mounting can be manufactured.
以下、実施例により本発明をさらに詳しく説明するが、本発明はこれらの実施例に何ら限定されるものではない。
＜実施例１＞
[プリプレグ用の樹脂組成物の調製]
樹脂組成物として、次のエポキシ樹脂組成物を調製した。エポキシ樹脂として日本化薬（株）製「ＥＰＰＮ５０２Ｈ」（サリチルアルデヒド型エポキシ樹脂）を１００質量部配合し、硬化剤として明和化成（株）製「ＭＥＨ７６００Ｈ」（多官能フェノール樹脂）を５９質量部、硬化促進剤として四国化成工業（株）製「２Ｅ４ＭＺ」（２−エチル−４−メチルイミダゾール）を０．１質量部、無機充填材として（株）アドマテックス製「ＳＯ−Ｃ２」（球状シリカ、平均粒径：約０．５μｍ）を１７０質量部配合し、有機溶剤のＭＥＫ（メチルエチルケトン）で希釈したものを攪拌、均一化し、エポキシ樹脂組成物のワニスを得た。
[プリプレグの作製]
基材として、ガラスクロス（日東紡績株式会社製「ＷＥＡ１０７８」、厚み６０μｍ、および「ＷＥＡ１１６Ｅ」、厚み１００μｍ）を用い、このガラスクロスに上記のエポキシ樹脂組成物のワニスを室温にて含浸させ、その後、約１３０〜１７０℃で加熱することにより、ワニス中の有機溶剤を乾燥除去し、エポキシ樹脂組成物を半硬化させることによりプリプレグを作製した。プリプレグにおける樹脂量は、厚み６０μｍのガラスクロス１００質量部に対して樹脂１１０質量部、厚み１００μｍのガラスクロス１００質量部に対して樹脂１００質量部となるように調整した。
[銅張積層板の作製]
上記のようにして製造したプリプレグを１枚重ね、さらにこのプリプレグの両面に銅箔（三井金属鉱業（株）製「３ＥＣＶＬＰ１２」、厚み１２μｍ）を重ね、２００℃、３ＭＰａ、１８０分の条件で加熱加圧成形し、厚み８０μｍ（銅箔を除く厚み６０μｍ）の銅張積層板を作製した。
[半導体パッケージの作製]
銅張積層板に穴あけおよび銅めっきを行うことによりスルーホールを形成し、さらに、サブトラクティブ法により銅張積層板の両面の銅箔をパターンニングして回路を形成した。このプリント配線板に、端子以外の回路部分にソルダーレジストを塗布、硬化し、端子めっきを施し、インターポーザを作製した。
EXAMPLES Hereinafter, although an Example demonstrates this invention further in detail, this invention is not limited to these Examples at all.
<Example 1>
[Preparation of resin composition for prepreg]
The following epoxy resin composition was prepared as a resin composition. 100 parts by mass of “EPPN502H” (salicylaldehyde type epoxy resin) manufactured by Nippon Kayaku Co., Ltd. as an epoxy resin, 59 parts by mass of “MEH7600H” (polyfunctional phenol resin) manufactured by Meiwa Kasei Co., Ltd. as a curing agent, 0.1 part by mass of “2E4MZ” (2-ethyl-4-methylimidazole) manufactured by Shikoku Kasei Kogyo Co., Ltd. as a curing accelerator, and “SO-C2” (spherical silica manufactured by Admatechs Co., Ltd.) as an inorganic filler. An epoxy resin composition varnish was obtained by mixing 170 parts by mass of (average particle size: about 0.5 μm) and stirring and homogenizing the mixture diluted with MEK (methyl ethyl ketone) as an organic solvent.
[Preparation of prepreg]
As a base material, a glass cloth (“WEA1078” manufactured by Nitto Boseki Co., Ltd., thickness 60 μm, and “WEA116E”, thickness 100 μm) was used, and this glass cloth was impregnated with the varnish of the above epoxy resin composition at room temperature. The organic solvent in the varnish was dried and removed by heating at about 130 to 170 ° C., and the epoxy resin composition was semi-cured to prepare a prepreg. The amount of resin in the prepreg was adjusted to be 110 parts by mass of resin with respect to 100 parts by mass of glass cloth having a thickness of 60 μm and 100 parts by mass of resin with respect to 100 parts by mass of glass cloth having a thickness of 100 μm.
[Preparation of copper-clad laminate]
One prepreg manufactured as described above is stacked, and copper foil ("3ECVLP12" manufactured by Mitsui Mining & Smelting Co., Ltd., thickness 12 μm) is stacked on both sides of this prepreg, and heated at 200 ° C., 3 MPa, 180 minutes. A copper clad laminate having a thickness of 80 μm (a thickness of 60 μm excluding the copper foil) was produced by pressure molding.
[Fabrication of semiconductor packages]
Through holes were formed in the copper clad laminate by drilling and copper plating, and a circuit was formed by patterning the copper foils on both sides of the copper clad laminate by a subtractive method. On this printed wiring board, a solder resist was applied and cured on circuit portions other than the terminals, and terminal plating was performed to produce an interposer.
このインターポーザに半導体チップとして８×１１×０．０８ｍｍのチップをダイアタッチメントフィルムで接着し、インターポーザのボンディングパッドとワイヤボンディングした後、チップ搭載側の片面に封止樹脂としてパナソニック電工（株）製ＣＶ８７１０ＭＬＥを用いて成形条件１７５℃、９０秒でトランスファ成形し、その後１７５℃で６時間アフターベーキング（後硬化）し、厚み０．３０ｍｍ、幅１４×１４ｍｍの半導体パッケージを作製した。
＜実施例２＞
樹脂組成物として、次のエポキシ樹脂組成物を調製した。エポキシ樹脂として日本化薬（株）製「ＥＰＰＮ５０２Ｈ」を５６質量部、東都化成（株）製「ＺＸ−１２５７」（ジシクロペンタジエン含有２官能エポキシ樹脂）を４４質量部配合し、硬化剤として明和化成（株）製「ＭＥＨ７６００Ｈ」を５０質量部、硬化促進剤として四国化成工業（株）製「２Ｅ４ＭＺ」を０．１質量部、無機充填材として（株）アドマテックス製「ＳＯ−Ｃ２」を２２０質量部配合し、有機溶剤のＭＥＫで希釈したものを攪拌、均一化し、エポキシ樹脂組成物のワニスを得た。
After bonding an 8 × 11 × 0.08 mm chip as a semiconductor chip to this interposer with a die attachment film and wire bonding to a bonding pad of the interposer, CV8710MLE manufactured by Panasonic Electric Works Co., Ltd. as a sealing resin on one side of the chip mounting side. Was subjected to transfer molding at 175 ° C. for 90 seconds, followed by after-baking (post-curing) at 175 ° C. for 6 hours to produce a semiconductor package having a thickness of 0.30 mm and a width of 14 × 14 mm.
<Example 2>
The following epoxy resin composition was prepared as a resin composition. 56 parts by mass of “EPPN502H” manufactured by Nippon Kayaku Co., Ltd. and 44 parts by mass of “ZX-1257” (dicyclopentadiene-containing bifunctional epoxy resin) manufactured by Tohto Kasei Co., Ltd. are blended as epoxy resins. 50 parts by mass of “MEH7600H” manufactured by Kasei Co., Ltd., 0.1 part by mass of “2E4MZ” manufactured by Shikoku Kasei Kogyo Co., Ltd. as a curing accelerator, and “SO-C2” manufactured by Admatechs Co., Ltd. as an inorganic filler A mixture of 220 parts by mass and diluted with MEK as an organic solvent was stirred and homogenized to obtain an epoxy resin composition varnish.
それ以外は実施例１と同様にしてプリプレグ、銅張積層板、および半導体パッケージを作製した。
＜実施例３＞
樹脂組成物として、次のエポキシ樹脂組成物を調製した。エポキシ樹脂として日本化薬（株）製「ＥＰＰＮ５０２Ｈ」を６３質量部、ジャパンエポキシレジン（株）製「ＹＸ−４０００Ｈ」（ビフェニル型エポキシ樹脂）を３７質量部配合し、硬化剤として明和化成（株）製「ＭＥＨ７６００Ｈ」を５６質量部、硬化促進剤として四国化成工業（株）製「２Ｅ４ＭＺ」を０．１質量部、無機充填材として（株）アドマテックス製「ＳＯ−Ｃ２」を３００質量部配合し、有機溶剤のＭＥＫで希釈したものを攪拌、均一化し、エポキシ樹脂組成物のワニスを得た。
Other than that was carried out similarly to Example 1, and produced the prepreg, the copper clad laminated board, and the semiconductor package.
<Example 3>
The following epoxy resin composition was prepared as a resin composition. As an epoxy resin, 63 parts by mass of “EPPN502H” manufactured by Nippon Kayaku Co., Ltd. and 37 parts by mass of “YX-4000H” (biphenyl type epoxy resin) manufactured by Japan Epoxy Resin Co., Ltd. are blended, and Meiwa Kasei Co., Ltd. as a curing agent. ) 56 parts by mass of “MEH7600H” manufactured by Shikoku Kasei Kogyo Co., Ltd. as 0.1 part by mass as a curing accelerator, and 300 parts by mass of “SO-C2” manufactured by Admatex Co., Ltd. as an inorganic filler. What was mixed and diluted with MEK as an organic solvent was stirred and homogenized to obtain an epoxy resin composition varnish.
それ以外は実施例１と同様にしてプリプレグ、銅張積層板、および半導体パッケージを作製した。
＜比較例１＞
樹脂組成物として、次のエポキシ樹脂組成物を調製した。エポキシ樹脂として日本化薬（株）製「ＥＰＰＮ５０２Ｈ」を５０質量部、東都化成（株）製「ＺＸ−１２５７」を５０質量部配合し、硬化剤として明和化成（株）製「ＭＥＨ７６００Ｈ」を４９質量部、硬化促進剤として四国化成工業（株）製「２Ｅ４ＭＺ」を０．１質量部、無機充填材として（株）アドマテックス製「ＳＯ−Ｃ２」を５０質量部配合し、有機溶剤のＭＥＫで希釈したものを攪拌、均一化し、エポキシ樹脂組成物のワニスを得た。
Other than that was carried out similarly to Example 1, and produced the prepreg, the copper clad laminated board, and the semiconductor package.
<Comparative Example 1>
The following epoxy resin composition was prepared as a resin composition. 50 parts by mass of “EPPN502H” manufactured by Nippon Kayaku Co., Ltd. as an epoxy resin and 50 parts by mass of “ZX-1257” manufactured by Toto Kasei Co., Ltd., and 49 “MEH7600H” manufactured by Meiwa Kasei Co., Ltd. as a curing agent 0.1 part by mass of “2E4MZ” manufactured by Shikoku Kasei Kogyo Co., Ltd. as a curing accelerator and 50 parts by mass of “SO-C2” manufactured by Admatex Co., Ltd. as an inorganic filler, and MEK as an organic solvent The product diluted with was stirred and homogenized to obtain an epoxy resin composition varnish.
それ以外は実施例１と同様にしてプリプレグ、銅張積層板、および半導体パッケージを作製した。
＜比較例２＞
樹脂組成物として、次のエポキシ樹脂組成物を調製した。エポキシ樹脂として日本化薬（株）製「ＥＰＰＮ５０２Ｈ」を１０質量部、東都化成（株）製「ＺＸ−１２５７」を９０質量部配合し、硬化剤として明和化成（株）製「ＭＥＨ７６００Ｈ」を４１質量部、硬化促進剤として四国化成工業（株）製「２Ｅ４ＭＺ」を０．１質量部、無機充填材として（株）アドマテックス製「ＳＯ−Ｃ２」を１４０質量部配合し、有機溶剤のＭＥＫで希釈したものを攪拌、均一化し、エポキシ樹脂組成物のワニスを得た。
Other than that was carried out similarly to Example 1, and produced the prepreg, the copper clad laminated board, and the semiconductor package.
<Comparative Example 2>
The following epoxy resin composition was prepared as a resin composition. 10 parts by mass of “EPPN502H” manufactured by Nippon Kayaku Co., Ltd. as an epoxy resin and 90 parts by mass of “ZX-1257” manufactured by Toto Kasei Co., Ltd., and 41 “MEH7600H” manufactured by Meiwa Kasei Co., Ltd. as a curing agent 0.1 parts by mass of “2E4MZ” manufactured by Shikoku Kasei Kogyo Co., Ltd. as a curing accelerator and 140 parts by mass of “SO-C2” manufactured by Admatechs Co., Ltd. as an inorganic filler, and MEK as an organic solvent The product diluted with was stirred and homogenized to obtain an epoxy resin composition varnish.
それ以外は実施例１と同様にしてプリプレグ、銅張積層板、および半導体パッケージを作製した。 Other than that was carried out similarly to Example 1, and produced the prepreg, the copper clad laminated board, and the semiconductor package.
上記の実施例および比較例について次の測定および評価を行った。
[ガラス転移温度]
ＩＰＣ ＴＭ−６５０に準拠して昇温速度５℃／分、曲げモードの条件でガラス転移温度（ＤＭＡ法）を測定した。なお、サンプルの厚みは０．８ｍｍで厚み１００μｍのガラスクロスを８枚積層した。
[加熱時の曲げ弾性率]
銅張積層板から銅箔を除去し、このものを長さ１００ｍｍ、幅２５ｍｍに切断し、ＪＩＳ Ｃ６４８１に準じて、２５０℃の雰囲気下で曲げ弾性率の測定を行った。なお、サンプルの厚みは０．８ｍｍで厚み１００μｍのガラスクロスを８枚積層した。
[パッケージの反り]
アクロメトリックス社製シャドーモアレにより、半導体パッケージに３０〜２６０℃の熱履歴をかけたときのパッケージ反りを１０℃おきに測定し、それらの値の最大値から最小値を引いた値により評価した。
The following measurements and evaluations were performed on the above examples and comparative examples.
[Glass-transition temperature]
Based on IPC TM-650, the glass transition temperature (DMA method) was measured under the conditions of a heating rate of 5 ° C./min and a bending mode. The sample had a thickness of 0.8 mm and eight glass cloths having a thickness of 100 μm were laminated.
[Bending elastic modulus during heating]
The copper foil was removed from the copper-clad laminate, this was cut into a length of 100 mm and a width of 25 mm, and the flexural modulus was measured in an atmosphere of 250 ° C. according to JIS C6481. The sample had a thickness of 0.8 mm and eight glass cloths having a thickness of 100 μm were laminated.
[Package warpage]
The package warpage when a thermal history of 30 to 260 ° C. was applied to the semiconductor package with a shadow moiré made by Achromometrics was measured every 10 ° C., and the evaluation was performed by subtracting the minimum value from the maximum value.
評価結果を表１に示す。 The evaluation results are shown in Table 1.
表１より、絶縁樹脂のガラス転移温度を２４０〜３１０℃とし、かつ、２５０℃における曲げ弾性率を１０ＧＰａ以上とした銅張積層板を用いた実施例１〜３では、常温および加熱時の両方において半導体パッケージの反りが抑制された。 From Table 1, in Examples 1-3 using the copper clad laminated board which made the glass transition temperature of insulating resin 240-310 degreeC and the bending elastic modulus in 250 degreeC was 10 GPa or more, both the normal temperature and the time of a heating The warpage of the semiconductor package was suppressed.
これに対して、曲げ弾性率が１０ＧＰａ未満である比較例１、および絶縁樹脂のガラス転移温度が２４０℃未満である比較例２では、常温および加熱時のいずれかにおいて半導体パッケージに大きな反りが発生した。 On the other hand, in Comparative Example 1 in which the flexural modulus is less than 10 GPa and Comparative Example 2 in which the glass transition temperature of the insulating resin is less than 240 ° C., a large warp is generated in the semiconductor package either at room temperature or during heating. did.
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| US9967971B2 (en) | 2015-11-12 | 2018-05-08 | International Business Machines Corporation | Method of reducing warpage of an orgacnic substrate |
| KR20200130169A (en) * | 2019-05-07 | 2020-11-18 | 창 춘 플라스틱스 컴퍼니, 리미티드 | Resin composition and uses of the same |
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| JP3511110B2 (en) * | 1995-02-13 | 2004-03-29 | 日立化成工業株式会社 | High dielectric constant and low dielectric loss tangent laminate |
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| JP2003147171A (en) * | 2001-11-15 | 2003-05-21 | Hitachi Chem Co Ltd | Method for producing insulating resin composition, insulating resin composition, and copper-foil laminated insulating material and copper-clad laminate |
| JP2004182850A (en) * | 2002-12-03 | 2004-07-02 | Mitsubishi Gas Chem Co Inc | Prepreg having excellent balance of characteristics and laminated sheet |
| JP2004214271A (en) * | 2002-12-27 | 2004-07-29 | Ngk Spark Plug Co Ltd | Single side lamination wiring board and its manufacturing method |
| JP4400191B2 (en) * | 2003-11-28 | 2010-01-20 | 住友ベークライト株式会社 | Resin composition and substrate using the same |
| JP4244975B2 (en) * | 2005-08-26 | 2009-03-25 | パナソニック電工株式会社 | Epoxy resin composition for prepreg, prepreg, multilayer printed wiring board |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US9967971B2 (en) | 2015-11-12 | 2018-05-08 | International Business Machines Corporation | Method of reducing warpage of an orgacnic substrate |
| US10595399B2 (en) | 2015-11-12 | 2020-03-17 | International Business Machines Corporation | Method of reducing warpage of an organic substrate |
| KR20200130169A (en) * | 2019-05-07 | 2020-11-18 | 창 춘 플라스틱스 컴퍼니, 리미티드 | Resin composition and uses of the same |
| KR20200130056A (en) * | 2019-05-07 | 2020-11-18 | 창 춘 플라스틱스 컴퍼니, 리미티드 | Resin composition and uses of the same |
| KR102186930B1 (en) | 2019-05-07 | 2020-12-07 | 창 춘 플라스틱스 컴퍼니, 리미티드 | Resin composition and uses of the same |
| KR102349026B1 (en) | 2019-05-07 | 2022-01-10 | 창 춘 플라스틱스 컴퍼니, 리미티드 | Resin composition and uses of the same |
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