JP5626328B2 - 光半導体装置 - Google Patents
光半導体装置 Download PDFInfo
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- JP5626328B2 JP5626328B2 JP2012281017A JP2012281017A JP5626328B2 JP 5626328 B2 JP5626328 B2 JP 5626328B2 JP 2012281017 A JP2012281017 A JP 2012281017A JP 2012281017 A JP2012281017 A JP 2012281017A JP 5626328 B2 JP5626328 B2 JP 5626328B2
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- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
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- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
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- VSIIXMUUUJUKCM-UHFFFAOYSA-D pentacalcium;fluoride;triphosphate Chemical compound [F-].[Ca+2].[Ca+2].[Ca+2].[Ca+2].[Ca+2].[O-]P([O-])([O-])=O.[O-]P([O-])([O-])=O.[O-]P([O-])([O-])=O VSIIXMUUUJUKCM-UHFFFAOYSA-D 0.000 description 1
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- SBIBMFFZSBJNJF-UHFFFAOYSA-N selenium;zinc Chemical compound [Se]=[Zn] SBIBMFFZSBJNJF-UHFFFAOYSA-N 0.000 description 1
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- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Description
面視における形状、大きさ等については、発光装置の大きさや載置する発光素子等の数や大きさ等に応じて任意に選択することができる。
、アルミニウム等の金属及びそれらの合金を用いた導電性ワイヤが挙げられる。特に、熱抵抗などに優れた金を用いるのが好ましい。
の一部が発光装置400の外表面を形成している。そして、第1の導電部材401と第2の導電部材402の間に、発光素子403からの光を遮光可能な樹脂からなる基体406を有し、更に、導電部材導電部材その基体406は、基体の底面406aと、第1の突出部401b及び第2の突出部402bを埋設する側壁406bを有するような形状とすることを特徴とする。これにより、発光装置400に凹部S1が形成され、発光装置400の側面側に光が放出されるのを抑制し、上面方向に向けて光を放出することができる。その他の部材等については、実施の形態1〜3と同様のものを用いることができる。
の突出部7011(第2の突出部7021)が埋設された基体の側壁7060bを切断するような位置で切断することで、例えば図4Aに示すような、第1の突出部が発光装置の外表面に形成された発光装置を得ることができる。
Claims (7)
- 光半導体素子と、
前記光半導体素子と導通する第1の導電部材及び前記第1の導電部材から離間した第2の導電部材と、
前記光半導体素子を被覆し、前記第1の導電部材及び前記第2の導電部材と接する封止部材と、を有する光半導体装置の製造方法であって、
支持基板上にメッキによって前記第1の導電部材及び前記第2の導電部材の平坦部を形成する第1の工程と、
前記平坦部の上面にメッキによって突出部を形成する第2の工程と、
前記平坦部の上面に前記光半導体素子を接続する第3の工程と、
前記第2の工程の後に支持基板を除去する第4の工程と、
前記1〜4の工程を含む方法で得られた光半導体装置の集合体を個片化する第5の工程と、を有することを特徴とする光半導体装置の製造方法。 - 前記第1の工程と前記第2の工程において、レジストを用い、前記レジストの膜厚よりも厚くなるようにメッキし、前記導電部材の側面に突起部を形成する請求項1に記載の光半導体装置の製造方法。
- 前記第2の工程において、メッキを複数回行い、前記突出部を複数層とする請求項1又は2に記載の光半導体装置の製造方法。
- 前記第5の工程において、前記突出部の少なくとも一側面が光半導体装置の外表面を形成するように、前記突出部を切断する位置で個片化する請求項1から3のいずれか1項に記載の光半導体装置の製造方法。
- 前記光半導体素子からの光を遮光可能な樹脂により基体を形成する工程を含み、前記導電部材間を埋めるように前記基体の底面部を形成する請求項1から4のいずれか1項に記載の光半導体装置の製造方法。
- 前記基体の側壁を形成することを特徴とする請求項5に記載の光半導体装置の製造方法。
- 前記突出部を埋設するように前記側壁を形成する請求項6に記載の光半導体装置の製造方法。
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JP2012281017A JP5626328B2 (ja) | 2012-12-25 | 2012-12-25 | 光半導体装置 |
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JP2012281017A JP5626328B2 (ja) | 2012-12-25 | 2012-12-25 | 光半導体装置 |
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JP2008202438A Division JP5217753B2 (ja) | 2008-08-05 | 2008-08-05 | 光半導体装置 |
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JP2013102175A JP2013102175A (ja) | 2013-05-23 |
JP5626328B2 true JP5626328B2 (ja) | 2014-11-19 |
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Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2006313943A (ja) * | 2003-02-18 | 2006-11-16 | Sharp Corp | 半導体発光装置、その製造方法および電子撮像装置 |
JP2005294736A (ja) * | 2004-04-05 | 2005-10-20 | Stanley Electric Co Ltd | 半導体発光装置の製造方法 |
DE112005001661T5 (de) * | 2004-07-15 | 2007-05-31 | Dai Nippon Printing Co., Ltd. | Halbleitervorrichtung, Substrat zum Herstellen einer Halbleitervorrichtung und Verfahren zum Herstellen derselben |
JP4600124B2 (ja) * | 2005-04-04 | 2010-12-15 | ソニー株式会社 | 半導体パッケージの製造方法 |
JP4686248B2 (ja) * | 2005-04-28 | 2011-05-25 | スタンレー電気株式会社 | 光半導体装置、及び光半導体装置製造方法 |
JP2007157940A (ja) * | 2005-12-02 | 2007-06-21 | Nichia Chem Ind Ltd | 発光装置および発光装置の製造方法 |
US7960819B2 (en) * | 2006-07-13 | 2011-06-14 | Cree, Inc. | Leadframe-based packages for solid state emitting devices |
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