JP5621320B2 - 接続構造体の製造方法 - Google Patents
接続構造体の製造方法 Download PDFInfo
- Publication number
- JP5621320B2 JP5621320B2 JP2010115231A JP2010115231A JP5621320B2 JP 5621320 B2 JP5621320 B2 JP 5621320B2 JP 2010115231 A JP2010115231 A JP 2010115231A JP 2010115231 A JP2010115231 A JP 2010115231A JP 5621320 B2 JP5621320 B2 JP 5621320B2
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- Prior art keywords
- solder
- bump
- wiring board
- meth
- acrylate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
成膜成分としてフェノキシ樹脂(YP50、東都化成(株))30質量部に、アクリル系モノマーとしてジシクロペンタクジエンジアクリレート65質量部と、溶剤として70質量部と、更に、表1の有機過酸化物5質量部とを添加して均一に混合した。得られた混合物をバーコーターでセパレーレータポリエチレンテレフタレートフィルムに35μmの乾燥厚となるように塗布し、オーブン中で80℃で5分間加熱乾燥し、アクリル系熱硬化性接着剤フィルムを作成した。
ICチップと配線基板との間から樹脂が排除されたか否か、光学顕微鏡を用いた断面観察により、以下の基準により評価した。
B: 端子間の一部に樹脂の噛み込みが観察される場合
C: 端子間に樹脂の噛み込みが観察される場合
ICチップと配線基板の端子間のハンダ量は、光学顕微鏡を用いた断面観察により、以下の基準により評価した。
B: 初期のハンダ高さの20%未満が残存している場合
C: 部分的にハンダが消失している場合
ICチップと配線基板との間の導通抵抗は、4端子法により測定し、測定した抵抗値を以下の基準により評価した。
B: 1Ω以上
C: オープン
実施例1で使用したICチップの金スタッドバンプに代えて、33μm径で高さ20μmの銅ピラー上に、15μm厚のハンダキャップ(Sn2.5Ag)を設けたバンプを使用したICチップを使用し、また、実施例1で使用したガラスエポキシ基板のバンプに代えて、パッドにハンダを積層しないガラスエポキシ基板を使用し、それ以外は実施例1と同様に異方性導電接続を行い接続構造体を得た。得られた接続構造体について、実施例1と同様に評価した。得られた結果を表1に示す。
ガラスエポキシ基板として実施例1で使用したガラスエポキシ基板を使用すること以外は、実施例5と同様に異方性導電接続を行い接続構造体を得た。得られた接続構造体について、実施例1と同様に評価した。得られた結果を表1に示す。
2 配線基板
3 電極
4 電気素子
5 バンプ
6 熱硬化性接着剤
7 加圧ボンダー
10 接続構造体
40 半導体チップ
41 貫通電極
42 フロントバンプ
43 バックバンプ
400 積層型の電気素子
Claims (6)
- 加圧ボンダーの押圧面が、弾性材から構成されている請求項1記載の製造方法。
- 電気素子が、半導体チップである請求項1または2記載の製造方法。
- アクリル系熱硬化性接着剤が、フィルム状である請求項1〜3のいずれかに記載の製造方法。
- 電気素子が、シリコン貫通電極とそれに接続しているフロントバンプとバックバンプとを有し、互いに積層されるべき複数の半導体チップであり、半導体チップ間に存在するフロントバンプ及びバックバンプのいずれかの少なくとも一部がハンダで形成されている請求項1または2記載の製造方法。
- 配線基板の電極へ、配線基板側の半導体チップのバンプを接続する際に、半導体チップ同士も一括して接続する請求項4記載の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2010115231A JP5621320B2 (ja) | 2010-05-19 | 2010-05-19 | 接続構造体の製造方法 |
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JP2010115231A JP5621320B2 (ja) | 2010-05-19 | 2010-05-19 | 接続構造体の製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2011243786A JP2011243786A (ja) | 2011-12-01 |
JP5621320B2 true JP5621320B2 (ja) | 2014-11-12 |
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JP2010115231A Expired - Fee Related JP5621320B2 (ja) | 2010-05-19 | 2010-05-19 | 接続構造体の製造方法 |
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JP (1) | JP5621320B2 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014010258A1 (ja) * | 2012-07-13 | 2014-01-16 | パナソニック株式会社 | 半導体封止用アクリル樹脂組成物とそれを用いた半導体装置およびその製造方法 |
JP6094884B2 (ja) * | 2013-06-13 | 2017-03-15 | パナソニックIpマネジメント株式会社 | 半導体装置の製造方法とそれに使用される半導体封止用アクリル樹脂組成物 |
JP6094886B2 (ja) * | 2013-07-12 | 2017-03-15 | パナソニックIpマネジメント株式会社 | 半導体装置の製造方法とそれに使用される半導体封止用アクリル樹脂組成物 |
JP2015056480A (ja) * | 2013-09-11 | 2015-03-23 | デクセリアルズ株式会社 | アンダーフィル材、及びこれを用いた半導体装置の製造方法 |
JP6069143B2 (ja) * | 2013-09-11 | 2017-02-01 | デクセリアルズ株式会社 | アンダーフィル材、及びこれを用いた半導体装置の製造方法 |
JP6129696B2 (ja) * | 2013-09-11 | 2017-05-17 | デクセリアルズ株式会社 | アンダーフィル材、及びこれを用いた半導体装置の製造方法 |
JP6459402B2 (ja) * | 2014-10-31 | 2019-01-30 | 日立化成株式会社 | 先供給型アンダーフィル材、電子部品装置及び電子部品装置の製造方法 |
US10797013B2 (en) | 2015-02-16 | 2020-10-06 | Panasonic Intellectual Property Management Co., Ltd. | Acrylic resin composition for sealing, cured product of same, method for producing same, semiconductor device using said resin composition, and method for manufacturing said semiconductor device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
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JP3447690B2 (ja) * | 2000-12-04 | 2003-09-16 | 日本電気株式会社 | 半導体チップの積層実装方法 |
JP2004067908A (ja) * | 2002-08-07 | 2004-03-04 | Sumitomo Bakelite Co Ltd | 異方導電性接着剤 |
JP3921459B2 (ja) * | 2003-07-11 | 2007-05-30 | ソニーケミカル&インフォメーションデバイス株式会社 | 電気部品の実装方法及び実装装置 |
JP2005320455A (ja) * | 2004-05-10 | 2005-11-17 | Hitachi Chem Co Ltd | 接着剤組成物、回路接続材料、回路部材の接続構造及び半導体装置 |
JP2006339323A (ja) * | 2005-06-01 | 2006-12-14 | Hitachi Chem Co Ltd | バンプ付き半導体チップと基板の接続方法 |
WO2010004793A1 (ja) * | 2008-07-11 | 2010-01-14 | ソニーケミカル&インフォメーションデバイス株式会社 | 異方性導電フィルム |
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2010
- 2010-05-19 JP JP2010115231A patent/JP5621320B2/ja not_active Expired - Fee Related
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JP2011243786A (ja) | 2011-12-01 |
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