JP5605189B2 - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device Download PDF

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JP5605189B2
JP5605189B2 JP2010263701A JP2010263701A JP5605189B2 JP 5605189 B2 JP5605189 B2 JP 5605189B2 JP 2010263701 A JP2010263701 A JP 2010263701A JP 2010263701 A JP2010263701 A JP 2010263701A JP 5605189 B2 JP5605189 B2 JP 5605189B2
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JP2012114343A (en
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真央 神谷
恭孝 長谷川
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Toyoda Gosei Co Ltd
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本発明は、半導体発光素子に関する。   The present invention relates to a semiconductor light emitting device.

従来の半導体発光素子として、基板上にｎ型半導体層とｐ型半導体層に挟まれた発光層を有し、発光層から発せられる光を基板の反対側から取り出すものが知られている。また、このような半導体発光素子において、半導体層へ電流を均一に拡散させるために、台座電極から延長される補助電極を備えたものが知られている（例えば、特許文献１参照）。   As a conventional semiconductor light emitting device, a device having a light emitting layer sandwiched between an n type semiconductor layer and a p type semiconductor layer on a substrate and taking out light emitted from the light emitting layer from the opposite side of the substrate is known. In addition, such a semiconductor light emitting device is known that includes an auxiliary electrode extended from a pedestal electrode in order to uniformly diffuse a current to a semiconductor layer (see, for example, Patent Document 1).

特開２００１−３４５４８０号公報JP 2001-345480 A

しかし、特許文献１に記載の半導体発光素子では、発光層から発せられた光の一部が補助電極により遮られるため、光取り出し効率が低下するという問題がある。   However, the semiconductor light emitting device described in Patent Document 1 has a problem in that the light extraction efficiency is lowered because part of the light emitted from the light emitting layer is blocked by the auxiliary electrode.

したがって、本発明の目的は、補助電極を有する半導体発光素子において、光取り出し効率の低下を抑えることである。   Accordingly, an object of the present invention is to suppress a decrease in light extraction efficiency in a semiconductor light emitting device having an auxiliary electrode.

本発明は、上記目的を達成するため、を第１導電型層と第２導電型層とに挟まれた発光層を有する半導体積層構造を有し、前記第２導電型層から光を取り出す半導体発光素子であって、前記第１導電型層に接続されるように前記第２導電型層上に位置し、第１の台座電極および前記第１の台座電極から面内方向に延在する線状の第１の補助電極を含む第１の電極と、前記第２導電型層に接続されるように前記第２導電型層上に位置し、第２の台座電極および前記第２の台座電極から面内方向に延在する線状の第２の補助電極を含む第２の電極と、を有し、前記第１の電極と前記第２の電極は、絶縁層を介して配置され、前記第１の補助電極と前記第２の補助電極の少なくとも一部が、前記絶縁層を介して前記光の取り出し方向において重なる、半導体発光素子を提供する。 In order to achieve the above object, the present invention has a semiconductor laminated structure having a light emitting layer sandwiched between a first conductivity type layer and a second conductivity type layer, and takes out light from the second conductivity type layer. a light-emitting element, before SL located on the first conductivity type layer connected to the way the second conductivity type layer, extends in the in-plane direction from the first pad electrode and the first pad electrode a first electrode including a linear first auxiliary electrode, before SL located on the second conductivity type layer on the second conductivity type layer to be connected, the second pad electrode and the second A second electrode including a linear second auxiliary electrode extending in the in-plane direction from the pedestal electrode, and the first electrode and the second electrode are disposed via an insulating layer , at least a portion of the first auxiliary electrode and the second auxiliary electrode overlaps Oite the extraction direction of the light through the insulating layer To provide a semiconductor light-emitting element.

上記半導体発光素子において、前記第１の補助電極と前記第２の補助電極の少なくとも一部は、互いの延伸方向がほぼ一致するように重なることが好ましい。   In the semiconductor light emitting device, it is preferable that at least a part of the first auxiliary electrode and the second auxiliary electrode overlap with each other so that their extending directions substantially coincide with each other.

上記半導体発光素子において、前記第１の電極は前記第２の電極の上層に形成され、前記第１の補助電極は前記第２の補助電極と重なる部分から面内方向に突き出た第１の突出部を含み、前記第１の突出部と前記第１導電型層が電気的に接続されてもよい。   In the semiconductor light emitting device, the first electrode is formed in an upper layer of the second electrode, and the first auxiliary electrode protrudes in an in-plane direction from a portion overlapping the second auxiliary electrode. The first protrusion and the first conductivity type layer may be electrically connected.

上記半導体発光素子において、前記第２の電極は前記第１の電極の上層に形成され、前記第２の補助電極は前記第１の補助電極と重なる部分から面内方向に突き出た第２の突出部を含み、前記第２の突出部と前記第２導電型層が電気的に接続されてもよい。   In the semiconductor light emitting device, the second electrode is formed on an upper layer of the first electrode, and the second auxiliary electrode is a second protrusion protruding in an in-plane direction from a portion overlapping the first auxiliary electrode. A second protrusion and the second conductivity type layer may be electrically connected.

上記半導体発光素子において、前記第１の補助電極の前記発光層側の面を含む部分と前記第２の補助電極の前記発光層側の面を含む部分は異なる材料からなり、前記第１の補助電極と前記第２の補助電極のうちの下層に位置する方の前記面を含む部分は、上層に位置する方の前記面を含む部分よりも、前記発光層から発せられる光に対する反射率が高くてもよい。   In the semiconductor light emitting device, the portion including the surface on the light emitting layer side of the first auxiliary electrode and the portion including the surface on the light emitting layer side of the second auxiliary electrode are made of different materials, and the first auxiliary electrode is formed. Of the electrode and the second auxiliary electrode, the portion including the surface located in the lower layer has a higher reflectance with respect to light emitted from the light emitting layer than the portion including the surface located in the upper layer. May be.

上記半導体発光素子において、前記第１の補助電極と第２の補助電極の重なる領域において、前記第１の補助電極と前記第２の補助電極のうちの上層に位置する方の幅が、下層に位置する方の幅以下であってもよい。   In the semiconductor light emitting device, in a region where the first auxiliary electrode and the second auxiliary electrode overlap, a width of an upper layer of the first auxiliary electrode and the second auxiliary electrode is lower in a lower layer. It may be less than the width of the position.

本発明によれば、補助電極を有する半導体発光素子において、光取り出し効率の低下を抑えることができる。   ADVANTAGE OF THE INVENTION According to this invention, the fall of light extraction efficiency can be suppressed in the semiconductor light-emitting device which has an auxiliary electrode.

図１は、本発明の第１の実施の形態に係る半導体発光素子の分解斜視図である。FIG. 1 is an exploded perspective view of the semiconductor light emitting device according to the first embodiment of the present invention. 図２（ａ）、（ｂ）は、本発明の第１の実施の形態に係るｐ電極とｎ電極の配置関係を示す模式平面図である。2A and 2B are schematic plan views showing the positional relationship between the p electrode and the n electrode according to the first embodiment of the present invention. 図３は、図２（ａ）の線分Ａ−Ａに沿った半導体発光素子の垂直断面図である。FIG. 3 is a vertical cross-sectional view of the semiconductor light emitting device along the line AA in FIG. 図４（ａ）、（ｂ）は、第１の実施の形態の変形例に係る半導体発光素子のｐ電極とｎ電極の配置関係を示す模式平面図である。4A and 4B are schematic plan views showing the positional relationship between the p electrode and the n electrode of the semiconductor light emitting device according to the modification of the first embodiment. 図５（ａ）〜（ｃ）は、第１の実施の形態の変形例に係る半導体発光素子のｐ電極とｎ電極の配置関係を示す模式平面図である。FIGS. 5A to 5C are schematic plan views showing the positional relationship between the p electrode and the n electrode of the semiconductor light emitting device according to the modification of the first embodiment. 図６（ａ）、（ｂ）は、第１の実施の形態の変形例に係る半導体発光素子のｐ電極とｎ電極の配置関係を示す模式平面図である。6A and 6B are schematic plan views showing the positional relationship between the p electrode and the n electrode of the semiconductor light emitting device according to the modification of the first embodiment. 図７（ａ）、（ｂ）は、本発明の第２の実施例に係るｐ電極とｎ電極の配置関係を示す模式平面図である。FIGS. 7A and 7B are schematic plan views showing the positional relationship between the p-electrode and the n-electrode according to the second embodiment of the present invention. 図８は、図７（ａ）の線分Ｂ−Ｂに沿った半導体発光素子の垂直断面図である。FIG. 8 is a vertical cross-sectional view of the semiconductor light emitting device taken along line BB in FIG. 図９（ａ）〜（ｃ）は、第２の実施の形態の変形例に係るｐ電極とｎ電極の配置関係を示す模式平面図である。FIGS. 9A to 9C are schematic plan views showing the positional relationship between the p-electrode and the n-electrode according to the modification of the second embodiment.

〔第１の実施の形態〕
図１は、本発明の第１の実施の形態に係る半導体発光素子１の分解斜視図である。図１において、半導体発光素子１は層ごとに分解されて示される。 [First Embodiment]
FIG. 1 is an exploded perspective view of a semiconductor light emitting device 1 according to the first embodiment of the present invention. In FIG. 1, the semiconductor light emitting device 1 is shown broken down for each layer.

半導体発光素子１は、ｎ型半導体層１１、ｐ型半導体層１３、およびそれらに挟まれた発光層１２からなる半導体構造を有し、発光層１２のｐ型半導体層１３側から光を取り出すタイプ（フェイスアップ型）の発光素子である。ｎ型半導体層１１は、基板１０上に形成される。ｐ型半導体層１３上には透明電極１４が形成される。また、発光素子１は、発光層１２のｐ型半導体層１３側にｐ型半導体層１３に接続されるように形成されたｐ電極２０と、発光層１２のｐ型半導体層１３側にｎ型半導体層１１に接続されるように形成されたｎ電極３０を有する。   The semiconductor light emitting device 1 has a semiconductor structure including an n-type semiconductor layer 11, a p-type semiconductor layer 13, and a light-emitting layer 12 sandwiched between them, and takes out light from the p-type semiconductor layer 13 side of the light-emitting layer 12. It is a (face-up type) light emitting element. The n-type semiconductor layer 11 is formed on the substrate 10. A transparent electrode 14 is formed on the p-type semiconductor layer 13. The light-emitting element 1 includes a p-electrode 20 formed to be connected to the p-type semiconductor layer 13 on the p-type semiconductor layer 13 side of the light-emitting layer 12 and an n-type on the p-type semiconductor layer 13 side of the light-emitting layer 12. The n-electrode 30 is formed so as to be connected to the semiconductor layer 11.

ｎ型半導体層１１、発光層１２、およびｐ型半導体層１３は、それぞれIII族窒化物化合物半導体からなる層である。III族窒化物化合物半導体として、例えば、ＡｌｘＧａｙＩｎ１−ｘ−ｙＮ（ただし、０≦ｘ≦１、０≦ｙ≦１、０≦ｘ＋ｙ≦１）の四元系のIII族窒化物化合物半導体を用いることができる。 The n-type semiconductor layer 11, the light emitting layer 12, and the p-type semiconductor layer 13 are each a layer made of a group III nitride compound semiconductor. As a group III nitride compound semiconductor, for example, a quaternary group III nitride of Al x Ga y In 1-xy N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) A physical compound semiconductor can be used.

ｎ型半導体層１１は、例えば、ｎ型コンタクト層、ｎ型ＥＳＤ層、およびｎ型クラッド層からなる積層構造を有し、それらの各層は所定量のｎ型ドーパント（例えば、Ｓｉ）をドーピングしたｎ−ＧａＮからなる。   The n-type semiconductor layer 11 has, for example, a stacked structure including an n-type contact layer, an n-type ESD layer, and an n-type cladding layer, and each of these layers is doped with a predetermined amount of n-type dopant (for example, Si). It consists of n-GaN.

発光層１２は、複数の井戸層と複数の障壁層とを含んで形成される多重量子井戸構造を有する。井戸層は例えばＩｎＧａＮから、障壁層は例えばＧａＮ若しくはＡｌＧａＮ等から形成される。   The light emitting layer 12 has a multiple quantum well structure formed including a plurality of well layers and a plurality of barrier layers. The well layer is made of, for example, InGaN, and the barrier layer is made of, for example, GaN or AlGaN.

ｐ型半導体層１３は、例えば、ｐ型クラッド層およびｐ型コンタクト層からなる積層構造を有し、それらの各層は所定量のｐ型ドーパント（例えば、Ｍｇ）をドーピングしたｐ−ＧａＮから形成される。   The p-type semiconductor layer 13 has, for example, a laminated structure including a p-type cladding layer and a p-type contact layer, and each of these layers is formed of p-GaN doped with a predetermined amount of p-type dopant (for example, Mg). The

ｎ型半導体層１１、発光層１２、およびｐ型半導体層１３は、例えば、有機金属化学気相成長法（Metal Organic Chemical Vapor Deposition : MOCVD）、分子線エピタキシー法（Molecular Beam Epitaxy : MBE）、またはハライド気相エピタキシー法（Halide Vapor Phase Epitaxy : HVPE）により基板１０上に結晶を成長させることにより形成される。   The n-type semiconductor layer 11, the light-emitting layer 12, and the p-type semiconductor layer 13 are, for example, metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or It is formed by growing a crystal on the substrate 10 by a halide vapor phase epitaxy (HVPE).

基板１０は、例えば、サファイア基板である。   The substrate 10 is, for example, a sapphire substrate.

透明電極１４は、ｐ電極２０から流れる電流をｐ型半導体層１３へ均等に拡散させる機能を有する。透明電極１４は、例えば、ＩＴＯ（Indium Tin Oxide）から形成される。透明電極１４は、例えば、真空蒸着法、スパッタリング法、またはＣＶＤ法を用いて形成される。   The transparent electrode 14 has a function of evenly diffusing the current flowing from the p-electrode 20 to the p-type semiconductor layer 13. The transparent electrode 14 is made of, for example, ITO (Indium Tin Oxide). The transparent electrode 14 is formed using, for example, a vacuum deposition method, a sputtering method, or a CVD method.

ｐ型半導体層１３には、ｐ貫通電極２１および透明電極１４を介してｐ電極２０が接続される。また、透明電極１４、ｐ型半導体層１３、および発光層１２の一部が除去されることにより露出したｎ型半導体層１１の露出部分に、ｎ貫通電極３１を介してｎ電極３０が接続される。本実施の形態では、ｎ電極３０がｐ電極２０の上層に形成される。   A p-electrode 20 is connected to the p-type semiconductor layer 13 via a p-through electrode 21 and a transparent electrode 14. Further, the n electrode 30 is connected to the exposed portion of the n-type semiconductor layer 11 exposed by removing a part of the transparent electrode 14, the p-type semiconductor layer 13, and the light emitting layer 12 through the n through electrode 31. The In the present embodiment, n electrode 30 is formed in the upper layer of p electrode 20.

複数のｐ貫通電極２１が透明電極１４上の広い領域に渡って形成されるため、透明電極１４に電流を均一に拡散させることができる。また、複数のｎ貫通電極３１がｎ型半導体層１１上の広い領域に渡って形成されるため、ｎ型半導体層１１に電流を均一に拡散させることができる。   Since the plurality of p through electrodes 21 are formed over a wide area on the transparent electrode 14, the current can be uniformly diffused in the transparent electrode 14. Further, since the plurality of n through electrodes 31 are formed over a wide region on the n-type semiconductor layer 11, current can be uniformly diffused in the n-type semiconductor layer 11.

ｐ電極２０、ｎ電極３０、ｐ貫通電極２１、およびｎ貫通電極３１は、半導体構造上の絶縁層４０中に形成される。ｐ電極２０およびｎ電極３０を介してｎ型半導体層１１およびｐ型半導体層１３に電圧を印加することにより、発光層１２から光が発せられる。   The p electrode 20, the n electrode 30, the p through electrode 21, and the n through electrode 31 are formed in the insulating layer 40 on the semiconductor structure. Light is emitted from the light emitting layer 12 by applying a voltage to the n-type semiconductor layer 11 and the p-type semiconductor layer 13 via the p-electrode 20 and the n-electrode 30.

ｐ電極２０およびｎ電極３０は、例えば、Ｔｉ膜上にＡｕ膜を積層した構造、Ｎｉ膜上にＡｕ膜を積層した構造、またはＡｌ膜上にＡｕ膜を積層した構造を有する。ｐ電極２０およびｎ電極３０は、スパッタリング法等により形成することができる。   The p electrode 20 and the n electrode 30 have, for example, a structure in which an Au film is laminated on a Ti film, a structure in which an Au film is laminated on a Ni film, or a structure in which an Au film is laminated on an Al film. The p electrode 20 and the n electrode 30 can be formed by a sputtering method or the like.

ｐ電極２０は、ボンディングワイヤ等を接続するための台座電極２０ａ、台座電極２０ａから面内方向に延在する線状の補助電極２０ｂを含む。ｐ貫通電極２１は、補助電極２０ｂに接続される。   The p-electrode 20 includes a pedestal electrode 20a for connecting a bonding wire or the like, and a linear auxiliary electrode 20b extending in the in-plane direction from the pedestal electrode 20a. The p through electrode 21 is connected to the auxiliary electrode 20b.

ｎ電極３０は、ボンディングワイヤ等を接続するための台座電極３０ａ、台座電極３０ａから面内方向に延在する線状の補助電極３０ｂを含む。さらに、本実施の形態では、補助電極３０ｂは面内方向に突き出た突出部３０ｃを有する。ｎ貫通電極３１は、補助電極３０ｂの突出部３０ｃに接続される。   The n-electrode 30 includes a pedestal electrode 30a for connecting a bonding wire and the like, and a linear auxiliary electrode 30b extending in the in-plane direction from the pedestal electrode 30a. Further, in the present embodiment, the auxiliary electrode 30b has a protruding portion 30c protruding in the in-plane direction. The n through electrode 31 is connected to the protruding portion 30c of the auxiliary electrode 30b.

本実施の形態では、ｐ電極２０がｎ電極３０の下層に位置する。そのため、補助電極２０ｂの底面（発光層１２側の面）を含む部分は、補助電極３０ｂの底面（発光層１２側の面）を含む部分よりも、発光層１２から発せられる光に対する反射率が高くてもよい。例えば、ｐ電極２０がＡｌ膜上にＡｕ膜を積層した構造を有し、ｎ電極３０がＴｉ膜上にＡｕ膜を積層した構造を有する場合、補助電極２０ｂの底面を含む部分であるＡｌ膜は、補助電極３０ｂの底面を含む部分であるＴｉ膜よりも反射率が高い。なお、この場合、補助電極２０ｂの底面を含む部分と補助電極３０ｂの底面を含む部分は異なる材料からなる。   In the present embodiment, the p electrode 20 is positioned below the n electrode 30. Therefore, the portion including the bottom surface (the surface on the light emitting layer 12 side) of the auxiliary electrode 20b has a higher reflectance with respect to light emitted from the light emitting layer 12 than the portion including the bottom surface (the surface on the light emitting layer 12 side) of the auxiliary electrode 30b. It may be high. For example, when the p electrode 20 has a structure in which an Au film is laminated on an Al film and the n electrode 30 has a structure in which an Au film is laminated on a Ti film, the Al film which is a portion including the bottom surface of the auxiliary electrode 20b Is higher in reflectance than the Ti film which is a portion including the bottom surface of the auxiliary electrode 30b. In this case, the portion including the bottom surface of the auxiliary electrode 20b and the portion including the bottom surface of the auxiliary electrode 30b are made of different materials.

図２（ａ）、（ｂ）は、ｐ電極２０とｎ電極３０の配置関係を示す模式平面図である。ここで、図２（ａ）は、ｎ電極３０およびｎ貫通電極３１の位置を実線、ｐ電極２０の位置を点線で示している。また、図２（ｂ）は、ｐ電極２０およびｐ貫通電極２１の位置を実線、ｎ電極３０の位置を点線で示している。なお、図２（ａ）、（ｂ）においては、その他の部材の図示は省略する。また、図３は、図２（ａ）の線分Ａ−Ａに沿った半導体発光素子１の垂直断面図である。   FIGS. 2A and 2B are schematic plan views showing the positional relationship between the p-electrode 20 and the n-electrode 30. Here, FIG. 2A shows the position of the n electrode 30 and the n through electrode 31 by a solid line and the position of the p electrode 20 by a dotted line. FIG. 2B shows the positions of the p electrode 20 and the p through electrode 21 by solid lines and the position of the n electrode 30 by dotted lines. In addition, illustration of other members is abbreviate | omitted in FIG. 2 (a), (b). FIG. 3 is a vertical cross-sectional view of the semiconductor light emitting device 1 taken along the line AA in FIG.

図１〜３に示されるように、ｐ電極２０の補助電極２０ｂとｎ電極３０の補助電極３０ｂの少なくとも一部は、絶縁層４０を介して発光層１２の厚さ方向（図２の紙面に垂直な方向、図３中の垂直方向）に重なる。すなわち、補助電極２０ｂと補助電極３０ｂの少なくとも一部は、平面視で重なる。これにより、補助電極２０ｂと補助電極３０ｂの占める発光層１２上の面積を減らすことができる。このため、発光層１２から発せられる光を遮る領域が減少し、半導体発光素子１の光取り出し効率の低下を抑えることができる。   As shown in FIGS. 1 to 3, at least a part of the auxiliary electrode 20 b of the p electrode 20 and the auxiliary electrode 30 b of the n electrode 30 are disposed in the thickness direction of the light emitting layer 12 through the insulating layer 40 (on the paper surface of FIG. 2). In the vertical direction (vertical direction in FIG. 3). That is, at least a part of the auxiliary electrode 20b and the auxiliary electrode 30b overlap in plan view. Thereby, the area on the light emitting layer 12 which the auxiliary electrode 20b and the auxiliary electrode 30b occupy can be reduced. For this reason, the area | region which interrupts | blocks the light emitted from the light emitting layer 12 reduces, and the fall of the light extraction efficiency of the semiconductor light emitting element 1 can be suppressed.

また、効率よく補助電極２０ｂと補助電極３０ｂの占める発光層１２上の面積を減らすため、図１〜３に示されるように、ｐ電極２０の補助電極２０ｂとｎ電極３０の補助電極３０ｂの少なくとも一部は、互いの延伸方向がほぼ一致するように重なることが好ましい。   Also, in order to efficiently reduce the area on the light emitting layer 12 occupied by the auxiliary electrode 20b and the auxiliary electrode 30b, at least one of the auxiliary electrode 20b of the p-electrode 20 and the auxiliary electrode 30b of the n-electrode 30 as shown in FIGS. It is preferable that the portions overlap each other so that the stretching directions thereof are substantially the same.

また、補助電極２０ｂと補助電極３０ｂの幅が等しい場合、重なる領域において幅方向の位置が一致することが好ましいが、重なりがあれば幅方向にずれてもよい。また、本実施の形態では、ｎ電極３０がｐ電極２０の上層に位置する。そのため、少なくとも補助電極２０ｂと補助電極３０ｂの重なる領域において、補助電極３０ｂの幅は補助電極２０ｂの幅以下でもよい。   Further, when the auxiliary electrode 20b and the auxiliary electrode 30b have the same width, it is preferable that the positions in the width direction coincide with each other in the overlapping region. However, if there is an overlap, the width may be shifted in the width direction. In the present embodiment, n electrode 30 is located in the upper layer of p electrode 20. Therefore, at least in the region where the auxiliary electrode 20b and the auxiliary electrode 30b overlap, the width of the auxiliary electrode 30b may be equal to or smaller than the width of the auxiliary electrode 20b.

なお、補助電極３０ｂの補助電極２０ｂと重なる部分からも突出部３０ｃが突き出ており、ｎ貫通電極３１は、突出部３０ｃに接続されるため、補助電極３０ｂ下の補助電極２０ｂと接触することはない。また、図１〜３においては、突出部３０ｃは素子の内側に向かって突き出ているが、外側に向かって突き出ていてもよく、また、場所ごとに異なる方向に突き出ていてもよい。さらに、突出部３０ｃを形成する代わりに、補助電極２０ｂのｎ貫通電極３１下の部分の形状をｎ貫通電極３１を迂回して避けるようなものにしてもよい。   Note that the protruding portion 30c protrudes from the portion of the auxiliary electrode 30b that overlaps the auxiliary electrode 20b, and the n through electrode 31 is connected to the protruding portion 30c, so that it does not contact the auxiliary electrode 20b below the auxiliary electrode 30b. Absent. 1 to 3, the protruding portion 30 c protrudes toward the inside of the element, but may protrude toward the outside, or may protrude in a different direction for each place. Furthermore, instead of forming the protruding portion 30 c, the shape of the portion below the n through electrode 31 of the auxiliary electrode 20 b may be avoided to bypass the n through electrode 31.

なお、ｐ貫通電極２１は形成されなくてもよい。この場合、ｐ電極２０は、透明電極１４上に直接形成される。   Note that the p through electrode 21 may not be formed. In this case, the p-electrode 20 is formed directly on the transparent electrode 14.

絶縁層４０は、ＳｉＯ２、ＳｉＮ等の絶縁材料からなる。また、絶縁層４０の材料として、ＴｉＯ２、Ａｌ２Ｏ３、Ｔａ２Ｏ５等の金属酸化物、若しくはポリイミド等の電気絶縁性を有する樹脂材料を用いることができる。絶縁層４０は、真空蒸着法、化学気相成長法（Chemical Vapor Deposition : CVD）等により形成される。 The insulating layer 40 is made of an insulating material such as SiO 2 or SiN. Further, as the material of the insulating layer 40, a metal oxide such as TiO 2 , Al 2 O 3 , Ta 2 O 5 , or a resin material having electrical insulation properties such as polyimide can be used. The insulating layer 40 is formed by vacuum vapor deposition, chemical vapor deposition (CVD), or the like.

図４（ａ）、（ｂ）は、変形例に係る半導体発光素子１のｐ電極２０とｎ電極３０の配置関係を示す模式平面図である。ここで、図４（ａ）は、ｎ電極３０およびｎ貫通電極３１の位置を実線、ｐ電極２０およびｐ貫通電極２１の位置を点線で示している。また、図４（ｂ）は、ｐ電極２０およびｐ貫通電極２１の位置を実線、ｎ電極３０およびｎ貫通電極３１の位置を点線で示している。なお、図４（ａ）、（ｂ）においては、その他の部材の図示は省略する。   4A and 4B are schematic plan views showing the positional relationship between the p-electrode 20 and the n-electrode 30 of the semiconductor light emitting device 1 according to the modification. Here, FIG. 4A shows the positions of the n electrode 30 and the n through electrode 31 by solid lines and the positions of the p electrode 20 and the p through electrode 21 by dotted lines. FIG. 4B shows the positions of the p electrode 20 and the p through electrode 21 by solid lines and the positions of the n electrode 30 and the n through electrode 31 by dotted lines. In addition, illustration of other members is abbreviate | omitted in FIG. 4 (a), (b).

この変形例においては、ｐ電極２０の補助電極２０ｂは突出部２０ｃを有する。この場合、ｐ貫通電極２１は突出部２０ｃに接続される。突出部２０ｃの突き出る方向は、突出部３０ｃと同様に、特定の方向に限定されないが、図４（ａ）の鎖線に示されるように、突出部２０ｃと突出部３０ｃの突き出る方向が逆であり、ｎ貫通電極３１とｐ貫通電極２１が平面視で正六角形の頂点に配置されることが好ましい。   In this modification, the auxiliary electrode 20b of the p-electrode 20 has a protrusion 20c. In this case, the p through electrode 21 is connected to the protrusion 20c. The protruding direction of the protruding portion 20c is not limited to a specific direction like the protruding portion 30c, but the protruding direction of the protruding portion 20c and the protruding portion 30c is opposite as shown by the chain line in FIG. It is preferable that the n through electrode 31 and the p through electrode 21 are arranged at the apex of a regular hexagon in plan view.

また、ｐ電極２０とｎ電極３０の平面形状は、図１〜４に示したものに限られない。図５、６は、それぞれｐ電極２０とｎ電極３０の平面形状の一例を表す。   Further, the planar shapes of the p-electrode 20 and the n-electrode 30 are not limited to those shown in FIGS. 5 and 6 show examples of planar shapes of the p-electrode 20 and the n-electrode 30, respectively.

図５（ａ）〜（ｃ）は、変形例に係るｐ電極２０とｎ電極３０の配置関係を示す模式平面図である。ここで、図５（ａ）は、ｎ電極３０およびｎ貫通電極３１の位置を実線、ｐ電極２０を点線で示している。図５（ｂ）は、ｎ貫通電極３１および線状電極３２の位置を実線、ｐ電極２０を点線で示している。また、図５（ｃ）は、ｐ電極２０およびｐ貫通電極２１の位置を実線、ｎ電極３０の位置を点線で示している。なお、図５（ａ）〜（ｃ）においては、その他の部材の図示は省略する。   5A to 5C are schematic plan views showing the positional relationship between the p-electrode 20 and the n-electrode 30 according to the modification. Here, FIG. 5A shows the positions of the n electrode 30 and the n through electrode 31 by solid lines and the p electrode 20 by dotted lines. FIG. 5B shows the positions of the n through electrode 31 and the linear electrode 32 by solid lines and the p electrode 20 by dotted lines. FIG. 5C shows the positions of the p electrode 20 and the p through electrode 21 by solid lines and the position of the n electrode 30 by dotted lines. In addition, illustration of other members is abbreviate | omitted in Fig.5 (a)-(c).

この変形例においては、ｎ貫通電極３１に接続される線状電極３２が形成される。線状電極３２は、ｎ型半導体層１１上に形成される線状の電極であり、ｎ型半導体層１１に電流を均一に拡散させる機能を有する。ｎ電極３０は、ｎ貫通電極３１および線状電極３２を介してｎ型半導体層１１に接続される。ｐ電極２０は、ｐ貫通電極２１を介して透明電極１４に接続される。この変形例においても、ｎ電極３０の補助電極３０ｂとｐ電極２０の補助電極２０ｂの一部が、絶縁層４０を介して発光層１２の厚さ方向に重なる。   In this modification, a linear electrode 32 connected to the n through electrode 31 is formed. The linear electrode 32 is a linear electrode formed on the n-type semiconductor layer 11 and has a function of uniformly diffusing current to the n-type semiconductor layer 11. The n electrode 30 is connected to the n-type semiconductor layer 11 through the n through electrode 31 and the linear electrode 32. The p electrode 20 is connected to the transparent electrode 14 via the p through electrode 21. Also in this modification, a part of the auxiliary electrode 30b of the n-electrode 30 and the auxiliary electrode 20b of the p-electrode 20 overlap with each other in the thickness direction of the light emitting layer 12 with the insulating layer 40 interposed therebetween.

図６（ａ）、（ｂ）は、変形例に係るｐ電極２０とｎ電極３０の配置関係を示す模式平面図である。ここで、図６（ａ）は、ｎ電極３０およびｎ貫通電極３１の位置を実線、ｐ電極２０を点線で示している。また、図６（ｂ）は、ｐ電極２０およびｐ貫通電極２１の位置を実線、ｎ電極３０の位置を点線で示している。なお、図６（ａ）、（ｂ）においては、その他の部材の図示は省略する。   6A and 6B are schematic plan views showing the positional relationship between the p-electrode 20 and the n-electrode 30 according to the modification. Here, FIG. 6A shows the positions of the n electrode 30 and the n through electrode 31 by solid lines and the p electrode 20 by dotted lines. FIG. 6B shows the positions of the p electrode 20 and the p through electrode 21 by solid lines and the position of the n electrode 30 by dotted lines. In addition, illustration of other members is abbreviate | omitted in FIG. 6 (a), (b).

ｎ電極３０は、ｎ貫通電極３１を介してｎ型半導体層１１に接続される。ｐ電極２０は、ｐ貫通電極２１を介して透明電極１４に接続される。この変形例においても、ｎ電極３０の補助電極３０ｂとｐ電極２０の補助電極２０ｂの一部が、絶縁層４０を介して発光層１２の厚さ方向に重なる。   The n electrode 30 is connected to the n-type semiconductor layer 11 through the n through electrode 31. The p electrode 20 is connected to the transparent electrode 14 via the p through electrode 21. Also in this modification, a part of the auxiliary electrode 30b of the n-electrode 30 and the auxiliary electrode 20b of the p-electrode 20 overlap with each other in the thickness direction of the light emitting layer 12 with the insulating layer 40 interposed therebetween.

〔第２の実施の形態〕
第２の実施の形態の半導体発光素子２は、ｐ電極がｎ電極の上層に形成される点において第１の実施の形態と異なる。なお、半導体構造等、第１の実施の形態と同様の点については、説明を省略または簡略化する。 [Second Embodiment]
The semiconductor light emitting device 2 according to the second embodiment is different from the first embodiment in that the p-electrode is formed in the upper layer of the n-electrode. Note that the description of the same points as in the first embodiment, such as the semiconductor structure, is omitted or simplified.

図７（ａ）、（ｂ）は、本発明の第２の実施例に係るｐ電極５０とｎ電極６０の配置関係を示す模式平面図である。ここで、図７（ａ）は、ｐ電極５０およびｐ貫通電極５１の位置を実線、ｎ電極６０の位置を点線で示している。また、図７（ｂ）は、ｎ電極６０およびｎ貫通電極６１の位置を実線、ｐ電極５０の位置を点線で示している。なお、図７（ａ）、（ｂ）においては、その他の部材の図示は省略する。また、図８は、図７（ａ）の線分Ｂ−Ｂに沿った半導体発光素子２の垂直断面図である。   7A and 7B are schematic plan views showing the positional relationship between the p-electrode 50 and the n-electrode 60 according to the second embodiment of the present invention. Here, FIG. 7A shows the position of the p electrode 50 and the p through electrode 51 by a solid line and the position of the n electrode 60 by a dotted line. FIG. 7B shows the positions of the n electrode 60 and the n through electrode 61 by solid lines and the position of the p electrode 50 by dotted lines. In addition, illustration of other members is abbreviate | omitted in FIG. 7 (a), (b). FIG. 8 is a vertical cross-sectional view of the semiconductor light emitting device 2 taken along line BB in FIG.

ｐ型半導体層１３には、ｐ貫通電極５１および透明電極１４を介してｐ電極５０が接続される。また、透明電極１４、ｐ型半導体層１３、および発光層１２の一部が除去されることにより露出したｎ型半導体層１１の露出部分に、ｎ貫通電極６１を介してｎ電極６０が接続される。   A p-electrode 50 is connected to the p-type semiconductor layer 13 via a p-through electrode 51 and a transparent electrode 14. Further, the n electrode 60 is connected to the exposed portion of the n-type semiconductor layer 11 exposed by removing a part of the transparent electrode 14, the p-type semiconductor layer 13, and the light emitting layer 12 through the n through electrode 61. The

本実施の形態では、ｐ電極５０がｎ電極６０の上層に形成される。ｐ電極５０は、ボンディングワイヤ等を接続するための台座電極５０ａ、台座電極５０ａから面内方向に延在する線状の補助電極５０ｂを含む。さらに、本実施の形態では、補助電極５０ｂは面内方向に突き出た突出部５０ｃを有する。ｐ貫通電極５１は、補助電極５０ｂの突出部５０ｃに接続される。   In the present embodiment, the p-electrode 50 is formed in the upper layer of the n-electrode 60. The p-electrode 50 includes a pedestal electrode 50a for connecting a bonding wire and the like, and a linear auxiliary electrode 50b extending in the in-plane direction from the pedestal electrode 50a. Further, in the present embodiment, the auxiliary electrode 50b has a protruding portion 50c protruding in the in-plane direction. The p through electrode 51 is connected to the protruding portion 50c of the auxiliary electrode 50b.

ｎ電極６０は、ボンディングワイヤ等を接続するための台座電極６０ａ、台座電極６０ａから面内方向に延在する線状の補助電極６０ｂを含む。ｎ貫通電極６１は、補助電極６０ｂに接続される。   The n-electrode 60 includes a pedestal electrode 60a for connecting a bonding wire and the like, and a linear auxiliary electrode 60b extending in the in-plane direction from the pedestal electrode 60a. The n through electrode 61 is connected to the auxiliary electrode 60b.

本実施の形態では、ｎ電極６０がｐ電極５０の下層に位置する。そのため、補助電極６０ｂの底面を含む部分は、補助電極５０ｂの底面を含む部分よりも、発光層１２から発せられる光に対する反射率が高くてもよい。なお、この場合、補助電極２０ｂの底面を含む部分と補助電極３０ｂの底面を含む部分は異なる材料からなる。また、少なくとも補助電極５０ｂと補助電極６０ｂの重なる領域において、補助電極５０ｂの幅は、補助電極６０ｂの幅以下でもよい。   In the present embodiment, the n-electrode 60 is positioned below the p-electrode 50. Therefore, the portion including the bottom surface of the auxiliary electrode 60b may have a higher reflectance with respect to light emitted from the light emitting layer 12 than the portion including the bottom surface of the auxiliary electrode 50b. In this case, the portion including the bottom surface of the auxiliary electrode 20b and the portion including the bottom surface of the auxiliary electrode 30b are made of different materials. In addition, at least in the region where the auxiliary electrode 50b and the auxiliary electrode 60b overlap, the width of the auxiliary electrode 50b may be equal to or smaller than the width of the auxiliary electrode 60b.

図７、８に示されるように、ｐ電極５０の補助電極５０ｂとｎ電極６０の補助電極６０ｂの少なくとも一部は、絶縁層４０を介して発光層１２の厚さ方向に重なる。これにより、補助電極５０ｂと補助電極６０ｂの占める発光層１２上の面積を減らすことができる。このため、発光層１２から発せられる光を遮る領域が減少し、半導体発光素子２の光取り出し効率の低下を抑えることができる。   As shown in FIGS. 7 and 8, at least a part of the auxiliary electrode 50 b of the p electrode 50 and the auxiliary electrode 60 b of the n electrode 60 overlap with each other in the thickness direction of the light emitting layer 12 with the insulating layer 40 interposed therebetween. Thereby, the area on the light emitting layer 12 which the auxiliary electrode 50b and the auxiliary electrode 60b occupy can be reduced. For this reason, the area | region which interrupts the light emitted from the light emitting layer 12 reduces, and the fall of the light extraction efficiency of the semiconductor light-emitting element 2 can be suppressed.

また、ｐ電極５０とｎ電極６０の平面形状は、図７、８に示したものに限られない。図９は、ｐ電極５０とｎ電極６０の平面形状の一例を表す。   Further, the planar shapes of the p-electrode 50 and the n-electrode 60 are not limited to those shown in FIGS. FIG. 9 shows an example of the planar shape of the p electrode 50 and the n electrode 60.

図９（ａ）〜（ｃ）は、変形例に係るｐ電極５０とｎ電極６０の配置関係を示す模式平面図である。ここで、図９（ａ）は、ｐ電極５０およびｐ貫通電極５１の位置を実線、ｎ電極６０の位置を点線で示している。図９（ｂ）は、ｎ電極６０およびｎ貫通電極６１の位置を実線、ｐ電極５０を点線で示している。また、図９（ｃ）は、ｎ貫通電極６１および線状電極６２の位置を実線、ｐ電極５０を点線で示している。なお、図９（ａ）〜（ｃ）においては、その他の部材の図示は省略する。   9A to 9C are schematic plan views showing the positional relationship between the p-electrode 50 and the n-electrode 60 according to the modification. Here, FIG. 9A shows the positions of the p electrode 50 and the p through electrode 51 by solid lines and the position of the n electrode 60 by dotted lines. FIG. 9B shows the positions of the n electrode 60 and the n through electrode 61 by solid lines and the p electrode 50 by dotted lines. FIG. 9C shows the positions of the n through electrode 61 and the linear electrode 62 by solid lines and the p electrode 50 by dotted lines. In addition, illustration of other members is abbreviate | omitted in Fig.9 (a)-(c).

この変形例においては、ｎ貫通電極６１に接続される線状電極６２が形成される。線状電極６２は、ｎ型半導体層１１上に形成される線状の電極であり、ｎ型半導体層１１に電流を均一に拡散させる機能を有する。ｎ電極６０は、ｎ貫通電極６１および線状電極６２を介してｎ型半導体層１１に接続される。ｐ電極５０は、ｐ貫通電極５１を介して透明電極１４に接続される。この変形例においても、ｎ電極６０の補助電極６０ｂとｐ電極５０の補助電極５０ｂの一部が、絶縁層４０を介して発光層１２の厚さ方向に重なる。   In this modification, a linear electrode 62 connected to the n through electrode 61 is formed. The linear electrode 62 is a linear electrode formed on the n-type semiconductor layer 11 and has a function of uniformly diffusing current to the n-type semiconductor layer 11. The n electrode 60 is connected to the n-type semiconductor layer 11 through the n through electrode 61 and the linear electrode 62. The p electrode 50 is connected to the transparent electrode 14 via the p through electrode 51. Also in this modification, a part of the auxiliary electrode 60b of the n-electrode 60 and the auxiliary electrode 50b of the p-electrode 50 overlap with each other in the thickness direction of the light emitting layer 12 with the insulating layer 40 interposed therebetween.

なお、上記の第１および第２の実施の形態においては、半導体積層構造のｎ型の層とｐ型の層が逆であってもよい。すなわち、ｎ型半導体層１１の代わりにｐ型半導体層が形成され、ｐ型半導体層１３の代わりにｎ型半導体層が形成されてもよい。   In the first and second embodiments described above, the n-type layer and the p-type layer of the semiconductor multilayer structure may be reversed. That is, a p-type semiconductor layer may be formed instead of the n-type semiconductor layer 11, and an n-type semiconductor layer may be formed instead of the p-type semiconductor layer 13.

本発明は、上記の実施の形態に限定されず、発明の主旨を逸脱しない範囲内において種々変形実施が可能である。また、発明の主旨を逸脱しない範囲内において上記実施の形態の構成要素を任意に組み合わせることができる。   The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the invention. In addition, the constituent elements of the above-described embodiment can be arbitrarily combined without departing from the spirit of the invention.

また、上記の実施の形態は特許請求の範囲に係る発明を限定するものではない。また、実施の形態の中で説明した特徴の組合せの全てが発明の課題を解決するための手段に必須であるとは限らない点に留意すべきである。   Moreover, said embodiment does not limit the invention which concerns on a claim. In addition, it should be noted that not all the combinations of features described in the embodiments are essential to the means for solving the problems of the invention.

１ 半導体発光素子
２ 半導体発光素子
１１ ｎ型半導体層
１２ 発光層
１３ ｐ型半導体層
２０ ｐ電極
２０ａ 台座電極
２０ｂ 補助電極
２０ｃ 突出部
３０ ｎ電極
３０ａ 台座電極
３０ｂ 補助電極
３０ｃ 突出部
４０ 絶縁層 DESCRIPTION OF SYMBOLS 1 Semiconductor light emitting element 2 Semiconductor light emitting element 11 N type semiconductor layer 12 Light emitting layer 13 P type semiconductor layer 20 P electrode 20a Base electrode 20b Auxiliary electrode 20c Protrusion part 30 n electrode 30a Base electrode 30b Auxiliary electrode 30c Protrusion part 40 Insulating layer

Claims (6)

第１導電型層と第２導電型層とに挟まれた発光層を有する半導体積層構造を有し、前記第２導電型層から光を取り出す半導体発光素子であって、
前記第１導電型層に接続されるように前記第２導電型層上に位置し、第１の台座電極および前記第１の台座電極から面内方向に延在する線状の第１の補助電極を含む第１の電極と、
前記第２導電型層に接続されるように前記第２導電型層上に位置し、第２の台座電極および前記第２の台座電極から面内方向に延在する線状の第２の補助電極を含む第２の電極と、
を有し、
前記第１の電極と前記第２の電極は、絶縁層を介して配置され、前記第１の補助電極と前記第２の補助電極の少なくとも一部が、前記絶縁層を介して前記光の取り出し方向において重なる、
半導体発光素子。 A semiconductor light emitting device having a semiconductor laminated structure having a light emitting layer sandwiched between a first conductivity type layer and a second conductivity type layer, and for extracting light from the second conductivity type layer,
Located on the second conductivity type layer to be connected before Symbol first conductivity type layer, linear first extending in an in-plane direction from the first pad electrode and the first pad electrode A first electrode including an auxiliary electrode;
Located on the second conductivity type layer to be connected before Symbol second conductivity type layer, linear second extending in-plane direction from the second pad electrode and the second pad electrode A second electrode including an auxiliary electrode;
Have
Wherein the first electrode the second electrode is disposed over the insulating layer, wherein at least a portion of the first auxiliary electrode and the second auxiliary electrode is taken out of said through an insulating layer light It overlaps Oite in direction,
Semiconductor light emitting device. 前記第１の補助電極と前記第２の補助電極の少なくとも一部は、互いに延伸方向が一致するように重なる、
請求項１に記載の半導体発光素子。 At least a portion of the first auxiliary electrode and the second auxiliary electrode overlap so that the extending directions thereof coincide with each other;
The semiconductor light emitting device according to claim 1. 前記第１の電極は前記第２の電極の上層に形成され、
前記第１の補助電極は前記第２の補助電極と重なる部分から面内方向に突き出た第１の突出部を含み、
前記第１の突出部と前記第１導電型層が電気的に接続される、
請求項１または２に記載の半導体発光素子。 The first electrode is formed on an upper layer of the second electrode;
The first auxiliary electrode includes a first protrusion protruding in an in-plane direction from a portion overlapping the second auxiliary electrode,
The first protrusion and the first conductivity type layer are electrically connected;
The semiconductor light emitting device according to claim 1. 前記第２の電極は前記第１の電極の上層に形成され、
前記第２の補助電極は、前記第１の補助電極と重なる部分から面内方向に突き出た第２の突出部を含み、
前記第２の突出部と前記第２導電型層が電気的に接続される、
請求項１または２に記載の半導体発光素子。 The second electrode is formed in an upper layer of the first electrode;
The second auxiliary electrode includes a second protrusion protruding in an in-plane direction from a portion overlapping the first auxiliary electrode,
The second protrusion and the second conductivity type layer are electrically connected;
The semiconductor light emitting device according to claim 1. 前記第１の補助電極の前記発光層側の面を含む部分と前記第２の補助電極の前記発光層側の面を含む部分は異なる材料からなり、
前記第１の補助電極と前記第２の補助電極のうちの下層に位置する方の前記面を含む部分は、上層に位置する方の前記面を含む部分よりも、前記発光層から発せられる光に対する反射率が高い、
請求項１または２に記載の半導体発光素子。 The portion including the surface on the light emitting layer side of the first auxiliary electrode and the portion including the surface on the light emitting layer side of the second auxiliary electrode are made of different materials,
Of the first auxiliary electrode and the second auxiliary electrode, the portion including the surface located in the lower layer is light emitted from the light emitting layer than the portion including the surface located in the upper layer. High reflectivity for
The semiconductor light emitting device according to claim 1. 前記第１の補助電極と第２の補助電極の重なる領域において、前記第１の補助電極と前記第２の補助電極のうち上層に位置する方の幅が、下層に位置する方の幅以下である、
請求項１または２に記載の半導体発光素子。 In the region where the first auxiliary electrode and the second auxiliary electrode overlap, the width of the first auxiliary electrode and the second auxiliary electrode located in the upper layer is less than the width of the one located in the lower layer. is there,
The semiconductor light emitting device according to claim 1.
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