JP5453270B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5453270B2 JP5453270B2 JP2010525314A JP2010525314A JP5453270B2 JP 5453270 B2 JP5453270 B2 JP 5453270B2 JP 2010525314 A JP2010525314 A JP 2010525314A JP 2010525314 A JP2010525314 A JP 2010525314A JP 5453270 B2 JP5453270 B2 JP 5453270B2
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- 239000004065 semiconductor Substances 0.000 title claims 14
- 230000015556 catabolic process Effects 0.000 claims description 36
- 239000000758 substrate Substances 0.000 claims description 32
- 239000002184 metal Substances 0.000 claims description 23
- 230000004888 barrier function Effects 0.000 claims description 8
- 230000000694 effects Effects 0.000 claims description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 7
- 230000000903 blocking effect Effects 0.000 description 20
- 230000005684 electric field Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 230000008901 benefit Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Electrodes Of Semiconductors (AREA)
Description
本発明の核心は、高いロバスト性および比較的低い順方向電圧を有し、ツェナーダイオードとして自動車のジェネレータシステムへの使用に適しているショットキーダイオード、ならびにその種のショットキーダイオードの製造時のプロセス管理にある。
−出発材料としてのn+型サブストレート
−エピタキシ
−n型+サブストレートまでのトレンチエッチング
−トレンチ表面の酸化
−トレンチ底部における酸化層のエッチング
−p型にドープされたSiまたはPoly−Siによるトレンチの充填
−トレンチの上部領域における薄いp+型層の拡散
−前面および裏面の金属化。
Claims (9)
- クリップ素子としてのPNダイオードとMOS構造体とショットキーダイオードとの少なくとも1つの組み合わせを有するトレンチMOSバリア・ショットキー・ダイオードを備えた半導体装置において、
前記PNダイオードは集積されたサブストレートPNダイオードとして構成されており、該サブストレートPNダイオードの降伏電圧(BV_pn)は前記ショットキーダイオードの降伏電圧(BV_schottky)および前記MOS構造体の降伏電圧(BV_mos)より低く、
n型エピ層(2)がn + 型サブストレート(1)上に設けられており、且つ前記ショットキーダイオードのカソード領域として使用され、
金属層(4)が前記半導体装置の前面上の前記ショットキーバリアダイオードのアノードとして使用され、
前記n型エピ層(2)を通り前記n + 型サブストレート(1)までエッチングされた少なくとも2つのトレンチ(6)が設けられており、
該トレンチ(6)の側壁に酸化層(7)が設けられており、
前記トレンチ(6)内の前記酸化層(7)間の領域(8)がp型ドープされたSiまたはPoly−Siによって充填されており、且つ前記サブストレートPNダイオードのアノード領域として使用され、
薄いp + 型層(9)が前記トレンチの上部領域(8)に設けられている、
ことを特徴とする、半導体装置。 - 大電流でもって降伏動作される、請求項1記載の半導体装置。
- 20Vの降伏電圧を有するツェナーダイオードとして自動車のジェネレータシステムに使用される、請求項1または2記載の半導体装置。
- チップの裏面における金属層(5)が設けられており、且つカソード電極として使用され、
前記金属層(4)が、p+型層(9)とのオームコンタクトを有し、n型エピ層(2)とのショットキーコンタクトを有し、アノード電極として使用される、請求項1から3までのいずれか1項記載の半導体装置。 - 前記トレンチ(6)は前記n型エピ層(2)を通って前記n+型サブストレート(1)までエッチングされ、矩形の形状、U字状の形状または他の所定の選択可能な形状を有する、請求項1から4までのいずれか1項記載の半導体装置。
- p型ウェル(8)は、パンチスルー効果が生じず、且つp型ウェル(8)とn+型サブストレート(1)との間の接合部においてサブストレートPNダイオードの降伏が生じるように構成される、請求項1から5までのいずれか1項記載の半導体装置。
- 上下に積層された2つまたはそれ以上の金属層からなる金属化部が設けられている、請求項1から6までのいずれか1項記載の半導体装置。
- 前記トレンチ(6)は帯状に配置されているか、アイランドとして配置されている、請求項1から7までのいずれか1項記載の半導体装置。
- 前記アイランドは円形、矩形または所定の形状で構成されている、請求項8記載の半導体装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102007045185.9 | 2007-09-21 | ||
DE102007045185A DE102007045185A1 (de) | 2007-09-21 | 2007-09-21 | Halbleitervorrichtung und Verfahren zu deren Herstellung |
PCT/EP2008/062251 WO2009040265A1 (de) | 2007-09-21 | 2008-09-15 | Halbleitervorrichtung |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010539719A JP2010539719A (ja) | 2010-12-16 |
JP5453270B2 true JP5453270B2 (ja) | 2014-03-26 |
Family
ID=40028426
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010525314A Expired - Fee Related JP5453270B2 (ja) | 2007-09-21 | 2008-09-15 | 半導体装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8497563B2 (ja) |
JP (1) | JP5453270B2 (ja) |
CN (1) | CN101803032B (ja) |
DE (1) | DE102007045185A1 (ja) |
WO (1) | WO2009040265A1 (ja) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102009028240A1 (de) * | 2009-08-05 | 2011-02-10 | Robert Bosch Gmbh | Feldeffekttransistor mit integrierter TJBS-Diode |
DE102009028252A1 (de) * | 2009-08-05 | 2011-02-10 | Robert Bosch Gmbh | Halbleiteranordnung |
DE102009046606A1 (de) | 2009-11-11 | 2011-05-12 | Robert Bosch Gmbh | Schutzelement für elektronische Schaltungen |
JP5579548B2 (ja) * | 2010-09-08 | 2014-08-27 | 新電元工業株式会社 | 半導体装置、および、その製造方法 |
DE102011080258A1 (de) * | 2011-08-02 | 2013-02-07 | Robert Bosch Gmbh | Super-Junction-Schottky-Oxid-PiN-Diode |
CN103094356B (zh) * | 2011-11-04 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | 功率二极管的器件结构 |
CN103137711A (zh) * | 2011-11-21 | 2013-06-05 | 朱江 | 一种具有绝缘层隔离结构肖特基半导体装置及其制备方法 |
CN103137710B (zh) * | 2011-11-21 | 2016-08-03 | 朱江 | 一种具有多种绝缘层隔离的沟槽肖特基半导体装置及其制备方法 |
CN103137684A (zh) * | 2011-11-21 | 2013-06-05 | 朱江 | 一种具有绝缘层隔离的超结结构半导体晶片及其制备方法 |
CN103199119B (zh) * | 2012-01-06 | 2017-05-17 | 盛况 | 一种具有超结结构的沟槽肖特基半导体装置及其制备方法 |
CN103199102A (zh) * | 2012-01-06 | 2013-07-10 | 盛况 | 一种具有超结结构的肖特基半导体装置及其制备方法 |
CN103208533B (zh) * | 2012-01-13 | 2017-02-08 | 朱江 | 一种肖特基超结半导体装置及其制备方法 |
CN103208511A (zh) * | 2012-01-13 | 2013-07-17 | 盛况 | 一种超结肖特基半导体装置及其制备方法 |
DE102012201911B4 (de) * | 2012-02-09 | 2022-09-22 | Robert Bosch Gmbh | Super-Junction-Schottky-Oxid-PiN-Diode mit dünnen p-Schichten unter dem Schottky-Kontakt |
CN103378172B (zh) * | 2012-04-28 | 2017-02-08 | 朱江 | 一种肖特基半导体装置及其制备方法 |
CN103378131A (zh) * | 2012-04-29 | 2013-10-30 | 朱江 | 一种电荷补偿肖特基半导体装置及其制造方法 |
CN103378174B (zh) * | 2012-04-29 | 2017-02-15 | 朱江 | 一种具有电荷补偿肖特基半导体装置及其制备方法 |
CN103378176B (zh) * | 2012-04-30 | 2017-10-20 | 朱江 | 一种具有电荷补偿肖特基半导体装置及其制造方法 |
CN103515449B (zh) * | 2012-06-14 | 2017-08-08 | 朱江 | 一种具有电荷补偿沟槽肖特基半导体装置及其制备方法 |
CN103578999A (zh) * | 2012-08-01 | 2014-02-12 | 上海华虹Nec电子有限公司 | 一种超级结的制备工艺方法 |
DE102015118165A1 (de) | 2015-10-23 | 2017-04-27 | Infineon Technologies Ag | Elektrische baugruppe, umfassend eine halbleiterschaltvorrichtung und eine klemmdiode |
CN113193052B (zh) * | 2021-04-29 | 2023-02-14 | 东莞市佳骏电子科技有限公司 | 一种大导通电流的碳化硅二极管 |
CN114883417B (zh) * | 2022-07-04 | 2022-10-18 | 深圳市威兆半导体股份有限公司 | 一种具有导通压降自钳位的半导体器件及其制备方法 |
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CN1019720B (zh) * | 1991-03-19 | 1992-12-30 | 电子科技大学 | 半导体功率器件 |
US5365102A (en) | 1993-07-06 | 1994-11-15 | North Carolina State University | Schottky barrier rectifier with MOS trench |
US6252288B1 (en) * | 1999-01-19 | 2001-06-26 | Rockwell Science Center, Llc | High power trench-based rectifier with improved reverse breakdown characteristic |
JP3860705B2 (ja) | 2000-03-31 | 2006-12-20 | 新電元工業株式会社 | 半導体装置 |
JP4547790B2 (ja) * | 2000-10-05 | 2010-09-22 | 富士電機システムズ株式会社 | 半導体装置 |
CN1179397C (zh) * | 2001-09-27 | 2004-12-08 | 同济大学 | 一种制造含有复合缓冲层半导体器件的方法 |
EP1516369A1 (en) * | 2002-06-26 | 2005-03-23 | Cambridge Semiconductor Limited | Lateral semiconductor device |
JP2006100645A (ja) * | 2004-09-30 | 2006-04-13 | Furukawa Electric Co Ltd:The | GaN系半導体集積回路 |
DE102004053760A1 (de) * | 2004-11-08 | 2006-05-11 | Robert Bosch Gmbh | Halbleitereinrichtung und Verfahren für deren Herstellung |
DE102004053761A1 (de) * | 2004-11-08 | 2006-05-18 | Robert Bosch Gmbh | Halbleitereinrichtung und Verfahren für deren Herstellung |
DE102004059640A1 (de) | 2004-12-10 | 2006-06-22 | Robert Bosch Gmbh | Halbleitereinrichtung und Verfahren zu deren Herstellung |
JP5303819B2 (ja) | 2005-08-05 | 2013-10-02 | 住友電気工業株式会社 | 半導体装置およびその製造方法 |
JP4412344B2 (ja) | 2007-04-03 | 2010-02-10 | 株式会社デンソー | 半導体装置およびその製造方法 |
-
2007
- 2007-09-21 DE DE102007045185A patent/DE102007045185A1/de not_active Withdrawn
-
2008
- 2008-09-15 CN CN200880107842XA patent/CN101803032B/zh not_active Expired - Fee Related
- 2008-09-15 US US12/733,753 patent/US8497563B2/en not_active Expired - Fee Related
- 2008-09-15 JP JP2010525314A patent/JP5453270B2/ja not_active Expired - Fee Related
- 2008-09-15 WO PCT/EP2008/062251 patent/WO2009040265A1/de active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2009040265A1 (de) | 2009-04-02 |
DE102007045185A1 (de) | 2009-04-02 |
CN101803032B (zh) | 2013-03-27 |
CN101803032A (zh) | 2010-08-11 |
US20100237456A1 (en) | 2010-09-23 |
US8497563B2 (en) | 2013-07-30 |
JP2010539719A (ja) | 2010-12-16 |
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