JP5283975B2 - 半導体記憶装置ならびにそのデータ書込方法およびデータ読出方法 - Google Patents
半導体記憶装置ならびにそのデータ書込方法およびデータ読出方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 110
- 238000000034 method Methods 0.000 title claims description 32
- 230000005669 field effect Effects 0.000 claims abstract description 41
- 238000001514 detection method Methods 0.000 claims abstract description 34
- 239000004020 conductor Substances 0.000 claims description 58
- 238000009792 diffusion process Methods 0.000 abstract description 44
- 239000010410 layer Substances 0.000 description 45
- 239000000758 substrate Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 10
- 238000002955 isolation Methods 0.000 description 4
- 230000001151 other effect Effects 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- -1 for example Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
- H10B20/25—One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/20—Initialising; Data preset; Chip identification
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
- H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Description
(第1実施形態)
(第2実施形態)
(第3実施形態)
(第4実施形態)
(第5実施形態)
2 半導体記憶装置
3 半導体記憶装置
4 半導体記憶装置
5 半導体記憶装置
10 FET
12 拡散層
14 拡散層
14a 拡散層
16 ゲート電極
16a ゲート電極
18 ゲート絶縁膜
18a ゲート絶縁膜
20 FET
22 拡散層
24 拡散層
24a 拡散層
26 ゲート電極
26a ゲート電極
28 ゲート絶縁膜
28a ゲート絶縁膜
32 コンタクトプラグ
33 配線
34 コンタクトプラグ
34a コンタクトプラグ
35 配線
35a 配線
36 コンタクトプラグ
37 配線
38 コンタクトプラグ
39 配線
40 二重ウエル
42 ウエル領域
44 ウエル領域
46 拡散層
48 拡散層
50 検出回路
52 電源線
54 抵抗
55 抵抗
56 配線
57 配線
58 センスアンプ回路
59 出力端子
60 第1の入力端子
61 第2の入力端子
62 コンタクトプラグ
63 配線
64 コンタクトプラグ
64a コンタクトプラグ
65 配線
65a 配線
66 コンタクトプラグ
67 配線
68 コンタクトプラグ
69 配線
70 二重ウエル
72 ウエル領域
74 ウエル領域
76 拡散層
78 拡散層
80 半導体基板
82 素子分離領域
92 コンタクトプラグ
93 配線
94 コンタクトプラグ
95 配線
102 ビアプラグ
103 配線
104 ビアプラグ
105 配線
112 ビアプラグ
113 配線
114 ビアプラグ
115 配線
N42 ノード
N44 ノード
N72 ノード
N74 ノード
N80 ノード
L1 線(電流経路)
L2 線(電流経路)
L3 線(電流経路)
L4 線(電流経路)
L5 線(電流経路)
L6 線(電流経路)
L7 線(電流経路)
L8 線(電流経路)
L9 線(電流経路)
L10 線(電流経路)
L11 線(電流経路)
L12 線(電流経路)
L13 線(電流経路)
L14 線(電流経路)
L15 線(電流経路)
L16 線(電流経路)
L17 線(電流経路)
L18 線(電流経路)
L19 線(電流経路)
L20 線(電流経路)
L21 線(電流経路)
L22 線(電流経路)
L23 線(電流経路)
Claims (15)
- 二重ウエル中に設けられた第1の電界効果トランジスタと、
第2の電界効果トランジスタと、
前記第1の電界効果トランジスタの出力と前記第2の電界効果トランジスタの出力との差を検出する検出回路と、
前記第1の電界効果トランジスタのソース領域またはドレイン領域の一方と電気的に接続されたm個(m:自然数)の第1の導体プラグと、
前記第1の電界効果トランジスタの前記ソース領域または前記ドレイン領域の他方と電気的に接続されたn個(n:自然数)の第2の導体プラグと、
前記第2の電界効果トランジスタのソース領域及びドレイン領域の一方と電気的に接続された第3の導体プラグと、
前記第2の電界効果トランジスタの前記ソース領域及び前記ドレイン領域の他方と電気的に接続された第4の導体プラグと
を備え、
前記mは、前記nよりも小さく、
少なくとも1個の前記第1の導体プラグの抵抗値が上昇するように、前記第1の導体プラグに電流を流すことによってデータが書き込まれ、
前記検出回路は、前記第1の導体プラグ及び前記第2の導体プラグの一方と前記第3の導体プラグ及び前記第4の導体プラグの一方に一定の電位が与えられた状態で、前記第1の導体プラグ及び前記第2の導体プラグの他方を前記第1の電界効果トランジスタの出力とし、前記第3の導体プラグ及び前記第4の導体プラグの他方を前記第2の電界効果トランジスタの出力として、前記第1の電界効果トランジスタと前記第2の電界効果トランジスタの出力の差を検出する半導体記憶装置。 - 請求項1に記載の半導体記憶装置において、
前記第1および前記第2の電界効果トランジスタのうち前記第1の電界効果トランジスタのみが前記二重ウエル中に設けられている半導体記憶装置。 - 請求項1に記載の半導体記憶装置において、
前記第1および前記第2の電界効果トランジスタの双方が同一の前記二重ウエル中に設けられている半導体記憶装置。 - 請求項3に記載の半導体記憶装置において、
a個(a:自然数)の前記第3の導体プラグと、
b個(b:自然数)の前記第4の導体プラグとを備え、
前記mは、前記aよりも小さく、かつ、前記bよりも小さい半導体記憶装置。 - 請求項1に記載の半導体記憶装置において、
前記第1および前記第2の電界効果トランジスタは、相異なる前記二重ウエル中に設けられている半導体記憶装置。 - 請求項1乃至5いずれかに記載の半導体記憶装置において、
前記第1および前記第2の導体プラグは、それぞれ前記第1の電界効果トランジスタの前記ソース領域および前記ドレイン領域と電気的に接続されている半導体記憶装置。 - 請求項1乃至6いずれかに記載の半導体記憶装置において、
前記第1の電界効果トランジスタのゲート幅およびゲート長は、それぞれ前記第2の電界効果トランジスタのゲート幅およびゲート長に等しい半導体記憶装置。 - 請求項1乃至7いずれかに記載の半導体記憶装置において、
前記各電界効果トランジスタのゲート長は、当該半導体記憶装置に設けられた電界効果トランジスタの最小のゲート長よりも大きい半導体記憶装置。 - 請求項1乃至8いずれかに記載の半導体記憶装置において、
前記第1および前記第2の導体プラグは、同一の層に設けられている半導体記憶装置。 - 請求項1乃至9いずれかに記載の半導体記憶装置において、
前記各導体プラグは、コンタクトプラグである半導体記憶装置。 - 請求項1乃至9いずれかに記載の半導体記憶装置において、
前記各導体プラグは、ビアプラグである半導体記憶装置。 - 請求項1乃至11いずれかに記載の半導体記憶装置にデータを書き込む方法であって、
少なくとも1個の前記第1の導体プラグの抵抗値が上昇するように、当該第1の導体プラグに電流を流すステップを含むことを特徴とするデータ書込方法。 - 請求項12に記載のデータ書込方法において、
前記電流を流すステップにおいては、前記第1の電界効果トランジスタの前記ソース領域または前記ドレイン領域とウエル領域との間に順方向バイアス電圧を印加することにより、前記第1の導体プラグに電流を流すデータ書込方法。 - 請求項1乃至11いずれかに記載の半導体記憶装置からデータを読み出す方法であって、
前記第1の電界効果トランジスタの出力と前記第2の電界効果トランジスタの出力との差を検出するステップを含むことを特徴とするデータ読出方法。 - 請求項14に記載のデータ読出方法において、
前記差を検出するステップにおいては、前記第1の電界効果トランジスタの出力電位と前記第2の電界効果トランジスタの出力電位との差を検出するデータ読出方法。
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JP2008149717A JP5283975B2 (ja) | 2007-06-07 | 2008-06-06 | 半導体記憶装置ならびにそのデータ書込方法およびデータ読出方法 |
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JP2009016816A JP2009016816A (ja) | 2009-01-22 |
JP5283975B2 true JP5283975B2 (ja) | 2013-09-04 |
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Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
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US4150392A (en) * | 1976-07-31 | 1979-04-17 | Nippon Gakki Seizo Kabushiki Kaisha | Semiconductor integrated flip-flop circuit device including merged bipolar and field effect transistors |
JP3068291B2 (ja) * | 1990-12-12 | 2000-07-24 | 新日本製鐵株式会社 | 半導体記憶装置 |
JP2839819B2 (ja) * | 1993-05-28 | 1998-12-16 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP3204602B2 (ja) * | 1995-07-13 | 2001-09-04 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US6242789B1 (en) * | 1999-02-23 | 2001-06-05 | Infineon Technologies North America Corp. | Vertical fuse and method of fabrication |
TW486869B (en) * | 1999-12-27 | 2002-05-11 | Sanyo Electric Co | Voltage producing circuit and a display device provided with such voltage producing circuit |
US6384664B1 (en) * | 2000-10-05 | 2002-05-07 | Texas Instruments Incorporated | Differential voltage sense circuit to detect the state of a CMOS process compatible fuses at low power supply voltages |
JP2005039220A (ja) | 2003-06-26 | 2005-02-10 | Nec Electronics Corp | 半導体装置 |
JP4615884B2 (ja) * | 2004-03-23 | 2011-01-19 | 川崎マイクロエレクトロニクス株式会社 | アンチヒューズ素子 |
JP2006085753A (ja) | 2004-09-14 | 2006-03-30 | Oki Electric Ind Co Ltd | 半導体記憶装置 |
JP2006253237A (ja) * | 2005-03-08 | 2006-09-21 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
KR100697282B1 (ko) * | 2005-03-28 | 2007-03-20 | 삼성전자주식회사 | 저항 메모리 셀, 그 형성 방법 및 이를 이용한 저항 메모리배열 |
JP2006338773A (ja) | 2005-06-01 | 2006-12-14 | Elpida Memory Inc | 半導体メモリモジュール |
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2008
- 2008-06-06 US US12/155,648 patent/US7826261B2/en active Active
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US20080304315A1 (en) | 2008-12-11 |
US7826261B2 (en) | 2010-11-02 |
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