JP5258187B2 - SEMICONDUCTOR DEVICE AND FLUID DEVICE EQUIPPED WITH SEMICONDUCTOR DEVICE - Google Patents

SEMICONDUCTOR DEVICE AND FLUID DEVICE EQUIPPED WITH SEMICONDUCTOR DEVICE Download PDF

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JP5258187B2
JP5258187B2 JP2006293001A JP2006293001A JP5258187B2 JP 5258187 B2 JP5258187 B2 JP 5258187B2 JP 2006293001 A JP2006293001 A JP 2006293001A JP 2006293001 A JP2006293001 A JP 2006293001A JP 5258187 B2 JP5258187 B2 JP 5258187B2
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main surface
semiconductor element
flow path
fluid
semiconductor device
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JP2008112749A (en
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格 石井
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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Description

本発明は、半導体素子を放熱する放熱機能を有する半導体装置およびそのような半導体装置を備えた流体装置に関する。   The present invention relates to a semiconductor device having a heat dissipation function for radiating a semiconductor element and a fluid device including such a semiconductor device.

近年の情報処理用チップの高性能化に伴い、チップの発熱量が増大している。特に高機能計算機サーバーなどの情報処理用チップ（ＭＰＵ）などでは発熱量の増大は顕著である。よって、発熱量の抑制や排熱機構を行なう目的で、高機能な冷却設備をチップ近傍に形成した構成や、ＭＰＵを実装する基板内に流路を形成してその流路内に液体を流す、いわゆる水冷基板を用いた構成などが採用されている（例えば特許文献１および特許文献２参照）。
特開１９９４−６１６７０号公報 特開昭６２−０４５０５１号公報 With the recent improvement in performance of information processing chips, the amount of heat generated by the chips is increasing. In particular, an increase in the amount of heat generation is remarkable in an information processing chip (MPU) such as a high-function computer server. Therefore, for the purpose of suppressing the amount of generated heat and a heat exhaust mechanism, a configuration in which high-performance cooling equipment is formed in the vicinity of the chip, or a channel is formed in the substrate on which the MPU is mounted, and the liquid is allowed to flow in the channel. A configuration using a so-called water-cooled substrate is employed (see, for example, Patent Document 1 and Patent Document 2).
JP 1994-61670 A JP-A-62-045051

しかし、冷却設備をＭＰＵ近傍に設置しようとした場合、通常の冷却用のファンなどを形成する場合に比べて冷却装置が大型となりシステムが大型化されることや冷却設備のコストが増大するという問題点があった。また、大型化を避けて簡易な冷却システムを導入しようとすると十分な冷却効率が得られず、ＭＰＵの誤作動、処理スピードの減少が起こるという問題があった。   However, when the cooling facility is installed in the vicinity of the MPU, the cooling device becomes larger and the system becomes larger and the cost of the cooling facility increases compared to the case of forming a normal cooling fan or the like. There was a point. In addition, if an attempt is made to introduce a simple cooling system while avoiding an increase in size, there has been a problem that sufficient cooling efficiency cannot be obtained, causing a malfunction of the MPU and a reduction in processing speed.

また、基板に流路を形成し、液体を介しての冷却を行ういわゆる水冷基板を使用する場合、冷却用液体は、ＭＰＵの配線基板に対する実装部分および基板を介してＭＰＵを冷却することになるため、ＭＰＵの排熱効率を一定以上に上昇させることができないという問題があった。   Further, when a so-called water-cooled substrate that forms a flow path in the substrate and performs cooling via the liquid is used, the cooling liquid cools the MPU through the mounting portion of the MPU with respect to the wiring substrate and the substrate. Therefore, there has been a problem that the exhaust heat efficiency of the MPU cannot be increased beyond a certain level.

特に、小型の面実装コンセプトであるフリップチップ実装を行う場合には、ＭＰＵの配線基板に対する実装部分の熱抵抗が大きくなるため、ＭＰＵの熱が配線基板に逃げず、ＭＰＵの誤作動、処理スピードの減少が起こるという問題があった。   In particular, when performing flip chip mounting, which is a small surface mounting concept, the thermal resistance of the mounting portion of the MPU with respect to the wiring board increases, so the heat of the MPU does not escape to the wiring board, and the MPU malfunctions and processing speed. There was a problem that the decrease of.

本発明の目的は、半導体素子を有する小形の半導体装置であって、その半導体素子の放熱を高効率で行なうことができる半導体装置、並びにそのような半導体装置を有する流体装置を提供することである。   An object of the present invention is to provide a small-sized semiconductor device having a semiconductor element, which can perform heat dissipation of the semiconductor element with high efficiency, and a fluidic device having such a semiconductor device. .

本発明は（１）として、電極が形成された第１主面を有する半導体素子と、配線導体が形成された第２主面を有する配線基板と、前記第１主面と第２主面との間に設置され、前記電極と前記配線導体とを電気的に接続する電気接続部と、前記第１主面と第２主面との間に前記電気接続部を取り囲むように設置され、前記第１主面と第２主面とを接合する第１接合部と前記第１主面と第２主面との間において、前記電気接続部と前記第１接合部との間に前記電気接続部を取り囲むように設置され、前記第１主面と第２主面とを接合する第２接合部とを備え、前記配線基板は、前記半導体素子を冷却する冷却用流体が流れる流路を内部に有しており、前記半導体素子は、前記冷却用流体が流れる流路を内部に有しており、前記流路は、前記第１接合部と第２接合部との間において前記第２主面に開口する開口部を有しており、前記半導体素子の内部の流路は、前記第１接合部と前記第２接合部との間において前記第１主面に開口する開口部を有していることを特徴とする。
According to the present invention, as (1), a semiconductor element having a first main surface on which an electrode is formed, a wiring substrate having a second main surface on which a wiring conductor is formed, the first main surface and the second main surface, Between the first main surface and the second main surface, and so as to surround the electric connection portion, the electric connection portion for electrically connecting the electrode and the wiring conductor, The electrical connection between the electrical connection portion and the first joint portion between the first joint portion joining the first principal surface and the second principal surface and the first principal surface and the second principal surface. And a second joint portion that joins the first main surface and the second main surface, and the wiring board includes a flow path through which a cooling fluid for cooling the semiconductor element flows. It has to, the semiconductor device has a channel in which the cooling fluid flows inside the flow path, the first contact Parts and has an opening which opens into the second main surface between the second joint portion, the interior of the flow path of the semiconductor element, between the first junction and the second junction It characterized that you have an opening that opens to the first major surface in.

上記（１）の構成を前提とする本発明は、（２）として、前記第１接合部および第２接合部の少なくとも一方は、前記電極と前記配線導体とを電気的に接続することを特徴とする。
The present invention premised on the configuration of ( 1 ) is characterized in that, as ( 2 ), at least one of the first joint and the second joint electrically connects the electrode and the wiring conductor. And

上記（１）または（２）いずれかの構成を前提とする本発明は、（３）として前記半導体装置を搭載する搭載基板とを備え、前記搭載基板は、前記冷却用流体が流れる流路を内部に有し、前記配線基板の内部の流路は、前記搭載基板に対向する第３主面に開口する開口部を有し、前記搭載基板の内部の流路は、前記配線基板に対向する第４主面において、前記第３主面の開口部に対向するように開口する開口部を有することを特徴とする。
The present invention premised on the configuration of (1) or ( 2 ) includes a mounting substrate on which the semiconductor device is mounted as ( 3 ), and the mounting substrate has a flow path through which the cooling fluid flows. The flow path inside the wiring substrate has an opening opening in a third main surface facing the mounting substrate, and the flow channel inside the mounting substrate faces the wiring substrate. The fourth main surface has an opening that opens to face the opening of the third main surface.

本発明の半導体装置によれば、電極が形成された第１主面を有する半導体素子と、配線導体が形成された第２主面を有する配線基板と、第１主面と第２主面との間に設置され、電極と配線導体とを電気的に接続する電気接続部と、第１主面と第２主面との間に電気接続部を取り囲むように設置され、第１主面と第２主面とを接合する第１接合部とを備え、配線基板は、半導体素子を冷却する冷却用流体が流れる流路を内部に備え、流路は、第１接合部の内側において第２主面に開口する開口部を有することから、発熱量の大きな半導体素子を配線基板に実装した場合に、半導体素子の主面に接するように冷却用流体を流すことができる。これにより、冷却用流体が半導体素子に接して存在することから、半導体素子の冷却を効率良く行うことができる。   According to the semiconductor device of the present invention, the semiconductor element having the first main surface on which the electrode is formed, the wiring substrate having the second main surface on which the wiring conductor is formed, the first main surface and the second main surface, Between the first main surface and the second main surface so as to surround the electric connection portion, and to be electrically connected between the electrode and the wiring conductor. The wiring board includes a flow path through which a cooling fluid for cooling the semiconductor element flows, and the flow path is second inside the first joint. Since the opening portion opens on the main surface, when a semiconductor element having a large amount of heat generation is mounted on the wiring board, the cooling fluid can be flowed so as to be in contact with the main surface of the semiconductor element. Thereby, since the cooling fluid exists in contact with the semiconductor element, the semiconductor element can be efficiently cooled.

また本発明によれば、第１接合部は、電極と配線導体とを電気的に接続することから半導体素子への給電と電気信号の入力を行うことが可能となる。   Further, according to the present invention, since the first joint portion electrically connects the electrode and the wiring conductor, it is possible to supply power to the semiconductor element and input an electric signal.

また本発明によれば、第１接合部および第２接合部は、それぞれ枠状であり、流路は、第１接合部と第２接合部との間において第２主面に開口する開口部を有することから、半導体素子の主面に接するように流体を流すことができるとともに、外部と流体をより効果的に遮断することができる。これにより、流体が外気に晒されることを防ぎ、流体への異物の混入によるコンタミネーションを防ぐことができる。また流体が流れる系が小さくなるため、必要な流体の体積が小さくなり、扱う流体が少量ですむ。したがって流体を流すための動力も小さくてすみ、小量の流体を小流量で流すことが可能であり、冷却効率の高い半導体装置を実現することができる。   According to the invention, the first joint portion and the second joint portion each have a frame shape, and the flow path is an opening portion that opens to the second main surface between the first joint portion and the second joint portion. Therefore, the fluid can flow so as to be in contact with the main surface of the semiconductor element, and the outside and the fluid can be more effectively blocked. Thereby, it is possible to prevent the fluid from being exposed to the outside air, and to prevent contamination due to mixing of foreign matters into the fluid. In addition, since the system through which the fluid flows becomes smaller, the volume of the required fluid is reduced and a small amount of fluid is handled. Accordingly, the power for flowing the fluid is small, and a small amount of fluid can be flowed at a small flow rate, and a semiconductor device with high cooling efficiency can be realized.

また本発明によれば、第１接合部および第２接合部の少なくとも一方は、電極と配線導体とを電気的に接続することから、特に第１接合部が接地されている場合に第２接合部を電気的に外部から遮蔽することができる。   According to the invention, at least one of the first joint and the second joint electrically connects the electrode and the wiring conductor, so that the second joint particularly when the first joint is grounded. The portion can be electrically shielded from the outside.

また本発明によれば、電極が形成された表面を有する半導体素子と、半導体素子を収容する凹部を備え、該凹部の内表面に配線導体が形成されている基体と、半導体素子の第１主面と凹部の内表面との間に設置され、電極と配線導体とを電気的に接続する電気接続部とを備え、基体は、半導体素子を冷却する冷却用流体が流れる流路を内部に備え、流路は、凹部の内表面に開口する開口部を有することから、凹部内において、半導体素子の周囲全体を冷却用流体で満たすことができ、冷却効率を高めることができる。   According to the present invention, a semiconductor element having a surface on which an electrode is formed, a recess having a recess for accommodating the semiconductor element, and a wiring conductor is formed on the inner surface of the recess, and the first main element of the semiconductor element. An electrical connection portion that is installed between the surface and the inner surface of the recess and electrically connects the electrode and the wiring conductor, and the base body includes a flow path through which a cooling fluid for cooling the semiconductor element flows. Since the flow path has an opening that opens to the inner surface of the recess, the entire periphery of the semiconductor element can be filled with the cooling fluid in the recess, and the cooling efficiency can be improved.

また本発明によれば、基体に凹部を覆うように接合された蓋部を備えることから、流体が封止されて液体に高い圧力をかけることができ、冷却用の流体の流速を高めることができるのでより放熱効率を高めることができる。   Further, according to the present invention, since the lid is joined to the base so as to cover the recess, the fluid is sealed and high pressure can be applied to the liquid, and the flow rate of the cooling fluid can be increased. Therefore, the heat dissipation efficiency can be increased.

また本発明によれば、蓋部は、基体と同じ材料から成ることから、蓋部と凹部の接続信頼性、半導体素子の気密信頼性をより強固なものとすることができる。   Further, according to the present invention, since the lid portion is made of the same material as the base body, the connection reliability between the lid portion and the concave portion and the airtight reliability of the semiconductor element can be further strengthened.

また本発明の流体装置によれば、上述の第２主面を有する配線基板を備えたいずれかの半導体装置と半導体装置を搭載する搭載基板とを備え、搭載基板は、冷却用流体が流れる流路を内部に有し、配線基板の内部の流路は、搭載基板に対向する第３主面に開口する開口部を有し、搭載基板の内部の流路は、配線基板に対向する第４主面において、第３主面の開口部に対向するように開口する開口部を有することから、１つの流体装置に流体が流れる系全体を設けられるので、流体装置の外部に、流体を供給する構成を設けなくてもよく、流体が流れる系全体の規模を小さくすることができる。また流体が外気に晒されることを防ぎ、流体への異物の混入によるコンタミネーションを防ぐことができる。また流体が流れる系を小さくし、必要な流体の体積を小さくできるため、小量の流体を扱うことができる。したがって流体を流すための動力も小さくてすみ、小量の流体を小流量で流すことが可能であり、発熱効率の高い流体装置を実現することができる。   According to the fluid device of the present invention, any one of the semiconductor devices including the wiring substrate having the second main surface described above and a mounting substrate on which the semiconductor device is mounted is provided, and the mounting substrate has a flow through which the cooling fluid flows. The flow path inside the wiring substrate has an opening opening in the third main surface facing the mounting substrate, and the flow channel inside the mounting substrate is the fourth facing the wiring substrate. Since the main surface has an opening that opens to face the opening of the third main surface, the entire system in which the fluid flows can be provided in one fluid device, so that the fluid is supplied to the outside of the fluid device. A configuration need not be provided, and the scale of the entire system through which the fluid flows can be reduced. Further, it is possible to prevent the fluid from being exposed to the outside air and to prevent contamination due to foreign matters mixed into the fluid. Further, since the system through which the fluid flows can be reduced and the volume of the required fluid can be reduced, a small amount of fluid can be handled. Accordingly, the power for flowing the fluid can be small, and a small amount of fluid can be flowed at a small flow rate, and a fluid device with high heat generation efficiency can be realized.

また本発明の流体装置によれば、凹部を有する基体を備えた上述のいずれかの半導体装置と、半導体装置を搭載する搭載基板とを備え、搭載基板は、冷却用流体が流れる流路を内部に有し、基体の内部の流路は、搭載基板に対向する表面に開口する開口部を有し、搭載基板の内部の流路は、基体に対向する主面において、基体の表面の開口部に対向するように開口する開口部を有することを特徴とすることから、１つの流体装置に流体が流れる系全体を設けられるので、流体装置の外部に、流体を供給する構成を設けなくてもよく、流体が流れる系全体の規模を小さくすることができる。また流体が外気に晒されることを防ぎ、流体への異物の混入によるコンタミネーションを防ぐことができる。また流体が流れる系を小さくし、必要な流体の体積を小さくし、小量の流体を扱うことができる。したがって流体を流すための動力も小さくてすみ、小量の流体を小流量で流すことが可能であり、冷却効率の高い流体装置を実現することができる。   According to the fluid device of the present invention, any one of the above-described semiconductor devices including a base having a recess and a mounting substrate on which the semiconductor device is mounted are provided, and the mounting substrate includes a flow path through which a cooling fluid flows. The flow path inside the base has an opening that opens on the surface facing the mounting substrate, and the flow path inside the mounting substrate has an opening on the surface of the base on the main surface facing the base. Since the entire system through which the fluid flows can be provided in one fluid device, there is no need to provide a structure for supplying the fluid to the outside of the fluid device. Well, it is possible to reduce the scale of the entire system through which the fluid flows. Further, it is possible to prevent the fluid from being exposed to the outside air and to prevent contamination due to foreign matters mixed into the fluid. Further, the system through which the fluid flows can be reduced, the volume of the required fluid can be reduced, and a small amount of fluid can be handled. Therefore, the power for flowing the fluid is small, and a small amount of fluid can be flowed at a small flow rate, and a fluid device with high cooling efficiency can be realized.

以下に、添付の図面を参照して、本発明の実施の形態について説明する。   Embodiments of the present invention will be described below with reference to the accompanying drawings.

（第１の実施の形態）
図１（ａ）は、本発明の第１の実施の形態による半導体装置の構成例を示す平面図であり、図１（ｂ）は、図１（ａ）の半導体装置の切断面線Ｉ−Ｉ線における断面図である。図１（ａ），（ｂ）に示されるように、本実施の形態による半導体装置１は、半導体素子２と配線基板３とを備える。それらは、半導体素子２の一方の主面（以下、「第１主面」という。）と、配線基板３の一方の主面（以下、「第２主面」という。）が対向するように配置されている。半導体素子２の第１主面には、複数の電極４が設けられており、この電極４と配線基板３の第２主面に設けられた配線導体（図示せず）とが接続端子５によってそれぞれ電気的に接続されている。ここで、半導体素子２が、例えば情報処理用のＩＣチップなどである場合、半導体素子２は、配線基板３にフリップチップ接合により搭載されているとみなすことができる。 (First embodiment)
FIG. 1A is a plan view showing a configuration example of the semiconductor device according to the first embodiment of the present invention, and FIG. 1B is a cross-sectional line I− of the semiconductor device in FIG. It is sectional drawing in I line. As shown in FIGS. 1A and 1B, the semiconductor device 1 according to the present embodiment includes a semiconductor element 2 and a wiring board 3. They are such that one main surface of the semiconductor element 2 (hereinafter referred to as “first main surface”) and one main surface of the wiring board 3 (hereinafter referred to as “second main surface”) face each other. Has been placed. A plurality of electrodes 4 are provided on the first main surface of the semiconductor element 2, and the electrodes 4 and a wiring conductor (not shown) provided on the second main surface of the wiring substrate 3 are connected by the connection terminals 5. Each is electrically connected. Here, when the semiconductor element 2 is, for example, an IC chip for information processing, it can be considered that the semiconductor element 2 is mounted on the wiring board 3 by flip chip bonding.

さらに、上記第１主面と第２主面との間で、複数の接続端子５を取り囲むように、半導体素子２と配線基板３とを接合する枠状の接合材６が設けられている。また、配線基板３の内部には、流路７が設けられている。この流路７内に、半導体素子２を冷却するための冷却用流体を流すことができる。流路７は、接合材６の内側において、配線基板３における第２主面に開口する開口部を有する。   Further, a frame-shaped bonding material 6 for bonding the semiconductor element 2 and the wiring substrate 3 is provided between the first main surface and the second main surface so as to surround the plurality of connection terminals 5. A flow path 7 is provided inside the wiring board 3. A cooling fluid for cooling the semiconductor element 2 can flow in the flow path 7. The flow path 7 has an opening that opens to the second main surface of the wiring board 3 inside the bonding material 6.

半導体装置１は、上述したように、例えば情報処理用のＩＣチップモジュールなどの、半導体プロセスを用いて作製された集積半導体ＩＣであってよい。このような半導体装置１に用いられる半導体素子２は、情報処理を行う場合などに発熱する。また、半導体装置１は情報処理用ＩＣチップモジュールのみではなく、例えば発熱量が大きなパワーモジュール、および光学装置などであってよい。すなわち、熱を発生する任意の半導体素装置に対して図１に示された構成を適用することができる。   As described above, the semiconductor device 1 may be an integrated semiconductor IC manufactured using a semiconductor process, such as an IC chip module for information processing. The semiconductor element 2 used in such a semiconductor device 1 generates heat when performing information processing. Further, the semiconductor device 1 may be not only an information processing IC chip module but also a power module having a large calorific value and an optical device, for example. In other words, the configuration shown in FIG. 1 can be applied to any semiconductor device that generates heat.

半導体素子２は、主にシリコンで構成され表層および内部に電気配線が形成されている。しかし、半導体素子２を構成する材料は、シリコンに限定されるものではなく、例えば半導体内の電荷密度を減少させることによって、処理速度を向上させる場合など用いられるガリウム砒素、アルミニウムガリウム砒素、シリコンゲルマニウムなどであってよい。また、半導体装置１が光学装置である場合などは、半導体素子２は、窒化ガリウム、ＳｉＣ、ダイアモンド半導体などで構成されてもよい。なお、半導体素子２はこれらの物性に限定されるものではなく、発熱量の大きな任意の材料から成る素子に対して図１に示された構成を適用することができる。   The semiconductor element 2 is mainly composed of silicon, and electric wiring is formed on the surface layer and inside. However, the material constituting the semiconductor element 2 is not limited to silicon. For example, gallium arsenide, aluminum gallium arsenide, and silicon germanium are used to improve the processing speed by reducing the charge density in the semiconductor. And so on. Further, when the semiconductor device 1 is an optical device, the semiconductor element 2 may be composed of gallium nitride, SiC, a diamond semiconductor, or the like. The semiconductor element 2 is not limited to these physical properties, and the configuration shown in FIG. 1 can be applied to an element made of any material having a large calorific value.

半導体素子２は、電気配線によって給電と処理する電気信号の授受とを行い、半導体素子２内で情報処理を行う。この場合に半導体素子２内で配線の抵抗成分などによって半導体素子２が発熱する。半導体装置１がパワーモジュールの場合、一般的に半導体素子２内に大電流が印加される。このためジュール熱効果によって半導体素子２内が発熱する。同じく、半導体装置１が光学装置の場合は、光学的なセンシングを行う場合や駆動を行う場合に大きな消費電力が必要となり、半導体素子２の部分が発熱することとなる。   The semiconductor element 2 performs power supply and transmission / reception of electric signals to be processed by electric wiring, and performs information processing in the semiconductor element 2. In this case, the semiconductor element 2 generates heat due to the resistance component of the wiring in the semiconductor element 2. When the semiconductor device 1 is a power module, a large current is generally applied in the semiconductor element 2. For this reason, the semiconductor element 2 generates heat due to the Joule heat effect. Similarly, when the semiconductor device 1 is an optical device, large power consumption is required when optical sensing is performed or when driving is performed, and the semiconductor element 2 portion generates heat.

半導体素子２の第１主面に設けられた電極４は半導体上に薄膜形成されており、Ａｕ、Ｃｕ、Ａｌなどの金属材料からなる。半導体素子２は、この電極４を通じて外部との電気的な授受を行い、外部との電気的なやり取りを行う。   The electrode 4 provided on the first main surface of the semiconductor element 2 is formed as a thin film on the semiconductor, and is made of a metal material such as Au, Cu, or Al. The semiconductor element 2 performs electrical exchange with the outside through this electrode 4 and performs electrical exchange with the outside.

配線基板３は、半導体素子２を表面に実装する構造となっており、半導体素子２は、その第１主面が配線基板３の第２主面に対向するように配置されている。配線基板３は、例えばセラミックス材料、有機樹脂材料およびそれらの複合材料などの絶縁材料から成り、具体的には、例えばプリント配線基板が挙げられる。また、配線基板３は単層構造であってもよいし、多層構造であってもよい。   The wiring board 3 has a structure in which the semiconductor element 2 is mounted on the surface, and the semiconductor element 2 is disposed so that the first main surface thereof faces the second main surface of the wiring board 3. The wiring board 3 is made of an insulating material such as a ceramic material, an organic resin material, or a composite material thereof, and specifically includes a printed wiring board, for example. Further, the wiring board 3 may have a single layer structure or a multilayer structure.

上記セラミックス材料は、例えば酸化アルミニウム質焼結体、窒化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、窒化珪素質焼結体、ガラスセラミックス焼結体などである。また、有機樹脂材料は、例えばポリイミド、ガラスエポキシ樹脂などである。また、上記複合材料は、例えばセラミックスおよびガラスなどの無機粉末をエポキシ樹脂などの有機樹脂で結合して成る材料であってもよいし、ガラスから成ってもよい。   Examples of the ceramic material include an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a silicon carbide sintered body, a silicon nitride sintered body, and a glass ceramic sintered body. The organic resin material is, for example, polyimide or glass epoxy resin. The composite material may be a material formed by bonding inorganic powders such as ceramics and glass with an organic resin such as an epoxy resin, or may be made of glass.

例えば、配線基板３は、酸化アルミニウム質焼結体から成る場合であれば、酸化アルミニウムとガラス粉末などの原料粉末をシート状に形成したグリーンシートを複数枚積層し、焼成することによって形成される。配線基板３は、酸化アルミニウム質焼結体で形成するものに限らず、半導体装置１の用途などに応じて適したものを選択することが好ましい。例えば半導体素子２が情報処理用ＩＣチップの場合、情報処理用ＩＣチップの特性に応じて適したものを選択することが好ましい。   For example, if the wiring board 3 is made of an aluminum oxide sintered body, the wiring board 3 is formed by laminating and firing a plurality of green sheets in which raw powders such as aluminum oxide and glass powder are formed into a sheet shape. . The wiring board 3 is not limited to one formed of an aluminum oxide sintered body, and it is preferable to select one that is suitable for the application of the semiconductor device 1 and the like. For example, when the semiconductor element 2 is an information processing IC chip, it is preferable to select a suitable one according to the characteristics of the information processing IC chip.

また、後述するように、配線基板３に流れる流体の特性に応じて、耐食性などの点で適した材料を選択することが好ましい。また配線基板３と半導体素子２は、互いに機械的に接続され、さらに加えて電気的に接続されるので、半導体素子２と配線基板３の熱膨張係数の差異に起因して生じる熱応力が小さくなるように、材料を選択することが好ましく、互いに接続される基板同士の熱膨張係数の差が小さくなるように材料を選択することが好ましい。   Further, as will be described later, it is preferable to select a material suitable in terms of corrosion resistance, etc., according to the characteristics of the fluid flowing through the wiring board 3. In addition, since the wiring board 3 and the semiconductor element 2 are mechanically connected to each other and electrically connected to each other, the thermal stress caused by the difference in thermal expansion coefficient between the semiconductor element 2 and the wiring board 3 is small. Thus, it is preferable to select the material, and it is preferable to select the material so that the difference in coefficient of thermal expansion between the substrates connected to each other becomes small.

また、配線基板３の配線により伝送される電気信号の遅延を防止するために、配線基板３は、例えば、ポリイミドおよびガラスエポキシ樹脂などの有機樹脂材料、セラミックスおよびガラスなどの無機粉末をエポキシ樹脂などの有機樹脂で結合して成る複合材、並びに酸化アルミニウム−ホウ珪酸ガラス系および酸化リチウム系などのガラスセラミックス焼結体などのような比誘電率の小さい材料で形成することが好ましい。また、半導体素子２の発熱源で発生する熱の外部への放散性を良好とするために、例えば窒化アルミニウム質焼結体などのような熱伝導率の大きな材料で形成することが好ましい。   Further, in order to prevent a delay of an electric signal transmitted by the wiring of the wiring board 3, the wiring board 3 is made of, for example, an organic resin material such as polyimide and glass epoxy resin, inorganic powder such as ceramics and glass, epoxy resin, or the like. It is preferable to form with a material having a low relative dielectric constant such as a composite material formed by bonding with an organic resin, and a glass ceramic sintered body such as an aluminum oxide-borosilicate glass system or a lithium oxide system. Moreover, in order to make the heat generated by the heat source of the semiconductor element 2 dissipate to the outside, it is preferable to form it with a material having a high thermal conductivity such as an aluminum nitride sintered body.

配線基板３中には流路７が形成されている。流路７を通じて冷却用の流体が配線基板３に流入、流出される。流路７は配線基板３の第２主面に形成された開口部を通じて半導体基板２の第１主面と配線基板３の第２主面の間に流体を満たすこととなる。   A flow path 7 is formed in the wiring board 3. A cooling fluid flows into and out of the wiring board 3 through the flow path 7. The flow path 7 fills the fluid between the first main surface of the semiconductor substrate 2 and the second main surface of the wiring substrate 3 through the opening formed in the second main surface of the wiring substrate 3.

流路７は、例えば、配線基板３がセラミックの場合にはセラミックの焼成前の工程でいわゆるグリーンシートに形成された形状を積層して焼成前の加工体として、焼成後に流路７となる方法などで形成される。流路７の加工方法に関しては、本方法に限らず、研磨、ダイシング、エンドミル加工、切削加工などの後加工や、ロウ付け、半田付けなどの接合技術を用いて作製されてもよい。   For example, when the wiring substrate 3 is ceramic, the flow path 7 is a method of forming the flow path 7 after firing by stacking the shape formed in a so-called green sheet in the step before firing the ceramic to obtain a processed body before firing. Etc. are formed. The processing method of the flow path 7 is not limited to this method, and may be manufactured using post-processing such as polishing, dicing, end milling, and cutting, or using a joining technique such as brazing or soldering.

また、接続端子５は、主に金属材料で形成されていることが多く、ＳｎＰｂ系半田、ＳｎＡｇＣｕ系半田、ＳｎＡｇ系半田、ＳｎＢｉ系半田、Ｉｎ系半田などの共晶金属が接合に用いられてもよく、Ａｎ、Ａｇ、Ｃｕなどの金属が用いられてもよい。ＩＣチップが電気接続される場合には実装信頼性、およびサンプルの作製性から接続端子５の高さが５０〜１５０μｍであることが望ましい。接続端子５は１つの半導体装置１内に複数子配列されている場合には、単一の材料系で作製されている必要は無く、半田材料と金属材料の組み合わせなどの異種材料同士が同一面内に分布していても良い。接続端子５の高さを高くしたい場合などには、例えば金属材料をスペーサーとして半田で電気接続を行っても良い。また金属材料と半田材料を接続しても良く、金属の種類、半田の種類も電気接続を満足する材料であれば特に上記の材料に限定されるものではない。   The connection terminal 5 is often formed mainly of a metal material, and eutectic metals such as SnPb solder, SnAgCu solder, SnAg solder, SnBi solder, and In solder are used for bonding. Alternatively, a metal such as An, Ag, or Cu may be used. When the IC chip is electrically connected, the height of the connection terminal 5 is preferably 50 to 150 μm from the viewpoint of mounting reliability and sample fabrication. When a plurality of connection terminals 5 are arranged in one semiconductor device 1, it is not necessary to be made of a single material system, and different materials such as a combination of a solder material and a metal material are on the same surface. It may be distributed within. When it is desired to increase the height of the connection terminal 5, for example, electrical connection may be performed with solder using a metal material as a spacer. Further, a metal material and a solder material may be connected, and the metal type and the solder type are not particularly limited to the above materials as long as they satisfy the electrical connection.

接合材６は、接続端子５を取り囲むようにしてなり、好ましくは熱硬化性樹脂、熱可塑性樹脂などの樹脂材料や、亜鉛系、ＢｉＯ系、シリカ系、シリカ‐ホウ素系、などのガラス材料から成る。耐水性を重要視する場合は、特に樹脂材料ではテフロン（登録商標）系などの材料が好ましく、またガラス材料のほうがより耐水性が良い。   The bonding material 6 surrounds the connection terminals 5 and is preferably made of a resin material such as a thermosetting resin or a thermoplastic resin, or a glass material such as zinc, BiO, silica, or silica-boron. Become. When importance is attached to water resistance, a resin material such as Teflon (registered trademark) is preferable, and a glass material has better water resistance.

また、接合材６は、単一の材質である必要は無く、例えば接合強度を保つための金属部材と耐食性を保つためのテフロン（登録商標）系部材とを組み合わせたものでも良い。さらに、２種類の組み合わせに限定されるものではなく、３種類以上の材料を組み合わせたものであってよい。なお、接合材６は、接合強度と耐食性を併せ持つものであれば特に材質を限定されるものではない。   Further, the bonding material 6 does not need to be a single material, and may be a combination of, for example, a metal member for maintaining the bonding strength and a Teflon (registered trademark) system member for maintaining the corrosion resistance. Furthermore, it is not limited to two types of combinations, and may be a combination of three or more types of materials. The bonding material 6 is not particularly limited in material as long as it has both bonding strength and corrosion resistance.

流路７を流れる流体は、流体が液体の場合、冷却用の液体であると同時に、接続端子５に直接触れる構成となっているために絶縁性と金属材料に対する耐腐食性を確保しなければならない。このため、液体として、油脂系の液体、例えば一般的な鉱物油、ＰＡＯ（ポリアルファオレフィン）、およびエステル系油脂などを用いることが好ましい。また、その他にも誘電体系の液体、例えば、エポキシ系樹脂、キシレン系樹脂、フェノール系樹脂などを用いることによって絶縁性と耐腐食性の両方を同時に満たすことができる。なお、これらの液体の排熱性を向上させるために絶縁性の固体成分をフィラーとして混入させておいても良く、熱容量の大きな絶縁材料である例えばアルミナ、窒化アルミニウム、結晶性のガラスなどの粉末を流体中に混入させることも可能である。この場合、第１主面と第２主面の間の空間に液体が淀み無く流れることを想定すると、好ましくはフィラーのサイズは１〜１０μｍ程度であることが望まれる。特に、冷却用流体が樹脂の場合には、フィラーを混入すると粘度が低下し、第１主面と第２主面の間の空間に冷却用流体が流れ易くなる。   When the fluid flowing in the flow path 7 is a liquid, the fluid is a cooling liquid and at the same time is configured to be in direct contact with the connection terminal 5, so that insulation and corrosion resistance against a metal material must be ensured. Don't be. For this reason, it is preferable to use oil-based liquids such as general mineral oil, PAO (polyalphaolefin), ester-based oils and the like as the liquid. In addition, by using a dielectric liquid such as an epoxy resin, a xylene resin, a phenol resin, etc., both insulation and corrosion resistance can be satisfied at the same time. In order to improve the exhaust heat property of these liquids, an insulating solid component may be mixed as a filler, and an insulating material having a large heat capacity such as alumina, aluminum nitride, crystalline glass or the like may be used. It is also possible to mix in the fluid. In this case, assuming that the liquid flows without stagnation in the space between the first main surface and the second main surface, the size of the filler is preferably about 1 to 10 μm. In particular, when the cooling fluid is a resin, the viscosity decreases when the filler is mixed, and the cooling fluid easily flows into the space between the first main surface and the second main surface.

他にも、液体の種類としては、気体を液化させたもの例えば液体窒素、液体ヘリウム、液体フロンなどでも良好な冷却効率と絶縁性・耐食性を満足する。   In addition, as a kind of liquid, a gas liquefied one such as liquid nitrogen, liquid helium, liquid chlorofluorocarbon, etc. satisfies satisfactory cooling efficiency and insulation / corrosion resistance.

なお、接合材６が樹脂材料で形成されている場合、冷却用液体は、樹脂材料への侵食の少ない油脂系の液体を用いることが好ましい。   In addition, when the joining material 6 is formed with the resin material, it is preferable to use the oil-based liquid with little erosion to the resin material as the cooling liquid.

上述の半導体装置１では、接合材６の内側で接続端子５の間が満たされるように冷却用流体を流すことができる。   In the semiconductor device 1 described above, the cooling fluid can be flowed so that the space between the connection terminals 5 is filled inside the bonding material 6.

本実施の形態による半導体装置では、発熱量の大きな半導体素子を配線基板に実装した場合に、半導体素子の主面に接するように冷却用流体を流すことができる。これにより、半導体素子が冷却用流体に直接接することから、半導体素子の冷却を効率良く行うことができる。すなわち、冷却設備を有することなく小型で、かつ半導体素子の放熱を高効率で行なうことができる半導体装置を実現することができる。   In the semiconductor device according to the present embodiment, when a semiconductor element having a large calorific value is mounted on a wiring board, a cooling fluid can be flowed so as to be in contact with the main surface of the semiconductor element. Thereby, since the semiconductor element is in direct contact with the cooling fluid, the semiconductor element can be efficiently cooled. That is, it is possible to realize a semiconductor device that is small in size and can perform heat dissipation of the semiconductor element with high efficiency without having a cooling facility.

（第２の実施の形態）
次に、本発明の第２の実施の形態について説明する。 (Second Embodiment)
Next, a second embodiment of the present invention will be described.

図２は、本発明の第２の実施の形態による半導体装置の構成例を示す断面図である。なお、図２において、図１に示したものと同じ構成には同一の符号を付し、説明を省略する。図２に示されるように、この半導体装置９では、半導体素子１０の内部に流路１１を設け、この内部の流路１１に冷却用流体を流している。   FIG. 2 is a sectional view showing a configuration example of a semiconductor device according to the second embodiment of the present invention. In FIG. 2, the same components as those shown in FIG. As shown in FIG. 2, in the semiconductor device 9, a flow path 11 is provided inside the semiconductor element 10, and a cooling fluid is caused to flow through the internal flow path 11.

本実施の形態による半導体装置９の場合では、半導体素子２の第１主面と配線基板３の第２主面との間に、冷却用流体が流れる流路を形成し、その流路と半導体素子２の内部の流路１１とを接続する。第１主面と第２主面との間の流路は、図２に示されるように、第１主面と第２主面との間で各接続端子５の間を埋めるように配置された接合材６に流路を設けることにより形成されてよい。また、第１主面と第２主面との間の流路は、２つの枠状の接合材６から構成されてもよい。すなわち、一方の枠状の接合材６を取り囲むように、他方の枠状の接合材６を配置し、それらの２つの接合材６の間に冷却用流体を流してもよい。その場合、配線基板３に設けられた流路７は、２つの接合材６の間において配線基板３の第２主面に開口する開口部を有し、半導体素子２の内部の流路１１は、半導体素子２の第１主面に開口する開口部を有する。   In the case of the semiconductor device 9 according to the present embodiment, a flow path through which a cooling fluid flows is formed between the first main surface of the semiconductor element 2 and the second main surface of the wiring substrate 3, and the flow path and the semiconductor The flow path 11 inside the element 2 is connected. As shown in FIG. 2, the flow path between the first main surface and the second main surface is arranged so as to fill between the connection terminals 5 between the first main surface and the second main surface. Alternatively, the bonding material 6 may be formed by providing a flow path. Further, the flow path between the first main surface and the second main surface may be constituted by two frame-shaped bonding materials 6. In other words, the other frame-shaped bonding material 6 may be arranged so as to surround one frame-shaped bonding material 6, and the cooling fluid may flow between the two bonding materials 6. In that case, the flow path 7 provided in the wiring board 3 has an opening that opens to the second main surface of the wiring board 3 between the two bonding materials 6, and the flow path 11 inside the semiconductor element 2 is The semiconductor device 2 has an opening opening in the first main surface.

このように半導体素子２の内部に冷却用流体を流す場合には、発熱する半導体素子２を直接冷却することができるので、半導体素子の冷却を効率良く行うことができる。   In this way, when the cooling fluid is allowed to flow inside the semiconductor element 2, the semiconductor element 2 that generates heat can be directly cooled, so that the semiconductor element can be efficiently cooled.

なお、枠状に形成された２つの接合材６の少なくとも一方を導電性とし、第１主面の電極と第２主面の配線導体とを電気的に接続する構成にしてもよい。このような枠状の接合材６は、例えば接地導体として用いることができる。さらに、外側の枠状接合材６を接地導体とすれば、内側の枠状接合材６を電気的に外部から遮断することができる。   Note that at least one of the two bonding members 6 formed in a frame shape may be conductive, and the electrode on the first main surface and the wiring conductor on the second main surface may be electrically connected. Such a frame-shaped bonding material 6 can be used as a ground conductor, for example. Furthermore, if the outer frame-shaped bonding material 6 is a ground conductor, the inner frame-shaped bonding material 6 can be electrically cut off from the outside.

半導体素子２の内部に流路を作製する場合は、いわゆるＭＰＵなどを形成する上でのＣＭＯＳ作製用のマスキング、エッチングなどを繰り返し、３次元の空洞を作製すればよい。半導体基板２に流路を形成する場合にはＤ−ＲＩＥ（Ｄｅｅｐ Ｒｅａｃｔｉｖｅ Ｉｏｎ Ｅｔｃｈｉｎｇ）などのドライエッチング、シリコン素材を酸、アルカリなどを用いてエッチングを行うウエットエッチング、レーザー加工、ハーフダイシング加工などの方法を用いて流路部分の形状に関してはフォトリソグラフィーでの形成が一般的である。若しくは、流路形成と半導体素子２の形成プロセスが異なる場合には、流路の形成されていない半導体素子２をウエハー上に作製する一方、流路が作製された基板を別途作製し、その後これらをウエハー上で貼り合わせることによって流路付の半導体素子２を得てもよい。この貼りあわせ方法としては、真空チャンバー内もしくは雰囲気チャンバー内で、半導体素子２と流路ウエハーとを熱圧着、陽極接合、直接接合、シラノール基を用いた半導体直接接合、共晶接合、若しくは金属接合する方法等が挙げられる。   When a flow path is formed inside the semiconductor element 2, masking and etching for forming a CMOS for forming a so-called MPU or the like is repeated to form a three-dimensional cavity. When the flow path is formed in the semiconductor substrate 2, dry etching such as D-RIE (Deep Reactive Ion Etching), wet etching in which a silicon material is etched using acid, alkali, etc., laser processing, half dicing processing, etc. As for the shape of the flow path portion using the method, formation by photolithography is common. Alternatively, when the flow path formation and the formation process of the semiconductor element 2 are different, the semiconductor element 2 without the flow path is manufactured on the wafer, while the substrate with the flow path is separately manufactured, and then The semiconductor element 2 with a flow path may be obtained by bonding together on a wafer. As this bonding method, the semiconductor element 2 and the flow path wafer are bonded by thermocompression bonding, anodic bonding, direct bonding, semiconductor direct bonding using a silanol group, eutectic bonding, or metal bonding in a vacuum chamber or an atmospheric chamber. And the like.

接合部２４は、ＳｎＰｂ系、ＳｎＡｇＣｕ系などの半田材料や、ＢｉＯ系、Ｖ２Ｏ５系、ＳｉＯ２系、ＳｉＯ２ホウ素などのガラス材料やテフロン（登録商標）系、エポキシ系、ポリイミドなどの有機材料接着剤などで接合される。   The joint 24 is made of solder material such as SnPb or SnAgCu, glass material such as BiO, V2O5, SiO2 or SiO2 boron, or organic material adhesive such as Teflon (registered trademark), epoxy or polyimide. Are joined together.

なお、半導体素子１０の内部に流路を作成する方法は、上記のＣＭＯＳプロセスを使用した作製もしくはウエハー接合を行う場合に限定されるものではなく、半導体素子１０と流路の作製プロセスに応じて最適なプロセスで作製することが可能である。   In addition, the method of creating a flow path inside the semiconductor element 10 is not limited to the case where the above-described CMOS process is used or wafer bonding is performed, and depending on the semiconductor element 10 and the flow path production process. It can be manufactured by an optimum process.

なお、半導体素子１０の内部に冷却用流体を流すとともに、半導体素子の第１主面と配線基板３の第２主面との間に冷却用流体を満たしてもよい。すなわち、半導体装置１は、図１と図２の構成を組み合わせたような構成であってもよい。このように半導体素子２の内部および実装部分の両方に冷却用流体を流す構成では、半導体素子１０の冷却をより効率良く行なうことができる。   The cooling fluid may be allowed to flow inside the semiconductor element 10 and the cooling fluid may be filled between the first main surface of the semiconductor element and the second main surface of the wiring board 3. That is, the semiconductor device 1 may have a configuration in which the configurations of FIGS. 1 and 2 are combined. As described above, in the configuration in which the cooling fluid is supplied to both the inside of the semiconductor element 2 and the mounting portion, the semiconductor element 10 can be cooled more efficiently.

（第３の実施の形態）
次に、本発明の第３の実施の形態について説明する。 (Third embodiment)
Next, a third embodiment of the present invention will be described.

図３は、本発明の第３の実施の形態による半導体装置が基板に搭載された流体装置の構成例を示す断面図である。なお、図３において、図１に示したものと同一の構成には同じ符号を付し、説明を省略する。図３に示されるように、流体装置２１は、本実施の形態による半導体装置２２とその半導体装置２２を搭載する搭載基板２３とを備えている。半導体装置２２は、接合部２４を介して搭載基板２３に搭載されている。そして、半導体装置２２は、半導体素子２と、その半導体素子２を収容する凹部を備えた基体２５と、その凹部を覆うように基体１に接合された蓋体２６とを備える。凹部の内表面には、配線導体（図示せず）が設けられており、半導体素子２の電極４と凹部の内表面の配線導体とが接続端子５によってそれぞれ電気的に接続されている。   FIG. 3 is a cross-sectional view showing a configuration example of a fluidic device in which a semiconductor device according to the third embodiment of the present invention is mounted on a substrate. In FIG. 3, the same components as those shown in FIG. As shown in FIG. 3, the fluid device 21 includes a semiconductor device 22 according to the present embodiment and a mounting substrate 23 on which the semiconductor device 22 is mounted. The semiconductor device 22 is mounted on the mounting substrate 23 via the joint portion 24. The semiconductor device 22 includes the semiconductor element 2, a base body 25 having a recess for housing the semiconductor element 2, and a lid body 26 bonded to the base body 1 so as to cover the recess. A wiring conductor (not shown) is provided on the inner surface of the recess, and the electrode 4 of the semiconductor element 2 and the wiring conductor on the inner surface of the recess are electrically connected to each other by the connection terminal 5.

また、基体２５の内部には、流路２７が形成されている。この流路２７内に、半導体素子２を冷却するための冷却用流体を流すことができる。流路２７は、凹部の内表面に開口する開口部を有する。   A flow path 27 is formed inside the base body 25. A cooling fluid for cooling the semiconductor element 2 can flow in the flow path 27. The flow path 27 has an opening that opens to the inner surface of the recess.

搭載基板２３は、ガラスエポキシ系の樹脂で作製されることが一般的である。耐水性・耐熱性を重視する場合にはテフロン（登録商標）系の材料・ポリイミドなどが用いられる。   The mounting substrate 23 is generally made of a glass epoxy resin. When importance is attached to water resistance and heat resistance, a Teflon (registered trademark) material, polyimide, or the like is used.

搭載基板２３の内部には、流路２８が形成されている。この流路２８は、基体２５の内部の流路２７に接続され、流路２７，２８を介して基体２５の凹部に冷却用流体が供給される。図３に示された構成では、接合部２４は円筒状の形状を有し、内部の空洞を冷却用流体が流れる。接合部２４は、導電性材料および絶縁材料のいずれから成ってもよく、たとえば金属材料、非金属無機系材料、樹脂材料などから成る。接合部材が複数存在数する場合は、全て同一の材料から成ってもよいし、異なる材料から成ってもよい。また、接合部２４を、配線基板３および搭載基板２３にそれぞれ接合する方法としては、錫−銀系などの半田、金−錫ろうなどの低融点ろう材、銀−ゲルマニウム系などの高融点ろう材、導電性有機樹脂などの接合材を介して接合する方法、並びにシーム溶接、電子ビーム溶接などの溶接法を用いることができる。   A flow path 28 is formed inside the mounting substrate 23. The flow path 28 is connected to a flow path 27 inside the base body 25, and a cooling fluid is supplied to the concave portion of the base body 25 via the flow paths 27 and 28. In the configuration shown in FIG. 3, the joint 24 has a cylindrical shape, and the cooling fluid flows through the internal cavity. The joint portion 24 may be made of either a conductive material or an insulating material, and is made of, for example, a metal material, a non-metallic inorganic material, a resin material, or the like. When there are a plurality of joining members, they may all be made of the same material or different materials. Further, as a method of joining the joining portion 24 to the wiring board 3 and the mounting board 23, solder such as tin-silver, low melting point solder such as gold-tin brazing, high melting point brazing such as silver-germanium, etc. A method of joining via a joining material such as a material, a conductive organic resin, or a welding method such as seam welding or electron beam welding can be used.

また、搭載基板２３と配線基板３は電気的に接続されていてもよい。その場合、図３に示されるように、流体装置２１は、電気接続部２９を備えていてもよい。電気接続部２９は、基体２５の外表面に設けられた配線導体（図示せず）と、搭載基板２３の配線導体（図示せず）とを電気的に接続する。この場合、電気接続部材２８は、ＳｎＰｂ系半田、ＳｎＡｇＣｕ系半田、ＳｎＢｉ系半田、Ｉｎ系半田などの共晶金属等である。このほかにも搭載基板２３と配線基板３との電気的な接続方法として、ソケット固定、メタルピンによる接合などの半田接合を行わない接合方法でも良く、特に接続信頼性が重視される場合にはメタルピンによるソケット実装などが用いられる。   Further, the mounting substrate 23 and the wiring substrate 3 may be electrically connected. In that case, as shown in FIG. 3, the fluid device 21 may include an electrical connection portion 29. The electrical connection portion 29 electrically connects a wiring conductor (not shown) provided on the outer surface of the base body 25 and a wiring conductor (not shown) of the mounting substrate 23. In this case, the electrical connection member 28 is eutectic metal such as SnPb solder, SnAgCu solder, SnBi solder, and In solder. In addition, as an electrical connection method between the mounting board 23 and the wiring board 3, a bonding method in which solder bonding such as socket fixing or metal pin bonding is not performed may be used. Socket mounting by is used.

配線基板３の流路２７の開口部と搭載基板２３の流路２８の開口部は互いに対向している。特に、接合部分の信頼性を重視する場合には、円筒状の接合部２４の内側表面をステンレス・鉄−ニッケル合金などの非腐食性の金属などの部材で囲んでおくようにしても良く、同じく耐水性、実装信頼性を向上させる場合にはテフロン（登録商標）などの樹脂材料で接続部材の内側をコーティングしてもよい。   The opening of the flow path 27 of the wiring substrate 3 and the opening of the flow path 28 of the mounting substrate 23 face each other. In particular, when importance is attached to the reliability of the joint portion, the inner surface of the cylindrical joint portion 24 may be surrounded by a member such as a non-corrosive metal such as stainless steel or iron-nickel alloy, Similarly, when improving water resistance and mounting reliability, the inside of the connection member may be coated with a resin material such as Teflon (registered trademark).

また、基体２５の凹部は、蓋部２６によって密閉されている。凹部と蓋部２６はＳｎＰｂ、ＡｕＳｎなどの共晶接合で接合する。このほかにもスポット溶接、ＹＡＧレーザーなどを用いたレーザー溶接、電子ビーム溶接、シーム溶接などの方法での溶接を行うことで接合されている。溶接方法としてはエポキシ樹脂などの樹脂材料を用いたシーラー接合表面活性化技術を用いた直接接合、ガラスフリット材料を用いたガラス接合そのほか陽極接合などの各種接合方法での接合が可能であり液体を流す目的を害しない限り特に接合方法に限定されるものではない。   Further, the concave portion of the base body 25 is sealed by the lid portion 26. The concave portion and the lid portion 26 are joined by eutectic bonding such as SnPb or AuSn. In addition, the welding is performed by spot welding, laser welding using a YAG laser, electron beam welding, seam welding, or the like. Welding methods include direct bonding using sealer surface activation technology using resin materials such as epoxy resin, glass bonding using glass frit materials, and other bonding methods such as anodic bonding. The joining method is not particularly limited as long as the purpose of flowing is not impaired.

凹部は、基体２５がセラミックスの場合はセラミックの焼成前の生工程でＮＣパンチングマシンや打ち抜き金型を用いて作製される工法で作製されてもよく、セラミックを焼成後にドリル加工、超音波ツール加工などの後加工技術を用いてもよい。   When the substrate 25 is ceramic, the recess may be formed by a manufacturing method using an NC punching machine or a punching die in a raw process before firing the ceramic, and drilling or ultrasonic tool processing after firing the ceramic. For example, post-processing techniques may be used.

凹部は、基体２５が樹脂材料である場合にはドリル加工やエッチング加工、プレス整形などの方法で作製されていることが多い。   When the base 25 is made of a resin material, the recess is often produced by a method such as drilling, etching, or press shaping.

蓋部２６は金属材料としてはＦｅＮｉＣｏ、合金ＦｅＮｉ合金などが用いられることが多い。また絶縁材料としてはアルミナ、低温焼成セラミックス（ＬＴＣＣ ： Ｌｏｗ Ｔｅｍｐｅｒａｔｕｒｅ Ｃｏ−ｆｉｒｅｄ Ｃｅｒａｍｉｃｓ）などのセラミックリッドであってもよく、ガラス材料で作製された蓋でも良い。   The lid 26 is often made of FeNiCo, an alloy FeNi alloy, or the like as a metal material. Further, the insulating material may be a ceramic lid such as alumina, low temperature co-fired ceramics (LTCC), or a lid made of a glass material.

本実施の形態による半導体装置２２によれば、基体２５の凹部内において、半導体素子２の周囲全体を冷却用流体で満たすことができ、冷却効率を高めることができる。   According to the semiconductor device 22 according to the present embodiment, the entire periphery of the semiconductor element 2 can be filled with the cooling fluid in the recess of the base body 25, and the cooling efficiency can be increased.

また、上記流体装置１のように、半導体装置２２を搭載基板２３に搭載し、その搭載基板２３に冷却用流体を貯蔵する貯蔵部を設ける等して搭載基板２３から冷却用流体を供給する構成にすれば、１つの流体装置に、流体が流れる系全体を設けられるので、流体装置の外部に流体を供給する構成を設けなくてもよく、流体が流れる系全体の規模を小さくすることができる。また流体が外気に晒されることを防ぎ、流体への異物の混入によるコンタミネーションを防ぐことができる。また流体が流れる系を小さくし、必要な流体の体積を小さくし、小量の流体を扱うことができる。したがって流体を流すための動力も小さくてすみ、小量の流体を小流量で流すことが可能であり、効率の高い流体装置を実現することができる。   Also, like the fluid device 1, the semiconductor device 22 is mounted on the mounting substrate 23, and the cooling fluid is supplied from the mounting substrate 23 by providing a storage unit for storing the cooling fluid in the mounting substrate 23. In this case, since the entire system through which the fluid flows can be provided in one fluid device, it is not necessary to provide a configuration for supplying the fluid to the outside of the fluid device, and the scale of the entire system through which the fluid flows can be reduced. . Further, it is possible to prevent the fluid from being exposed to the outside air and to prevent contamination due to foreign matters mixed into the fluid. Further, the system through which the fluid flows can be reduced, the volume of the required fluid can be reduced, and a small amount of fluid can be handled. Accordingly, the power for flowing the fluid can be small, and a small amount of fluid can be flowed at a small flow rate, and a highly efficient fluid device can be realized.

なお、基体２５と蓋部２６とを同一の材料で構成してもよい。図４は、そのような場合の流体装置の構成例を示す断面図である。図４に示された流体装置３２において、基体３２は、半導体素子２を収容する中空部を備える。基体３２の材料としては、モールド樹脂などの中空構造形成可能な材質であってよい。基体２５と蓋部２６とを必ずしも同時に形成する必要は無く、別の工程で作製されたものを熱圧着などの方法で接合されたものでも良い。   The base body 25 and the lid portion 26 may be made of the same material. FIG. 4 is a cross-sectional view showing a configuration example of the fluid device in such a case. In the fluid device 32 shown in FIG. 4, the base body 32 includes a hollow portion that accommodates the semiconductor element 2. The material of the base 32 may be a material capable of forming a hollow structure such as a mold resin. The base body 25 and the lid portion 26 do not necessarily have to be formed at the same time, and those manufactured in separate steps may be joined by a method such as thermocompression bonding.

このように、基体と蓋部とを同一の材料で形成した場合には、基体と蓋部との接続信頼性をより高めることができ、さらに半導体素子２の気密信頼性もより強固なものとすることができる。   As described above, when the base and the lid are formed of the same material, the connection reliability between the base and the lid can be further increased, and the hermetic reliability of the semiconductor element 2 can be further enhanced. can do.

なお、図３および図４は、半導体素子２の電極４と基体１の凹部の内表面に設けられた配線導体とがフリップチップ接合されている構成を示しているが、上記電極４と配線導体とがボンディングワイヤで接続されている場合でも、基体２５の凹部内を冷却用流体で満たすことにより、半導体素子２を効率よく冷却することができる。   3 and 4 show a configuration in which the electrode 4 of the semiconductor element 2 and the wiring conductor provided on the inner surface of the recess of the substrate 1 are flip-chip bonded. Even when they are connected by a bonding wire, the semiconductor element 2 can be efficiently cooled by filling the concave portion of the base 25 with the cooling fluid.

また、第１の実施の形態および第２の実施の形態による半導体装置も搭載基板に搭載して、流体装置を構成することができる。図５は、第１の実施の形態による半導体装置１を登載した流体装置の構成例を示す断面図である。図５に示されるように、この流体装置４１は、半導体装置１が登載基板２３に搭載されている。なお、図５において、図１〜図４に示したものと同一の構成には同じ符号を付し、説明を省略する。   In addition, the semiconductor device according to the first embodiment and the second embodiment can also be mounted on the mounting substrate to constitute a fluid device. FIG. 5 is a cross-sectional view showing a configuration example of the fluid device on which the semiconductor device 1 according to the first embodiment is mounted. As shown in FIG. 5, in the fluid device 41, the semiconductor device 1 is mounted on the mounting substrate 23. In FIG. 5, the same components as those shown in FIGS. 1 to 4 are denoted by the same reference numerals, and description thereof is omitted.

本発明は前述の各実施の形態に限定されるものではなく、本発明の要旨の範囲内であれば、種々の変形は可能である。例えば、本発明の構成は半導体素子と配線基板と搭載基板と３枚の基板と素子によって構成されているが、構成によっては４枚以上の基板を有する構成であってもよく、複数の半導体素子が配線基板内に配置されている構成であってもよい。   The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present invention. For example, the configuration of the present invention includes a semiconductor element, a wiring substrate, a mounting substrate, three substrates, and elements. However, depending on the configuration, a configuration having four or more substrates may be used. May be arranged in the wiring board.

（ａ）は、本発明の第１の実施の形態による半導体装置の構成例を示す断面図であり、（ｂ）は、（ａ）の半導体装置の切断面線Ｉ−Ｉ線における断面図である。(A) is sectional drawing which shows the structural example of the semiconductor device by the 1st Embodiment of this invention, (b) is sectional drawing in the cut surface line II of the semiconductor device of (a). is there. 本発明の第２の実施の形態による半導体装置の構成例を示す断面図である。It is sectional drawing which shows the structural example of the semiconductor device by the 2nd Embodiment of this invention. 本発明の第３の実施の形態による半導体装置が搭載された流体装置の構成例を示す断面図である。It is sectional drawing which shows the structural example of the fluid apparatus by which the semiconductor device by the 3rd Embodiment of this invention is mounted. 本発明の第３の実施の形態による半導体装置が搭載された別の流体装置の構成例を示す断面図である。It is sectional drawing which shows the structural example of another fluid apparatus with which the semiconductor device by the 3rd Embodiment of this invention is mounted. 本発明の第３の実施の形態による半導体装置が搭載された別の流体装置の構成例を示す断面図である。It is sectional drawing which shows the structural example of another fluid apparatus with which the semiconductor device by the 3rd Embodiment of this invention is mounted.

符号の説明Explanation of symbols

１ 半導体装置
２ 半導体素子
３ 配線基板
４ 電極
５ 接続端子
６ 接合部材
７ 流路 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor element 3 Wiring board 4 Electrode 5 Connection terminal 6 Joining member 7 Flow path

Claims (3)

電極が形成された第１主面を有する半導体素子と、
配線導体が形成された第２主面を有する配線基板と、
前記第１主面と前記第２主面との間に設置され、前記電極と前記配線導体とを電気的に接続する電気接続部と、
前記第１主面と前記第２主面との間に前記電気接続部を取り囲むように設置され、前記第１主面と前記第２主面とを接合する第１接合部と、
前記第１主面と前記第２主面との間において、前記電気接続部と前記第１接合部との間に前記電気接続部を取り囲むように設置され、前記第１主面と前記第２主面とを接合する第２接合部とを備え、
前記配線基板は、前記半導体素子を冷却する冷却用流体が流れる流路を内部に有しており、
前記半導体素子は、前記冷却用流体が流れる流路を内部に有しており、
前記流路は、前記第１接合部と第２接合部との間において前記第２主面に開口する開口部を有しており、
前記半導体素子の内部の流路は、前記第１接合部と前記第２接合部との間において前記第１主面に開口する開口部を有していることを特徴とする半導体装置。 A semiconductor element having a first main surface on which an electrode is formed;
A wiring board having a second main surface on which a wiring conductor is formed;
An electrical connecting portion that is installed between the first main surface and the second main surface and electrically connects the electrode and the wiring conductor;
A first joint that is installed so as to surround the electrical connection portion between the first main surface and the second main surface, and joins the first main surface and the second main surface;
Between the said 1st main surface and the said 2nd main surface, it installs so that the said electric connection part may be enclosed between the said electric connection part and the said 1st junction part, The said 1st main surface and the said 2nd A second joint for joining the main surface,
The wiring board has a flow path through which a cooling fluid for cooling the semiconductor element flows,
The semiconductor element has a flow path through which the cooling fluid flows,
The flow path has an opening that opens to the second main surface between the first joint and the second joint ,
The semiconductor device according to claim 1, wherein the flow path inside the semiconductor element has an opening that opens to the first main surface between the first joint and the second joint . 前記第１接合部および前記第２接合部の少なくとも一方は、前記電極と前記配線導体とを電気的に接続することを特徴とする請求項１に記載の半導体装置。   2. The semiconductor device according to claim 1, wherein at least one of the first bonding portion and the second bonding portion electrically connects the electrode and the wiring conductor. 請求項１または２のいずれかに記載の半導体装置と、
前記半導体装置を搭載する搭載基板とを備え、
前記搭載基板は、前記冷却用流体が流れる流路を内部に有し、
前記配線基板の内部の流路は、前記搭載基板に対向する第３主面に開口する開口部を有し、
前記搭載基板の内部の流路は、前記配線基板に対向する第４主面において、前記第３主面の開口部に対向するように開口する開口部を有することを特徴とする流体装置。 A semiconductor device according to claim 1 or 2 ,
A mounting substrate on which the semiconductor device is mounted;
The mounting substrate has a flow path through which the cooling fluid flows,
The flow path inside the wiring substrate has an opening that opens to a third main surface facing the mounting substrate,
The fluid device, wherein the flow path inside the mounting substrate has an opening portion that opens to face the opening portion of the third main surface on the fourth main surface facing the wiring substrate.
JP2006293001A 2006-10-27 2006-10-27 SEMICONDUCTOR DEVICE AND FLUID DEVICE EQUIPPED WITH SEMICONDUCTOR DEVICE Expired - Fee Related JP5258187B2 (en)

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