JP5141187B2 - Rfidタグ製造方法 - Google Patents
Rfidタグ製造方法 Download PDFInfo
- Publication number
- JP5141187B2 JP5141187B2 JP2007279346A JP2007279346A JP5141187B2 JP 5141187 B2 JP5141187 B2 JP 5141187B2 JP 2007279346 A JP2007279346 A JP 2007279346A JP 2007279346 A JP2007279346 A JP 2007279346A JP 5141187 B2 JP5141187 B2 JP 5141187B2
- Authority
- JP
- Japan
- Prior art keywords
- rfid tag
- chip
- manufacturing
- base
- recess
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/072—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising a plurality of integrated circuit chips
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49016—Antenna or wave energy "plumbing" making
- Y10T29/49018—Antenna or wave energy "plumbing" making with other electrical component
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Credit Cards Or The Like (AREA)
- Details Of Aerials (AREA)
Description
このため、特許文献1のRFIDタグでは、小型軽量化や低コスト化の実現が難しい。
凹部を有するベースシートと、
上記凹部を跨いで上記ベースシート上に設けられた第1素子と、
上記第1素子と上記ベースシートとの間に設けられ該第1素子と電気的に接続された第2素子と、
上記ベースシート上に設けられた、上記第1素子と上記第2素子とのうち少なくともいずれかの素子に接続された通信用のアンテナとを備えたことを特徴とする。
表面に通信用のアンテナが設けられているとともに、第1素子と該第1素子よりも小さい第2素子を電気的に接続する導体パターンも設けられている、加熱により軟化するベースシートの該導体パターン上に該第2素子を搭載して該導体パターンと接続する第1搭載過程と、
上記第2素子が搭載されたベースシートを加熱して、該第2素子が搭載された箇所を凹ませて凹部を形成する凹部形成過程と、
上記ベースシートの上記凹部と上記第2素子を跨いで、上記導体パターン上に上記第1素子を搭載して該導体パターンと接続する第2搭載過程とを有し、
上記第1搭載過程と上記第2搭載過程とのうち少なくともいずれかの過程が、上記ベースシート上のアンテナに対して上記第1素子と上記第2素子とのうち少なくともいずれかの素子を搭載して接続する過程であることを特徴とする。
素子との接続端を有する通信用のアンテナが表面に設けられた、加熱により軟化するベースシートを加熱して、該接続端の箇所を凹ませて凹部を形成する凹部形成過程と、
第1素子と、該第1素子よりも小さい第2素子とを相互に物理的に固定する固定過程と、
相互に固定された第1素子および第2素子を上記ベースシート上に、該第2素子が上記凹部に収まるように搭載し、該ベースシート上のアンテナに対して該第1素子と該第2素子とのうち少なくともいずれかの素子を接続する搭載過程と、
上記第1素子および上記第2素子を互いに電気的に接続する接続過程とを有することを特徴とする。
11,21 基体
111 フィルム
112,112’,212 アンテナパターン
113,113’,213 接続配線
12a,12a’,22a 小チップ
12b,12b’,22b 大チップ
120a,120b,220a,220b 回路面
121a,121b,121a’,121b’,221a,221b バンプ
222b パッド
223b 接続線
210 第1加熱ヘッド
220 加熱ステージ
310 第2加熱ヘッド
320 段差ステージ
Claims (4)
- 表面に通信用のアンテナが設けられているとともに、第1素子と該第1素子よりも小さい第2素子とを電気的に接続する導体パターンも設けられている、加熱により軟化するベースシートの該導体パターン上に該第2素子を搭載して該導体パターンと接続する第1搭載過程と、
前記第2素子が搭載されたベースシートを加熱して、該第2素子が搭載された箇所を凹ませて凹部を形成する凹部形成過程と、
前記ベースシートの前記凹部と前記第2素子とを跨いで、前記導体パターン上に前記第1素子を搭載して該導体パターンと接続する第2搭載過程とを有し、
前記第1搭載過程と前記第2搭載過程とのうち少なくともいずれかの過程が、前記ベースシート上のアンテナに対して前記第1素子と前記第2素子とのうち少なくともいずれかの素子を搭載して接続する過程であることを特徴とするRFIDタグ製造方法。 - 素子との接続端を有する通信用のアンテナが表面に設けられた、加熱により軟化するベースシートを加熱して、該接続端の箇所を凹ませて凹部を形成する凹部形成過程と、
第1素子と、該第1素子よりも小さい第2素子とを相互に物理的に固定する固定過程と、
相互に固定された第1素子および第2素子を前記ベースシート上に、該第2素子が前記凹部に収まるように搭載し、該ベースシート上のアンテナに対して該第1素子と該第2素子とのうち少なくともいずれかの素子を接続する搭載過程と、
前記第1素子および前記第2素子を互いに電気的に接続する接続過程とを有することを特徴とするRFIDタグ製造方法。 - 前記ベースシートが、前記第1素子と前記第2素子とを電気的に接続する導体パターンも設けられているものであり、
前記接続過程が、相互に固定された第1素子および第2素子を前記ベースシート上の前記導体パターン上に搭載することで該第1素子および該第2素子を互いに電気的に接続する、前記搭載過程を兼ねた過程であることを特徴とする請求項2記載のRFIDタグ製造方法。 - 前記接続過程が、前記第1素子および前記第2素子を互いに電気的に接続するとともに物理的に固定する、前記固定過程を兼ねた過程であることを特徴とする請求項2記載のRFIDタグ製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007279346A JP5141187B2 (ja) | 2007-10-26 | 2007-10-26 | Rfidタグ製造方法 |
EP08160980.2A EP2053548B1 (en) | 2007-10-26 | 2008-07-23 | RFID tag and manufacturing method thereof |
US12/180,117 US8299925B2 (en) | 2007-10-26 | 2008-07-25 | RFID tag and manufacturing method thereof |
KR1020080080852A KR101037639B1 (ko) | 2007-10-26 | 2008-08-19 | Rfid 태그 및 rfid 태그 제조 방법 |
CN2008102130108A CN101419676B (zh) | 2007-10-26 | 2008-08-20 | Rfid标签及其制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007279346A JP5141187B2 (ja) | 2007-10-26 | 2007-10-26 | Rfidタグ製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009110106A JP2009110106A (ja) | 2009-05-21 |
JP5141187B2 true JP5141187B2 (ja) | 2013-02-13 |
Family
ID=40225421
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007279346A Expired - Fee Related JP5141187B2 (ja) | 2007-10-26 | 2007-10-26 | Rfidタグ製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8299925B2 (ja) |
EP (1) | EP2053548B1 (ja) |
JP (1) | JP5141187B2 (ja) |
KR (1) | KR101037639B1 (ja) |
CN (1) | CN101419676B (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6360264B2 (ja) * | 2016-07-22 | 2018-07-18 | 京セラ株式会社 | Rfidタグ用基板、rfidタグおよびrfidシステム |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3960645B2 (ja) | 1996-12-27 | 2007-08-15 | ローム株式会社 | 回路チップ搭載カードおよび回路チップモジュール |
US6329213B1 (en) * | 1997-05-01 | 2001-12-11 | Micron Technology, Inc. | Methods for forming integrated circuits within substrates |
US6743319B2 (en) * | 1998-09-30 | 2004-06-01 | Paralec Inc. | Adhesiveless transfer lamination method and materials for producing electronic circuits |
JP2001077293A (ja) * | 1999-09-02 | 2001-03-23 | Nec Corp | 半導体装置 |
JP2002049901A (ja) | 2000-08-02 | 2002-02-15 | Sony Chem Corp | Icタグ |
JP4497683B2 (ja) * | 2000-09-11 | 2010-07-07 | ローム株式会社 | 集積回路装置 |
US6639309B2 (en) * | 2002-03-28 | 2003-10-28 | Sandisk Corporation | Memory package with a controller on one side of a printed circuit board and memory on another side of the circuit board |
JP4445343B2 (ja) * | 2004-08-10 | 2010-04-07 | 株式会社日立製作所 | Icタグ実装液晶表示器、およびその製造方法 |
US7166924B2 (en) * | 2004-08-17 | 2007-01-23 | Intel Corporation | Electronic packages with dice landed on wire bonds |
JP2006073651A (ja) * | 2004-08-31 | 2006-03-16 | Fujitsu Ltd | 半導体装置 |
US7542301B1 (en) * | 2005-06-22 | 2009-06-02 | Alien Technology Corporation | Creating recessed regions in a substrate and assemblies having such recessed regions |
US20070040688A1 (en) * | 2005-08-16 | 2007-02-22 | X-Cyte, Inc., A California Corporation | RFID inlays and methods of their manufacture |
US8067253B2 (en) * | 2005-12-21 | 2011-11-29 | Avery Dennison Corporation | Electrical device and method of manufacturing electrical devices using film embossing techniques to embed integrated circuits into film |
WO2007088757A1 (ja) | 2006-02-02 | 2007-08-09 | Matsushita Electric Industrial Co., Ltd. | メモリカードおよびメモリカードの製造方法 |
CN100538731C (zh) | 2006-02-10 | 2009-09-09 | 富士通株式会社 | Rfid标签制造方法和rfid标签 |
-
2007
- 2007-10-26 JP JP2007279346A patent/JP5141187B2/ja not_active Expired - Fee Related
-
2008
- 2008-07-23 EP EP08160980.2A patent/EP2053548B1/en not_active Expired - Fee Related
- 2008-07-25 US US12/180,117 patent/US8299925B2/en not_active Expired - Fee Related
- 2008-08-19 KR KR1020080080852A patent/KR101037639B1/ko not_active IP Right Cessation
- 2008-08-20 CN CN2008102130108A patent/CN101419676B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN101419676A (zh) | 2009-04-29 |
EP2053548B1 (en) | 2013-04-10 |
EP2053548A1 (en) | 2009-04-29 |
JP2009110106A (ja) | 2009-05-21 |
US8299925B2 (en) | 2012-10-30 |
KR101037639B1 (ko) | 2011-05-30 |
KR20090042709A (ko) | 2009-04-30 |
US20090109000A1 (en) | 2009-04-30 |
CN101419676B (zh) | 2012-06-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4855849B2 (ja) | Rfidタグの製造方法、およびrfidタグ | |
JP5029597B2 (ja) | カード型記録媒体およびカード型記録媒体の製造方法 | |
EP1873694A1 (en) | RFID tag manufacturing method and RFID tag | |
US20110011939A1 (en) | Contact-less and dual interface inlays and methods for producing the same | |
US10366320B2 (en) | Dual-interface IC card | |
US7960752B2 (en) | RFID tag | |
KR102481332B1 (ko) | 칩 카드 제조 방법, 및 상기 방법에 의해 획득된 칩 카드 | |
US10163820B2 (en) | Chip carrier and method thereof | |
JP5141187B2 (ja) | Rfidタグ製造方法 | |
JP4860494B2 (ja) | 電子装置の製造方法 | |
US20080283618A1 (en) | Contactless Transmission System and Method for Producing the Same | |
US10804226B2 (en) | Method for manufacturing chip cards and chip card obtained by said method | |
JP3753984B2 (ja) | 非接触通信機器用モジュール及びその製造方法 | |
TWI336223B (en) | Electronic device and method of manufacturing same | |
JP2003016406A (ja) | 非接触型icカードとその製造方法 | |
JP2004013733A (ja) | 非接触データキャリア及びその製造方法 | |
JP2009157743A (ja) | Ic非実装外部接続端子基板型デュアルicカード | |
JP2004046634A (ja) | 非接触型icカード | |
JP2004062634A (ja) | 非接触通信媒体の接合方法および非接触通信媒体 | |
JP2006019606A (ja) | 電子部品の製造方法および電子部品ならびにicカード | |
JP2001067450A (ja) | 接触型非接触型共用icモジュールとそれを使用した接触型非接触型共用icカード | |
JP2003085507A (ja) | 外部端子付icカードの製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20100616 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120614 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120626 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120717 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20121023 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20121105 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20151130 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5141187 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |