JP5113509B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5113509B2 JP5113509B2 JP2007332195A JP2007332195A JP5113509B2 JP 5113509 B2 JP5113509 B2 JP 5113509B2 JP 2007332195 A JP2007332195 A JP 2007332195A JP 2007332195 A JP2007332195 A JP 2007332195A JP 5113509 B2 JP5113509 B2 JP 5113509B2
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
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- Engineering & Computer Science (AREA)
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- Wire Bonding (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
本発明の実施の形態1による半導体装置に設けられたボンディングパッドの配置の一例を図1〜図3に示す。図1はボンディングパッドの配置の一例を説明する半導体装置全体の平面図、図2は図1の一部を拡大した要部平面図、図3(a)、(b)、(c)および(d)はそれぞれ図2のA−A′線、B−B′線、C−C′線およびD−D′線における要部断面図である。
に沿う周辺部3および第2辺S2に対向する第4辺S4に沿う周辺部3にも、それぞれ第2の方向に沿って複数のボンディングパッドからなる第1の列L1および第2の列L2の2列を配置してもよい。
本発明の実施の形態2による半導体装置に設けられたボンディングパッドの配置の一例を図5に示す。図5はボンディングパッドの配置の一例を説明する半導体装置の一部を拡大した要部平面図である。
2 製品部
3 周辺部
4,5,6,7 ボンディングパッド
IS 絶縁膜
L1 第1の列
L2 第2の列
L3 第1の千鳥状の列
L4 第2の千鳥状の列
M1 1層目のパッド用配線
M2 2層目のパッド用配線
M3 3層目のパッド用配線
M4 4層目のパッド用配線
S1 第1の辺
S2 第2の辺
S3 第3の辺
S4 第4の辺
Sub 半導体基板
Claims (10)
- 第1の方向に沿って配置された複数のボンディングパッドからなるボンディングパッドセットが、前記第1の方向と直交する第2の方向に沿って複数設けられており、
一のボンディングパッドセットを構成する各々のボンディングパッドが他のボンディングパッドセットを構成する各々のボンディングパッドと前記第2の方向と同一線上に並んで設けられており、
前記一のボンディングパッドセットは、前記他のボンディングパッドセットを構成し、前記第2の方向と同一線上に並んで配置されていないボンディングパッドとパッド用配線を介して電気的に接続されたボンディングパッドを含むことを特徴とする半導体装置。 - 請求項1記載の半導体装置において、前記一のボンディングパッドセットは、さらに前記他のボンディングパッドセットを構成し、前記第2の方向と同一線上に並んで配置されたボンディングパッドとパッド用配線を介して電気的に接続されたボンディングパッドを含むことを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記一のボンディングパッドセットを構成する複数のボンディングパッドの全部または一部にボンディングワイヤが接続されることを特徴とする半導体装置。
- 請求項3記載の半導体装置において、前記ボンディングワイヤが接続されない前記一のボンディングパッドセットを構成するボンディングパッドおよび前記他のボンディングパッドセットを構成するボンディングパッドは、検査時に検査用のプローブ針を接触させる検査用パッドに用いられることを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記ボンディングパッドセットが前記第2の方向に沿って3セット以上設けられていることを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記ボンディングパッドセットを構成する複数のボンディングパッドは最上層配線を用いて形成され、前記パッド用配線は前記最上層配線よりも下層の配線を用いて形成されていることを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記ボンディングパッドセットを構成する複数のボンディングパッドは種々の回路が形成された製品部に最上層配線を用いて形成されていることを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記ボンディングパッドセットを構成する複数のボンディングパッドは、種々の回路が形成された製品部以外の領域に最上層配線を用いて形成されていることを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記ボンディングパッドセットを構成する複数のボンディングパッドは、前記第1の方向に沿って一列に配置されていることを特徴とする半導体装置。
- 請求項1記載の半導体装置において、前記ボンディングパッドセットを構成する複数のボンディングパッドは、前記第1の方向に沿って千鳥状に配置されていることを特徴とする半導体装置。
Priority Applications (1)
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JP2007332195A JP5113509B2 (ja) | 2007-12-25 | 2007-12-25 | 半導体装置 |
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JP2007332195A JP5113509B2 (ja) | 2007-12-25 | 2007-12-25 | 半導体装置 |
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JP2009158561A JP2009158561A (ja) | 2009-07-16 |
JP5113509B2 true JP5113509B2 (ja) | 2013-01-09 |
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JP2007332195A Expired - Fee Related JP5113509B2 (ja) | 2007-12-25 | 2007-12-25 | 半導体装置 |
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JP6129671B2 (ja) * | 2013-07-19 | 2017-05-17 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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JPH1065103A (ja) * | 1996-08-19 | 1998-03-06 | Nec Corp | 半導体集積回路 |
JP2007149809A (ja) * | 2005-11-25 | 2007-06-14 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2007165567A (ja) * | 2005-12-14 | 2007-06-28 | Matsushita Electric Ind Co Ltd | 半導体チップとその制御方法 |
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