JP5097235B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5097235B2 JP5097235B2 JP2010074762A JP2010074762A JP5097235B2 JP 5097235 B2 JP5097235 B2 JP 5097235B2 JP 2010074762 A JP2010074762 A JP 2010074762A JP 2010074762 A JP2010074762 A JP 2010074762A JP 5097235 B2 JP5097235 B2 JP 5097235B2
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- phase
- digital
- controlled oscillator
- voltage
- voltage controlled
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- 239000004065 semiconductor Substances 0.000 title claims description 23
- 239000003990 capacitor Substances 0.000 claims description 39
- 230000010355 oscillation Effects 0.000 claims description 22
- 230000035945 sensitivity Effects 0.000 claims description 8
- 238000007599 discharging Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 22
- 238000000034 method Methods 0.000 description 14
- 230000008569 process Effects 0.000 description 8
- 230000004913 activation Effects 0.000 description 7
- 238000001994 activation Methods 0.000 description 7
- 230000008859 change Effects 0.000 description 6
- 230000005012 migration Effects 0.000 description 5
- 238000013508 migration Methods 0.000 description 5
- 230000009467 reduction Effects 0.000 description 5
- 238000004364 calculation method Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000003491 array Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
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- 238000012886 linear function Methods 0.000 description 1
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- 230000001360 synchronised effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
200…デジタル補償型位相同期回路、201…デジタル補償回路、300…差動アンプ、500…MOS容量アレイ、800…デジタル位相比較器、801…デジタルフィルタ、900…位相比較ユニット。
Claims (5)
- 発振ノードに容量を具備し、印加電圧で連続的に制御される電圧制御型発振器を含む位相同期回路と、
入力される位相差に応じて前記電圧制御型発振器の発振ノードの容量を可変に制御するデジタル補償回路とを有し、
前記デジタル補償回路は、前記位相同期回路のアナログ制御部をデジタル等価回路として、少なくとも一つ以上のデジタル位相比較器と少なくとも一つ以上のデジタルフィルタとを具備し、印加電圧で利得が決定される前記電圧制御型発振器の発振ノードに接続された容量を変化させるものであり、
前記デジタル位相比較器は、参照クロックと分周クロックとの入力感度の異なる位相比較ユニットを少なくとも一つ以上並列に接続し、それぞれ異なった感度でUP信号およびDOWN信号を出力することを特徴とする半導体装置。 - 請求項1において、
前記電圧制御型発振器は、ON/OFF切り替え機能を有する複数の容量を発振ノードに具備し、
前記デジタル補償回路は、前記複数の容量を、位相遅れに対して減らし、位相進みに対して増加させ、離散的に利得を変化させることを特徴とする半導体装置。 - 請求項1において、
前記デジタルフィルタは、前記デジタル位相比較器の出力結果から前記位相同期回路の位相余裕を補償するために、ループ帯域付近で位相進みを発生させるフィルタ形状を具備し、少なくとも1bit以上のデジタル制御信号で、前記電圧制御型発振器の発振ノードに接続される複数の容量のON/OFFを決定することを特徴とする半導体装置。 - 請求項1において、
前記電圧制御型発振器の発振ノードに接続される複数の容量は、MOS容量で形成され、MOSスイッチでON/OFFの切り替えを行うことを特徴とする半導体装置。 - 請求項1において、
前記位相同期回路は、さらに、参照クロックと前記電圧制御型発振器の出力信号を分周した分周クロックとの位相差を検出する位相周波数比較器と、前記位相周波数比較器の位相比較結果から電流量を制御するチャージポンプと、前記チャージポンプの電流をチャージ・ディスチャージして前記電圧制御型発振器の電圧を決定するループフィルタとを具備することを特徴とする半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010074762A JP5097235B2 (ja) | 2010-03-29 | 2010-03-29 | 半導体装置 |
US13/026,245 US8547148B2 (en) | 2010-03-29 | 2011-02-12 | Semiconductor device with dynamically calibrated oscillator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010074762A JP5097235B2 (ja) | 2010-03-29 | 2010-03-29 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011211318A JP2011211318A (ja) | 2011-10-20 |
JP5097235B2 true JP5097235B2 (ja) | 2012-12-12 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2010074762A Expired - Fee Related JP5097235B2 (ja) | 2010-03-29 | 2010-03-29 | 半導体装置 |
Country Status (2)
Country | Link |
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US (1) | US8547148B2 (ja) |
JP (1) | JP5097235B2 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9331677B2 (en) * | 2014-02-24 | 2016-05-03 | Fujitsu Limited | Oscillator with adjustable frequency |
US9350365B2 (en) * | 2014-09-18 | 2016-05-24 | Intel Corporation | Digital phase-locked loop supply voltage control |
JP2017079353A (ja) * | 2015-10-19 | 2017-04-27 | キュリアス株式会社 | クロックリカバリ回路 |
JP7165967B2 (ja) * | 2018-10-04 | 2022-11-07 | ザインエレクトロニクス株式会社 | Pll回路 |
US10516403B1 (en) * | 2019-02-27 | 2019-12-24 | Ciena Corporation | High-order phase tracking loop with segmented proportional and integral controls |
CN110504962B (zh) * | 2019-07-17 | 2023-04-28 | 晶晨半导体(上海)股份有限公司 | 数字补偿模拟小数分频锁相环及控制方法 |
CN116979959B (zh) * | 2023-09-21 | 2024-01-30 | 深圳市九天睿芯科技有限公司 | 锁相环、芯片及电子设备 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04273618A (ja) | 1991-02-28 | 1992-09-29 | Fujitsu Ltd | Pll回路 |
US5644743A (en) * | 1995-12-04 | 1997-07-01 | Motorola, Inc. | Hybrid analog-digital phase error detector |
US6597249B2 (en) * | 2001-09-04 | 2003-07-22 | Prominenet Communications, Inc. | Fast coarse tuning control for PLL frequency synthesizer |
US7103337B2 (en) * | 2002-05-31 | 2006-09-05 | Hitachi, Ltd. | PLL circuit having a multi-band oscillator and compensating oscillation frequency |
JP2004015387A (ja) | 2002-06-06 | 2004-01-15 | Matsushita Electric Ind Co Ltd | 電圧制御型発振器及び周波数シンセサイザ |
JP2004080624A (ja) * | 2002-08-21 | 2004-03-11 | Matsushita Electric Ind Co Ltd | 周波数シンセサイザ |
JP4649818B2 (ja) * | 2003-02-21 | 2011-03-16 | 富士通株式会社 | 電圧制御発振器及びpll回路 |
US7349514B2 (en) * | 2003-04-01 | 2008-03-25 | Seiko Epson Corporation | Frequency/phase locked loop clock synthesizer using an all digital frequency detector and an analog phase detector |
US7336134B1 (en) * | 2004-06-25 | 2008-02-26 | Rf Micro Devices, Inc. | Digitally controlled oscillator |
JP2006332915A (ja) | 2005-05-24 | 2006-12-07 | Yokogawa Electric Corp | 位相同期ループ、信号発生装置および同期方法 |
JP2009159038A (ja) * | 2007-12-25 | 2009-07-16 | Hitachi Ltd | Pll回路 |
JP5044434B2 (ja) * | 2008-02-14 | 2012-10-10 | 株式会社東芝 | 位相同期回路及びこれを用いた受信機 |
-
2010
- 2010-03-29 JP JP2010074762A patent/JP5097235B2/ja not_active Expired - Fee Related
-
2011
- 2011-02-12 US US13/026,245 patent/US8547148B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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JP2011211318A (ja) | 2011-10-20 |
US8547148B2 (en) | 2013-10-01 |
US20110234274A1 (en) | 2011-09-29 |
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