JP5012772B2 - Semiconductor device manufacturing method and semiconductor device - Google Patents

Semiconductor device manufacturing method and semiconductor device Download PDF

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JP5012772B2
JP5012772B2 JP2008303795A JP2008303795A JP5012772B2 JP 5012772 B2 JP5012772 B2 JP 5012772B2 JP 2008303795 A JP2008303795 A JP 2008303795A JP 2008303795 A JP2008303795 A JP 2008303795A JP 5012772 B2 JP5012772 B2 JP 5012772B2
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rod
sleeve
shaped electrode
electrode terminal
semiconductor device
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義弘 山口
誠次 岡
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
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    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device by which a system and the semiconductor device can be made compact inexpensively, and to provide a method of manufacturing a semiconductor device and the semiconductor device which, even when joining using lead-free solder is employed, suppress an adverse influence of the joining on reliability. <P>SOLUTION: One end of a rod-shaped electrode terminal is joined onto a circuit pattern or semiconductor element so that the rod-shaped electrode terminal erects on the circuit pattern or semiconductor element. Then a sleeve capable of moving along the length of the rod-shaped electrode terminal is mounted on the other end of the rod-shaped electrode terminal so that the length of a structure formed of the rod-shaped electrode and sleeve is longer than the long-dimensional length of the rod-shaped electrode. Then the sleeve is pressed in the rod-shaped electrode terminal simultaneously with mold clamping. A mold resin is filled into a cavity after the sleeve is pressed in. When the mold resin is filled into, an upper mold internal wall and the sleeve come in contact with each other. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

本発明は、トランスファー成形を行う半導体装置の製造方法および半導体装置に関し、特に棒状電極端子を半導体素子の表面に対して直立するように配置してシステムおよび半導体装置の小型化を行う半導体装置の製造方法および半導体装置に関する。   The present invention relates to a method for manufacturing a semiconductor device for performing transfer molding and a semiconductor device, and more particularly, to manufacture a semiconductor device for miniaturizing a system and a semiconductor device by arranging rod-like electrode terminals so as to stand upright with respect to the surface of a semiconductor element. The present invention relates to a method and a semiconductor device.

半導体装置のパッケージは、製造コストや生産性などの観点からトランスファー成形による樹脂封止で形成されることが多い。トランスファー成形では、樹脂組成物（モールド樹脂）を必要に応じて高周波加熱し溶融させ、高温に保たれた金属金型内部の空洞であるキャビティ内に充填する。金属金型は典型的には上金型と下金型からなり、前述のキャビティは上金型の内壁と下金型の内壁により規定される空洞である。そして、モールド樹脂の充填およびその後に行われるモールド樹脂の加圧にはプランジャーが用いられモールド樹脂が加熱硬化される。   A package of a semiconductor device is often formed by resin sealing by transfer molding from the viewpoint of manufacturing cost and productivity. In transfer molding, a resin composition (mold resin) is heated by high frequency as necessary to be melted, and filled into a cavity that is a cavity inside a metal mold kept at a high temperature. The metal mold typically includes an upper mold and a lower mold, and the aforementioned cavity is a cavity defined by the inner wall of the upper mold and the inner wall of the lower mold. A plunger is used for filling the mold resin and pressurizing the mold resin thereafter, and the mold resin is heated and cured.

トランスファー成形によりパッケージされる対象全体はインサート物とよばれることがある。インサート物には、例えば回路パターンの形成された絶縁基板や回路パターンに接合された半導体素子、回路パターン又は半導体素子の電極と接合されモールド樹脂の外部にのびるべき電極端子などが含まれる。トランスファー成形では典型的には下金型の内壁にインサート物を搭載し上金型と下金型を直接的または間接的に接触させて型締めを行う。   The entire object packaged by transfer molding is sometimes called an insert. The insert includes, for example, an insulating substrate on which a circuit pattern is formed, a semiconductor element bonded to the circuit pattern, an electrode terminal to be bonded to the circuit pattern or the electrode of the semiconductor element, and to extend outside the mold resin. In transfer molding, typically, an insert is mounted on the inner wall of the lower mold, and the upper mold and the lower mold are brought into direct or indirect contact to perform clamping.

型締めが行われた状態でキャビティへモールド樹脂が充填されて周知の方法によりモールド樹脂により樹脂封止された半導体装置が製造される。トランスファー成形では、型締めされた状態において電極端子が前述の上金型内壁に接触するなどして、樹脂封止後にモールド樹脂の外部へ露出する。   With the mold clamped, the cavity is filled with mold resin, and a semiconductor device sealed with the mold resin is manufactured by a known method. In transfer molding, the electrode terminal is exposed to the outside of the mold resin after sealing with the resin such that the electrode terminal contacts the inner wall of the upper mold when the mold is clamped.

ここでいう電極端子はトランスファー成形後にパッケージ外部へのびてパッケージ外部と電気的に接続されるものである。そして、複数のパッケージをプリント基板に平面配置することを考慮すると、電極端子はパッケージ側面（半導体素子の表面と平行方向）にのびるのではなく、パッケージ上面（半導体素子の表面と垂直方向）にのびるように配置する方がシステムおよび半導体装置の小型化に好ましい。   Here, the electrode terminal extends outside the package after transfer molding and is electrically connected to the outside of the package. In consideration of arranging a plurality of packages on the printed circuit board, the electrode terminals do not extend on the package side surface (in a direction parallel to the surface of the semiconductor element) but on the package upper surface (in the direction perpendicular to the surface of the semiconductor element). This arrangement is preferable for downsizing the system and the semiconductor device.

特許文献１には電極端子がパッケージ側面（半導体素子の表面と平行方向）にのびる構成が開示されており、特許文献４には電極端子がパッケージ上面（半導体素子の表面と垂直方向）にのびる構成が開示されている。   Patent Document 1 discloses a configuration in which electrode terminals extend on the package side surface (in a direction parallel to the surface of the semiconductor element), and Patent Document 4 discloses a configuration in which electrode terminals extend on the top surface of the package (in a direction perpendicular to the surface of the semiconductor element). Is disclosed.

特開平０８−２０４０６４号公報Japanese Patent Laid-Open No. 08-204064 特開２００１−３３２５７３号公報JP 2001-332573 A 特開２００６−１２８２５０号公報JP 2006-128250 A 特開２００７−１８４３１５号公報JP 2007-184315 A

電極端子がパッケージ上面（半導体素子の表面と垂直方向）にのびる構成を採用する場合、半導体素子の表面に対して直立する棒状電極が電極端子として用いられる（以後このような構成を電極端子直立型と称する）。棒状電極は一端が回路パターン又は半導体素子の電極と接合され、他端ではモールド樹脂の外部に露出する必要がある。よって上金型と下金型によって型締めされキャビティ内部に棒状電極を含むインサート物が配置された状態において、棒状電極の他端が上金型の内壁に接触している必要がある。   When adopting a configuration in which the electrode terminal extends on the upper surface of the package (perpendicular to the surface of the semiconductor element), a rod-like electrode standing upright with respect to the surface of the semiconductor element is used as the electrode terminal (hereinafter, this configuration is referred to as an electrode terminal upright type). Called). One end of the rod-shaped electrode is bonded to the circuit pattern or the electrode of the semiconductor element, and the other end needs to be exposed to the outside of the mold resin. Therefore, in a state where the insert is inserted into the cavity and is clamped by the upper mold and the lower mold, the other end of the rod-shaped electrode needs to be in contact with the inner wall of the upper mold.

ところがインサート物の総厚がキャビティ内部の縦方向距離より厚いと、インサート物が型締めによってダメージを受ける問題があった。一方インサート物の総厚がキャビティ内部の縦方向距離より薄いと、型締めの際に棒状電極の他端が上金型の内壁に接触せず、棒状電極の他端の全てがモールド樹脂で覆い隠されて外部に露出しない問題があった。さらにこれらの問題を回避するためにはインサート物の厚さおよび金型の寸法精度を厳しく管理する必要があり、製造コストの増加や歩留まり低下の問題があった。また、これらの問題よって棒状電極を絶縁基板の回路パターン上などではなく、半導体素子上に設けることを困難としていたので半導体装置の小型化が制限されていた。   However, if the total thickness of the insert is larger than the longitudinal distance inside the cavity, there is a problem that the insert is damaged by clamping. On the other hand, if the total thickness of the insert is less than the longitudinal distance inside the cavity, the other end of the rod-shaped electrode does not contact the inner wall of the upper mold during mold clamping, and the other end of the rod-shaped electrode is covered with mold resin. There was a problem of being hidden and not exposed to the outside. Furthermore, in order to avoid these problems, it is necessary to strictly manage the thickness of the insert and the dimensional accuracy of the mold, which causes problems of increase in manufacturing cost and yield. Further, due to these problems, it has been difficult to provide the rod-shaped electrode on the semiconductor element rather than on the circuit pattern of the insulating substrate, and thus miniaturization of the semiconductor device has been limited.

本発明は、上述のような課題を解決するためになされたもので、インサート物の厚さおよび金型の寸法精度を厳しく管理することによる製造コストの増加等を回避して小型化に対応した半導体装置を供給できる半導体装置の製造方法および半導体装置を提供することを目的とする。   The present invention has been made in order to solve the above-described problems, and avoids an increase in manufacturing cost and the like by strictly managing the thickness of the insert and the dimensional accuracy of the mold, and has responded to miniaturization. It is an object of the present invention to provide a semiconductor device manufacturing method and a semiconductor device that can supply the semiconductor device.

本願の発明にかかる半導体装置の製造方法は、棒状電極端子が、絶縁基板表面に形成された回路パターン又は半導体素子上に直立するように、該棒状電極端子の一端を該回路パターン又は該半導体素子上に接合する工程と、該棒状電極端子の他端に装着される該棒状電極端子の長手方向に可動であるスリーブを、該棒状電極の長手方向の長さより該棒状電極と該スリーブからなる構造の長さの方が長くなるように該棒状電極端子の他端に装着する工程とを備える。さらに、上金型の内壁を該スリーブに下方向の力を及ぼすように該スリーブと接触させ、かつ、下金型の内壁からは該絶縁基板の裏面に上方向の力を及ぼすようにした状態で型締めを行い、該棒状電極と該スリーブからなる構造の長さを短くするように該スリーブの該棒状電極に対する相対位置を変化させつつ該スリーブを該棒状電極端子に圧入する工程と、該スリーブを該棒状電極端子に圧入した後に該上金型と該下金型から構成される空洞であるキャビティ内にモールド樹脂を充填する工程とを備える。そして、該モールド樹脂を充填する際には該上金型の内壁と該スリーブが接触していることを特徴とする。 The method of manufacturing a semiconductor device according to the invention of the present application is such that one end of the rod-shaped electrode terminal is placed on the circuit pattern or the semiconductor element so that the rod-shaped electrode terminal stands upright on the circuit pattern or semiconductor element formed on the surface of the insulating substrate. A structure comprising a rod-shaped electrode and a sleeve, the length of the rod-shaped electrode being longer than the length of the rod-shaped electrode. And a step of attaching to the other end of the rod-shaped electrode terminal so that the length of is longer. Further, the inner wall of the upper mold is brought into contact with the sleeve so as to exert a downward force on the sleeve, and the upward force is exerted on the back surface of the insulating substrate from the inner wall of the lower mold. And clamping the sleeve into the rod-shaped electrode terminal while changing the relative position of the sleeve to the rod-shaped electrode so as to shorten the length of the structure composed of the rod-shaped electrode and the sleeve; and And a step of filling a mold resin into a cavity which is a cavity constituted by the upper mold and the lower mold after the sleeve is press-fitted into the rod-shaped electrode terminal. In addition, when the mold resin is filled, the inner wall of the upper mold and the sleeve are in contact with each other.

本願の発明にかかる半導体装置は、金属製のベース板と、該ベース板の表面に接合された絶縁基板と、該絶縁基板の該ベース板に接合された面と反対の面に形成された回路パターンと、該回路パターン上に接合された半導体素子と、該回路パターン又は、該半導体素子の該回路パターンと接合された面と反対の面上に直立するように、該回路パターン又は該半導体素子に一端が接合された棒状電極端子と、該棒状電極端子の他端に装着したスリーブとを備える。そして、該ベース板、該絶縁基板、該半導体素子、該棒状電極端子、該スリーブを、該スリーブの該絶縁基板と対向する面と反対の面および該ベース板の裏面を露出するようにして覆うモールド樹脂とを備えることを特徴とする。   A semiconductor device according to the present invention includes a metal base plate, an insulating substrate bonded to the surface of the base plate, and a circuit formed on a surface opposite to the surface bonded to the base plate of the insulating substrate. A pattern, a semiconductor element bonded onto the circuit pattern, and the circuit pattern or the semiconductor element so as to stand upright on a surface opposite to the surface of the circuit pattern or the semiconductor element bonded to the circuit pattern And a sleeve attached to the other end of the rod-shaped electrode terminal. Then, the base plate, the insulating substrate, the semiconductor element, the rod-like electrode terminal, and the sleeve are covered so that the surface of the sleeve opposite to the surface facing the insulating substrate and the back surface of the base plate are exposed. And a mold resin.

本発明により容易にシステムおよび半導体装置の小型化ができる。   According to the present invention, the system and the semiconductor device can be easily downsized.

実施の形態
本実施形態は容易にシステムおよび半導体装置の小型化が可能な半導体装置の製造方法および半導体装置に関する。実施形態では図を参照して説明を進める。なお、同一材料または同一、対応する構成要素には同一の符号を付して説明を省略する場合がある。 Embodiments The present embodiment relates to a method of manufacturing a semiconductor device and a semiconductor device capable of easily downsizing the system and the semiconductor device. The embodiment will be described with reference to the drawings. In some cases, the same material or the same or corresponding components are denoted by the same reference numerals and description thereof is omitted.

図１はこの実施形態の半導体装置１０における断面図である。この実施形態の半導体装置１０はインサート物１１がモールド樹脂４２により覆われるように配置される構成である。インサート物１１とはトランスファー成形の際にキャビティ内に配置されて樹脂封止の対象となるものをいう。インサート物１１は金属製のベース板１２を備える。ベース板１２の表面には鉛フリーはんだにより絶縁基板１６の導体ベタパターン１８が接合される。一方ベース板１２の裏面はモールド樹脂４２から露出する。モールド樹脂４２としては、熱硬化性であるエポキシ樹脂などである。   FIG. 1 is a cross-sectional view of the semiconductor device 10 of this embodiment. The semiconductor device 10 according to this embodiment is configured such that the insert 11 is covered with the mold resin 42. The insert 11 is an object that is placed in a cavity during transfer molding and is a target for resin sealing. The insert 11 includes a metal base plate 12. A conductive solid pattern 18 of the insulating substrate 16 is joined to the surface of the base plate 12 by lead-free solder. On the other hand, the back surface of the base plate 12 is exposed from the mold resin 42. The mold resin 42 is a thermosetting epoxy resin or the like.

ベース板１２は主に後述する半導体素子などからの放熱を促進するヒートスプレッダとして機能するものである。ベース板１２の材料としては例えばＣｕ、ＡｌＳｉＣ、Ｃｕ−Ｍｏ等の材料が用いられる。   The base plate 12 mainly functions as a heat spreader that promotes heat dissipation from a semiconductor element, which will be described later. As the material of the base plate 12, for example, a material such as Cu, AlSiC, or Cu—Mo is used.

また、絶縁基板１６はアルミナ（Ａｌ２Ｏ３）や窒化アルミニウム（ＡｌＮ）などのセラミックスからなり、その表面に回路パターン２０が形成され裏面に導体ベタパターン１８が形成されている。回路パターン２０、導体ベタパターン共に例えばＣｕ箔等で形成される。 The insulating substrate 16 is made of ceramics such as alumina (Al 2 O 3 ) or aluminum nitride (AlN), the circuit pattern 20 is formed on the surface, and the solid conductor pattern 18 is formed on the back surface. Both the circuit pattern 20 and the solid conductor pattern are formed of, for example, Cu foil.

絶縁基板１６に形成された回路パターン２０には半導体素子２４およびチップ抵抗２６が接合される。これらの接合には鉛フリーはんだ２２が用いられる。この実施形態で半導体素子２４はＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）であって鉛フリーはんだ２２で回路パターン２０と接合される。ＩＧＢＴ（半導体素子２４）の裏面にはコレクタ電極が形成されている。一方半導体素子２４の表面にはエミッタ電極が形成されている。なお、半導体素子２４はＩＧＢＴに限定されない。   A semiconductor element 24 and a chip resistor 26 are joined to the circuit pattern 20 formed on the insulating substrate 16. Lead-free solder 22 is used for these joints. In this embodiment, the semiconductor element 24 is an IGBT (Insulated Gate Bipolar Transistor) and is joined to the circuit pattern 20 with a lead-free solder 22. A collector electrode is formed on the back surface of the IGBT (semiconductor element 24). On the other hand, an emitter electrode is formed on the surface of the semiconductor element 24. The semiconductor element 24 is not limited to the IGBT.

さらに回路パターン２０には、半導体素子２４（絶縁基板１６）の表面に対して直立するように棒状電極端子３０が接合される。半導体素子２４の表面のエミッタ電極には、これに対して直立するように棒状電極端子３２が接合される。チップ抵抗２６が接合された回路パターン２０には、同様に絶縁基板１６に対して直立するように棒状電極端子３４が接合される。そして、それぞれにおいて棒状電極端子との接合は鉛フリーはんだ２３により行われる。なお、棒状電極端子３０、３２、３４の材料としては、導電性に優れるＣｕやその合金等が用いられる。   Furthermore, rod-shaped electrode terminals 30 are joined to the circuit pattern 20 so as to stand upright with respect to the surface of the semiconductor element 24 (insulating substrate 16). A rod-shaped electrode terminal 32 is joined to the emitter electrode on the surface of the semiconductor element 24 so as to stand upright. Similarly, the rod-shaped electrode terminal 34 is joined to the circuit pattern 20 to which the chip resistor 26 is joined so as to stand upright with respect to the insulating substrate 16. In each case, joining with the rod-shaped electrode terminal is performed by lead-free solder 23. In addition, as a material of the rod-shaped electrode terminals 30, 32, 34, Cu having excellent conductivity or an alloy thereof is used.

前述したように棒状電極端子３０、３２、３４はいずれも絶縁基板１６に対して直立するようにその一端が回路パターン２０又は半導体素子２４と接合される。すなわち、棒状電極端子３０、３２、３４はその長手方向が絶縁基板１６の回路パターン２０が形成された表面に対して垂直方向にのびるように接合される。   As described above, one end of each of the rod-shaped electrode terminals 30, 32, 34 is joined to the circuit pattern 20 or the semiconductor element 24 so as to stand upright with respect to the insulating substrate 16. That is, the rod-shaped electrode terminals 30, 32, 34 are bonded so that the longitudinal direction thereof extends in the vertical direction with respect to the surface of the insulating substrate 16 on which the circuit pattern 20 is formed.

棒状電極端子３０、３２、３４の他端にはそれぞれスリーブ３６、３８、４０が装着（嵌合）されている。スリーブ３６、３８、４０は締りばめの筒状の形状（以後、筒状という）で棒状電極端子３０、３２、３４の他端を覆うが他端の上面は覆わない。そしてスリーブ３６、３８、４０の上面はモールド樹脂４２から露出しており、棒状電極端子３０、３２、３４の他端上面もモールド樹脂で覆われることなく外部との電気的接続が可能な構造となっている。この実施形態ではスリーブ３６、３８、４０は、その線膨張係数がモールド樹脂４２の線膨張係数と棒状電極端子３０、３２、３４の線膨張係数の間の値をとる材料、例えばＰＢＴ（ポリブチレンテレフタレート）で形成されている。この実施形態における各材料の線膨張係数αは、モールド樹脂のエポキシが約１３×１０−６／Ｋ、スリーブのＰＢＴが約１５×１０−６／Ｋ、棒状電極端子のＣｕが約１６×１０−６／Ｋである。なお、一般に樹脂の線膨張係数はフィラーの含有量を調整することによって所望の値を得るのに都合がよく、また射出成形によって形成可能なので安価である。 Sleeves 36, 38, and 40 are attached (fitted) to the other ends of the rod-shaped electrode terminals 30, 32, and 34, respectively. The sleeves 36, 38, and 40 have a cylindrical shape of interference fit (hereinafter referred to as a cylindrical shape) that covers the other ends of the rod-shaped electrode terminals 30, 32, and 34 but does not cover the upper surface of the other end. The upper surfaces of the sleeves 36, 38, and 40 are exposed from the mold resin 42, and the upper surfaces of the other ends of the rod-like electrode terminals 30, 32, and 34 are not covered with the mold resin and can be electrically connected to the outside. It has become. In this embodiment, the sleeves 36, 38, 40 are made of a material whose linear expansion coefficient takes a value between the linear expansion coefficient of the mold resin 42 and the linear expansion coefficient of the rod-shaped electrode terminals 30, 32, 34, such as PBT (polybutylene). Terephthalate). In this embodiment, the linear expansion coefficient α of each material is about 13 × 10 −6 / K for the epoxy of the mold resin, about 15 × 10 −6 / K for the PBT of the sleeve, and about 16 × 10 6 for the Cu of the rod-shaped electrode terminal. -6 / K. In general, the linear expansion coefficient of the resin is convenient for obtaining a desired value by adjusting the filler content, and is inexpensive because it can be formed by injection molding.

図２は図１の破線枠内の拡大図である。図２は棒状電極端子３０の他端とスリーブ３６の位置関係について説明する図である。図２から把握されるように、棒状電極端子３０の長手方向の長さより棒状電極端子３０とスリーブ３６からなる構造の長さの方が長くなる。   FIG. 2 is an enlarged view inside the broken line frame of FIG. FIG. 2 is a view for explaining the positional relationship between the other end of the rod-shaped electrode terminal 30 and the sleeve 36. As can be understood from FIG. 2, the length of the structure including the rod-shaped electrode terminal 30 and the sleeve 36 is longer than the length of the rod-shaped electrode terminal 30 in the longitudinal direction.

図３は図１の平面図である。先に述べているが図３に示されるようにこの実施形態の半導体装置はモールド樹脂４２の上面からスリーブ３６、３８、４０が表面に露出する。また、スリーブ３６、３８、４０に他端が覆われた棒状電極端子３０、３２、３４の上面もモールド樹脂４２から露出する。   FIG. 3 is a plan view of FIG. As described above, as shown in FIG. 3, in the semiconductor device of this embodiment, the sleeves 36, 38, and 40 are exposed from the upper surface of the mold resin 42. Further, the upper surfaces of the rod-like electrode terminals 30, 32, 34 whose other ends are covered with the sleeves 36, 38, 40 are also exposed from the mold resin 42.

図４は図３と同様に図１の平面図である。図４は半導体素子２４などのインサート物の配置を説明するためにモールド樹脂４２を省略した図である。図４から把握される通り、この実施形態ではＩＧＢＴである半導体装置２４の裏面のコレクタ電極は回路パターン２０により棒状電極端子３０と接合される。ＩＧＢＴである半導体装置２４の表面のエミッタ電極は棒状電極端子３２と接合される。半導体装置２４の表面のゲート電極はアルミワイヤ２８により回路パターン２０に引き出され、チップ抵抗２６を介して棒状電極端子３４と接続されている。   4 is a plan view of FIG. 1 similar to FIG. FIG. 4 is a view in which the mold resin 42 is omitted in order to explain the arrangement of inserts such as the semiconductor element 24. As can be understood from FIG. 4, in this embodiment, the collector electrode on the back surface of the semiconductor device 24 which is an IGBT is joined to the rod-shaped electrode terminal 30 by the circuit pattern 20. The emitter electrode on the surface of the semiconductor device 24 which is an IGBT is joined to the rod-shaped electrode terminal 32. The gate electrode on the surface of the semiconductor device 24 is drawn out to the circuit pattern 20 by the aluminum wire 28 and is connected to the rod-shaped electrode terminal 34 through the chip resistor 26.

図５は図４などで説明したこの実施形態の半導体装置を回路記号に表したものである。図５から把握される通り、チップ抵抗２６はゲート抵抗である。この発明に係る半導体装置１０は上述の構成を備える。以後、半導体装置１０の製造方法について説明する。   FIG. 5 is a circuit symbol showing the semiconductor device of this embodiment described with reference to FIG. As can be seen from FIG. 5, the chip resistor 26 is a gate resistor. The semiconductor device 10 according to the present invention has the above-described configuration. Hereinafter, a method for manufacturing the semiconductor device 10 will be described.

図６はこの実施形態の半導体装置の製造方法を説明するフローチャートである。まず、絶縁基板の回路パターン２０に鉛フリーはんだ２２を塗布し半導体素子２４とチップ抵抗２６が回路パターンに接合される（ステップ５０）。次いで、アルミワイヤ２８によりワイヤボンディングが行われる（ステップ５２）。ワイヤボンディングによる接続は図４を参照して説明したとおり回路パターンと半導体素子２４とを接合する接続を含む。次いで、ベース１２板上に鉛フリーはんだ１４を塗布し、絶縁基板の裏面の導体ベタパターン１８とベース板１２の接合が行われる。これにより絶縁基板１６とベース板１２が接合される（ステップ５４）。なお、この例では絶縁基板の回路パターン上への半導体素子等の接合（ステップ５０）と、絶縁基板の導体ベタパターンとベース板との接合（ステップ５４）とを個別に行っているが、これらは同時に接合されるようにしてもよい。   FIG. 6 is a flowchart for explaining the method for manufacturing the semiconductor device of this embodiment. First, lead-free solder 22 is applied to the circuit pattern 20 on the insulating substrate, and the semiconductor element 24 and the chip resistor 26 are joined to the circuit pattern (step 50). Next, wire bonding is performed with the aluminum wire 28 (step 52). The connection by wire bonding includes the connection for joining the circuit pattern and the semiconductor element 24 as described with reference to FIG. Next, lead-free solder 14 is applied on the base 12 plate, and the solid conductor pattern 18 on the back surface of the insulating substrate and the base plate 12 are joined. As a result, the insulating substrate 16 and the base plate 12 are joined (step 54). In this example, the bonding of the semiconductor element or the like onto the circuit pattern of the insulating substrate (step 50) and the bonding of the conductive solid pattern of the insulating substrate and the base plate (step 54) are performed separately. May be joined simultaneously.

次いで、棒状電極端子の接合が行われる（ステップ５６）。ステップ５６ではまず、棒状電極端子３０、３２、３４が接合されるべき部分である回路パターン２０および半導体素子２４表面に鉛フリーはんだ２３が塗布される。その後、この塗布された鉛フリーはんだ２３に対して棒状電極端子３０、３２、３４の接合を行うのだが、この際、位置決め冶具７２の使用により、例えばベース板１２を基準にして棒状電極端子３０、３２、３４が所定位置に配置され、かつ直立（鉛直）に固定されるように行われる。そして、棒状電極端子３０、３２、３４が所定位置への接合により固定された後は、そのベース板１２の裏面がモールド成形のための下金型７０の内壁と接するように設置される（図７参照）。またこの際、棒状電極端子３０、３２、３４が半導体装置の外形に係る仕様（規格）にあわせて正確に位置されるようにするためには、ベース板１２が下金型７０の所定位置に設置される必要がある。   Next, the rod-shaped electrode terminals are joined (step 56). In step 56, first, lead-free solder 23 is applied to the surface of the circuit pattern 20 and the semiconductor element 24, which are portions to which the rod-shaped electrode terminals 30, 32, and 34 are to be joined. Thereafter, the rod-shaped electrode terminals 30, 32, 34 are joined to the applied lead-free solder 23. At this time, for example, the rod-shaped electrode terminal 30 is used with reference to the base plate 12 by using the positioning jig 72. , 32, and 34 are arranged at predetermined positions and are fixed upright (vertically). After the rod-shaped electrode terminals 30, 32, and 34 are fixed by bonding to predetermined positions, the back surface of the base plate 12 is installed so as to contact the inner wall of the lower mold 70 for molding (see FIG. 7). At this time, the base plate 12 is positioned at a predetermined position of the lower mold 70 so that the rod-shaped electrode terminals 30, 32, 34 are accurately positioned in accordance with the specifications (standards) related to the outer shape of the semiconductor device. Need to be installed.

ここで、棒状電極３０、３２、３４の他端からベース板１２の裏面までの距離は図７ではＨａで示されている。この実施形態でＨａは後述するキャビティ内部の縦方向距離ｈ以下である。なお、言うまでも無くこの距離ｈは半導体装置におけるパッケージの厚さと同じである。   Here, the distance from the other end of the rod-shaped electrodes 30, 32, 34 to the back surface of the base plate 12 is indicated by Ha in FIG. In this embodiment, Ha is not more than a longitudinal distance h inside the cavity described later. Needless to say, this distance h is the same as the thickness of the package in the semiconductor device.

次いで、棒状電極端子３０、３２、３４にスリーブ３６、３８、４０が装着される（ステップ５８）。ステップ５８は図８を参照して説明する。スリーブ３６、３８、４０は図８矢印方向に押下されそれぞれ棒状電極端子３０、３２、３４の他端に装着される。スリーブ３６、３８、４０は筒状の形状である。また、スリーブ３６、３８、４０は後述する金型の型締めにおいて力が加えられることで棒状電極端子３０、３２、３４の長手方向に圧入され得るものである。なお、「圧入」とは力を加えて押し込むことであり広義に解釈されるべきものである。この圧入における力によって、半導体素子表面に損傷等を与えることのないよう棒状電極端子とスリーブとの装着の程度が決定されている。つまり、比較的その厚さの薄いＩＧＢＴなどの半導体素子の場合、その損傷を避けるためには表面にかかる圧力を約４０ＭＰａ以下に抑えることが必要であるが、本発明の棒状電極端子とスリーブによる構成では、この値よりも十分小さな圧力範囲に抑えることが可能である。   Next, the sleeves 36, 38, 40 are attached to the rod-shaped electrode terminals 30, 32, 34 (step 58). Step 58 will be described with reference to FIG. The sleeves 36, 38, 40 are pushed in the direction of the arrows in FIG. 8 and are attached to the other ends of the rod-shaped electrode terminals 30, 32, 34, respectively. The sleeves 36, 38 and 40 have a cylindrical shape. The sleeves 36, 38, and 40 can be press-fitted in the longitudinal direction of the rod-shaped electrode terminals 30, 32, and 34 by applying a force in mold clamping described later. “Press-fit” means pushing in with force and should be interpreted broadly. The degree of mounting of the rod-shaped electrode terminal and the sleeve is determined so as not to damage the surface of the semiconductor element by the force in the press-fitting. That is, in the case of a semiconductor element such as IGBT having a relatively thin thickness, it is necessary to suppress the pressure applied to the surface to about 40 MPa or less in order to avoid the damage. In the configuration, it is possible to keep the pressure range sufficiently smaller than this value.

スリーブ３６、３８、４０の装着によりインサート物の形成を終える。ステップ５８を終えた段階でのインサート物の総厚すなわち、ベース板１２の裏面からスリーブ３６、３８、４０の上面までの距離は、ベース板１２の裏面から棒状電極端子３０、３２、３４の他端（の先端）までの距離より長い。換言すれば、スリーブ３６は、棒状電極端子３０単体の長手方向の長さより棒状電極端子３０とスリーブ３６からなる構造の長さの方が長くなるように棒状電極端子３０に装着される。他の棒状電極端子とスリーブも同様の関係である。   By forming the sleeves 36, 38 and 40, the formation of the insert is completed. The total thickness of the inserts at the stage when step 58 is completed, that is, the distance from the back surface of the base plate 12 to the top surfaces of the sleeves 36, 38, 40 is determined from the back surface of the base plate 12 and the rod electrode terminals 30, 32, 34. It is longer than the distance to the end. In other words, the sleeve 36 is attached to the rod-shaped electrode terminal 30 so that the length of the structure composed of the rod-shaped electrode terminal 30 and the sleeve 36 is longer than the length of the rod-shaped electrode terminal 30 alone in the longitudinal direction. The other rod-shaped electrode terminals and sleeves have the same relationship.

ここで、ステップ５８は下金型７０へベース板１２を接触させて行うことは必須ではなく、スリーブ３６、３８、４０の装着後に下金型７０へベース板１２を接触させてもよい。   Here, step 58 is not necessarily performed by bringing the base plate 12 into contact with the lower mold 70, and the base plate 12 may be brought into contact with the lower mold 70 after the sleeves 36, 38, and 40 are mounted.

次いで、ステップ５８までの工程で形成されたインサート物をキャビティ内部に配置するように上金型と下金型とが型締めされ、スリーブ３６、３８、４０は棒状電極端子３０、３２、３４へ圧入される（ステップ６０）。ステップ６０は図９、１０を参照して説明する。   Next, the upper mold and the lower mold are clamped so that the insert formed in the steps up to step 58 is placed inside the cavity, and the sleeves 36, 38, 40 are moved to the rod-shaped electrode terminals 30, 32, 34. Press-fit (step 60). Step 60 will be described with reference to FIGS.

図９は型締め直前のインサート物の総厚を説明する図である。図８を参照して説明したように、ステップ５８を終えた段階でのインサート物の総厚Ｈｂは前述のＨａより大きい。また、Ｈｂは後述するキャビティ内部の縦方向距離ｈよりも大きい。図９に示されるように上金型７４が下金型７０に対して近づき型締めが行われる際には、Ｈｂはｈより大きいのだから上金型の内壁がスリーブ３６、３８、４０に接触する。より詳細には、上金型の内壁がスリーブ３６、３８、４０に下方向の力を及ぼし、下金型の内壁がベース板１２の裏面に上方向の力を及ぼす。このとき、スリーブ３６、３８、４０が棒状電極端子３０、３２、３４の長手方向に圧入される。この圧入が行われるため、型締めの最中にＨｂの値が徐々に小さくなっていき、型締めを終えた段階では、キャビティ内部の縦方向距離ｈとＨｂとが一致する。   FIG. 9 is a view for explaining the total thickness of the insert just before clamping. As described with reference to FIG. 8, the total thickness Hb of the insert at the stage where step 58 is finished is larger than the aforementioned Ha. Further, Hb is larger than a longitudinal distance h inside the cavity described later. As shown in FIG. 9, when the upper mold 74 approaches the lower mold 70 and clamping is performed, Hb is larger than h, so the inner wall of the upper mold contacts the sleeves 36, 38, and 40. To do. More specifically, the inner wall of the upper mold exerts a downward force on the sleeves 36, 38, and 40, and the inner wall of the lower mold exerts an upward force on the back surface of the base plate 12. At this time, the sleeves 36, 38, 40 are press-fitted in the longitudinal direction of the rod-shaped electrode terminals 30, 32, 34. Since this press-fitting is performed, the value of Hb gradually decreases during mold clamping, and the vertical distance h inside the cavity coincides with Hb at the stage where mold clamping is completed.

図１０は、下金型７０と上金型７４とで型締めされた状態を説明する図である。図１０で示されるようスリーブ３６、３８、４０が棒状電極端子３０、３２、３４に圧入された結果、Ｈｂとｈは一致する。また、型締めを完了した時点でもスリーブ３６、３８、４０は上金型７４の内壁への接触を保っている。   FIG. 10 is a diagram illustrating a state in which the lower mold 70 and the upper mold 74 are clamped. As shown in FIG. 10, as a result of the sleeves 36, 38, 40 being press-fitted into the rod-shaped electrode terminals 30, 32, 34, Hb and h coincide. Further, the sleeves 36, 38, and 40 are kept in contact with the inner wall of the upper mold 74 even when the mold clamping is completed.

次いで、上述の接触を維持した状態でキャビティ７６内にゲート８０からモールド樹脂を加圧充填し、モールド樹脂の加熱硬化を行う（ステップ６２）。ステップ６２は図１１を参照して説明する。図１１に示されるとおり、ゲート８０からキャビティ７６内へモールド樹脂４２が加圧充填される。なお、図１１中のエアベント８２はキャビティ７６内が意図しない高圧になることを防止する自動開閉弁であり周知の技術である。   Next, the mold resin is pressurized and filled from the gate 80 into the cavity 76 with the above contact maintained, and the mold resin is heated and cured (step 62). Step 62 will be described with reference to FIG. As shown in FIG. 11, the mold resin 42 is pressurized and filled from the gate 80 into the cavity 76. In addition, the air vent 82 in FIG. 11 is an automatic on-off valve that prevents the inside of the cavity 76 from becoming an unintended high pressure, and is a well-known technique.

次いで、インサート物の樹脂封止が完了した半導体装置を金型から取り出して処理を終える（ステップ６４）。この実施形態の半導体装置の製造方法は上述の各工程を備える。   Next, the semiconductor device in which the resin sealing of the insert is completed is taken out of the mold and the process is finished (step 64). The semiconductor device manufacturing method of this embodiment includes the above-described steps.

この実施形態の半導体装置の製造方法によれば、図６のステップ６０において説明した通り、型締めの際にスリーブ３６、３８、４０がそれぞれ棒状電極端子３０、３２、３４へ圧入される。これによりモールド樹脂注入の際のインサート物の総厚をキャビティ内部の縦方向距離と一致させることができる。従って棒状電極端子を確実にモールド樹脂外部へ露出することができる。また、型締めにおいてもインサート物の総厚がキャビティ内部の縦方向距離より大きくなることによるインサート物へのダメージが発生することもない。   According to the method for manufacturing a semiconductor device of this embodiment, as described in Step 60 of FIG. 6, the sleeves 36, 38, and 40 are press-fitted into the rod-shaped electrode terminals 30, 32, and 34, respectively, at the time of clamping. As a result, the total thickness of the insert at the time of mold resin injection can be matched with the longitudinal distance inside the cavity. Therefore, the rod-shaped electrode terminal can be reliably exposed to the outside of the mold resin. Further, even in mold clamping, the insert is not damaged due to the total thickness of the insert being larger than the longitudinal distance inside the cavity.

さらに、この実施形態のインサート物はスリーブ３６、３８、４０が必要に応じてインサート物総厚とキャビティ内部の縦方向距離が一致するように圧入されるからインサート物の製造工程においてその総厚を厳しく管理する必要はない。よって電極端子直立型の半導体装置を製造する場合であっても、厳密な製造工程管理による製造コストの増加や歩留まり低下の問題を回避してシステムおよび半導体装置の小型化ができる。   Further, since the inserts of this embodiment are press-fitted so that the total thickness of the inserts and the longitudinal distance inside the cavity coincide with each other as necessary, the sleeves 36, 38, 40 are subjected to the total thickness in the manufacturing process of the inserts. There is no need to manage strictly. Therefore, even when an electrode terminal upright type semiconductor device is manufactured, the system and the semiconductor device can be reduced in size by avoiding the problem of an increase in manufacturing cost and a decrease in yield due to strict manufacturing process management.

さらに、この実施形態のスリーブ３６、３８、４０の線膨張係数はモールド樹脂４２の線膨張係数と棒状電極端子３０、３２、３４の線膨張係数の間の値をとる材料で形成されている。よってモールド樹脂４２と棒状電極端子３０、３２、３４との間の線膨張係数の差に起因して温度サイクルで半導体装置内に生じる応力はスリーブ３６、３８、４０により緩和される。   Furthermore, the linear expansion coefficient of the sleeves 36, 38, 40 of this embodiment is formed of a material that takes a value between the linear expansion coefficient of the mold resin 42 and the linear expansion coefficient of the rod-shaped electrode terminals 30, 32, 34. Therefore, the stress generated in the semiconductor device in the temperature cycle due to the difference in coefficient of linear expansion between the mold resin 42 and the rod-shaped electrode terminals 30, 32, 34 is relieved by the sleeves 36, 38, 40.

このようにこの実施形態の半導体装置の製造方法および半導体装置によれば、システムおよび半導体装置の小型化に好適な電極端子直立型の半導体装置を金型とインサート物の厳密な寸法管理なしに容易に製造できる。さらにスリーブによる前述した応力緩和によって、棒状電極端子とモールド樹脂との間に隙間や亀裂が生じにくくなることで、外観上の不良が減少するので歩留まりの向上が図られ、また長期間に渡って良好な信頼性を得ることができる。   As described above, according to the semiconductor device manufacturing method and the semiconductor device of this embodiment, an electrode terminal upright type semiconductor device suitable for downsizing the system and the semiconductor device can be easily obtained without strict size control of the mold and the insert. Can be manufactured. Furthermore, the above-described stress relaxation by the sleeve makes it difficult for gaps and cracks to occur between the rod-shaped electrode terminal and the mold resin, thereby reducing the appearance defects and improving the yield, and over a long period of time. Good reliability can be obtained.

この実施形態でスリーブの形状は筒状であるとしたが本発明はこれに限定されない。すなわちこの実施形態におけるスリーブは図１２（Ａ）に記載されるように締りばめの筒状のスリーブであるが、図１２（Ｂ）、（Ｃ）に示すようにスリーブ内壁に突起を有する構成であってもこの発明の効果を得られる。図１２（Ｂ）に示されるように円周状の突起９２を備えると、棒状電極の他端における気密性が高まりモールド樹脂が棒状電極の他端上面に及ぶことを確実に抑制できる。一方図１２（Ｃ）に示されるように部分的な突起部９４を備えるとスリーブの棒状電極に対する可動性を高めることができる。なお、図１２（Ａ）、（Ｂ）、（Ｃ）ともに上に記載されるのはスリーブの平面図であり、その下には正面図が記載されている。後述する図１３についても同様である。   In this embodiment, the sleeve has a cylindrical shape, but the present invention is not limited to this. That is, the sleeve in this embodiment is a cylindrical sleeve with an interference fit as shown in FIG. 12 (A), but has a projection on the inner wall of the sleeve as shown in FIGS. 12 (B) and 12 (C). Even so, the effects of the present invention can be obtained. When the circumferential protrusion 92 is provided as shown in FIG. 12B, the airtightness at the other end of the rod-shaped electrode is increased, and the mold resin can be reliably suppressed from reaching the upper surface of the other end of the rod-shaped electrode. On the other hand, as shown in FIG. 12 (C), the provision of the partial projections 94 can improve the mobility of the sleeve with respect to the rod-shaped electrode. 12A, 12B, and 12C is a plan view of the sleeve, and a front view is shown below the sleeve. The same applies to FIG. 13 described later.

同様に、スリーブの形状は図１３（Ａ）、（Ｂ）、（Ｃ）に示す形状であってもよい。図１３（Ａ）には巻状スリーブ９６が示されている。巻状スリーブ９６は棒状電極端子の他端に巻きつく構成である。図１３（Ｂ）には絞り状スリーブ９８が示されている。絞り状スリーブ９８はその内壁に絞り構造を有することで棒状電極端子に圧入、装着が可能である。図１３（Ｃ）にはゴム製リング状スリーブ１００が示されている。ゴム製リング状スリーブ１００はゴムの弾性力を利用して棒状電極端子の他端に圧入、装着が可能である。   Similarly, the shape of the sleeve may be the shape shown in FIGS. 13 (A), (B), and (C). FIG. 13A shows a wound sleeve 96. The wound sleeve 96 is configured to wind around the other end of the rod-shaped electrode terminal. FIG. 13B shows a drawing sleeve 98. The throttle sleeve 98 has a throttle structure on its inner wall, so that it can be press-fitted and attached to the rod-shaped electrode terminal. FIG. 13C shows a rubber ring-shaped sleeve 100. The rubber ring-shaped sleeve 100 can be press-fitted and attached to the other end of the rod-shaped electrode terminal using the elastic force of rubber.

この実施形態で説明した棒状電極端子は細長い形状の電極端子である限りにおいて様々な形状が考えられるため、棒状電極端子の語は広義に解釈されるべきものである。例えば、棒状電極端子は図１４に示すように棒状部１０２と板状底部１０４を備える構成であってもよい。この場合、電極端子と回路パターンとの接合は棒状部１０２単体の場合と比較して大面積で行われるため、半導体装置の信頼性の確保に好ましい。   Since the rod-like electrode terminal described in this embodiment can have various shapes as long as it is an elongated electrode terminal, the term “rod-like electrode terminal” should be interpreted broadly. For example, the rod-shaped electrode terminal may be configured to include a rod-shaped portion 102 and a plate-shaped bottom portion 104 as shown in FIG. In this case, since the bonding between the electrode terminal and the circuit pattern is performed in a large area as compared with the case of the rod-shaped portion 102 alone, it is preferable for ensuring the reliability of the semiconductor device.

同様に棒状電極端子は図１５に示される柱状電極端子１０６であってもよい。その場合にはスリーブ１０８の形状を柱状電極端子１０６の形状に対応させれば本発明の効果を得られる。また、図示していないが、棒状電極端子の他端部には穴が設けられていてもよい。この場合、半導体装置の棒状電極端子との電気的接続を実現するシステム側の接続用電極端子に、プレスフィットコネクタが利用できるので、溶接やはんだによる接合が不要となり、組み立て、取り付けが容易に行える。これは、柱状電極端子においても同様であって、柱状電極端子の場合は穴を複数個設けるようにしてもよい。   Similarly, the columnar electrode terminal 106 may be the columnar electrode terminal 106 shown in FIG. In that case, the effect of the present invention can be obtained by making the shape of the sleeve 108 correspond to the shape of the columnar electrode terminal 106. Although not shown, a hole may be provided in the other end of the rod-shaped electrode terminal. In this case, since a press-fit connector can be used for the connection electrode terminal on the system side that realizes electrical connection with the rod-shaped electrode terminal of the semiconductor device, welding and soldering are not required, and assembly and attachment can be performed easily. . The same applies to the columnar electrode terminals. In the case of the columnar electrode terminals, a plurality of holes may be provided.

この実施形態におけるスリーブの材料としては、ＰＢＴの他の樹脂として、射出成形が可能で耐熱性も良好なＰＥＴ（ポリエチレンテレフタレート）やＰＰＳ（ポリフェニレンサルファイド）などが適している。またスリーブは樹脂である必要はなく金属であるＣｕやＡｌなどを使用してもよい。なお、スリーブに金属を用いる場合は、システム側などとの接続において、その接続面積の増加を可能とするので、電気抵抗や熱抵抗を低下させる効果を有する。   As the material of the sleeve in this embodiment, PET (polyethylene terephthalate), PPS (polyphenylene sulfide), etc., which can be injection-molded and have good heat resistance, are suitable as other resins of PBT. Further, the sleeve does not need to be a resin, and a metal such as Cu or Al may be used. In the case of using a metal for the sleeve, the connection area can be increased in connection with the system side or the like, so that the effect of lowering electrical resistance and thermal resistance is obtained.

棒状電極端子の他端からベース板の裏面までの距離Ｈａ（図７参照）を調整すること、例えば棒状電極端子の長さを選択することによって、半導体装置のパッケージ表面から棒状電極端子の他端表面までの距離（＝ｈ−Ｈａ）を任意に変更できるが、スリーブが樹脂による場合は、距離Ｈａを短く（薄く）することで電極端子間の沿面距離を伸ばす効果があり、半導体装置の耐圧をあげることが可能となる。そしてその効果を高めるには、ｈ−Ｈａ≧１ｍｍの条件を満足することが好ましい。   By adjusting the distance Ha (see FIG. 7) from the other end of the rod-shaped electrode terminal to the back surface of the base plate, for example, by selecting the length of the rod-shaped electrode terminal, the other end of the rod-shaped electrode terminal from the package surface of the semiconductor device. The distance to the surface (= h−Ha) can be changed arbitrarily. However, when the sleeve is made of resin, the creepage distance between the electrode terminals can be increased by shortening (thinning) the distance Ha. Can be raised. In order to enhance the effect, it is preferable to satisfy the condition of h-Ha ≧ 1 mm.

また、棒状電極端子を除くインサート物に関しては、半導体素子がベース板上の絶縁基板（回路パターン）に接合される形態のものについて説明したが、本発明はこれに限定されるものではない。例えば、特開２００４−１６５２８１に示されているような、絶縁シート上のヒートスプレッダ（金属板）に半導体素子が接合される形態のものに対して、そのリードフレームを棒状電極端子に置換することで本発明の利用が可能であり、当該構造の半導体装置に関連しても、容易にシステムおよび半導体装置の小型化が実現できる。   Moreover, regarding the inserts other than the rod-like electrode terminals, the semiconductor element is described as being joined to the insulating substrate (circuit pattern) on the base plate, but the present invention is not limited to this. For example, as shown in Japanese Patent Application Laid-Open No. 2004-165281, for a semiconductor element bonded to a heat spreader (metal plate) on an insulating sheet, the lead frame is replaced with a rod-shaped electrode terminal. The present invention can be used, and the size of the system and the semiconductor device can be easily realized even in relation to the semiconductor device having the structure.

この実施形態における接合には鉛フリーはんだを用いているがこの発明はこれに限定されない。一般に鉛フリーはんだは鉛はんだと比較して数十度融点が高いことが知られている。よって、半導体素子へのダメージを考慮する必要がある場合など、鉛はんだを用いる方が好ましい場合には鉛はんだを用いても、前述したスリーブが圧入されることによる効果を得ることができる。   Although lead-free solder is used for joining in this embodiment, the present invention is not limited to this. In general, it is known that lead-free solder has a melting point several tens of degrees higher than lead solder. Therefore, when it is preferable to use lead solder, such as when it is necessary to consider the damage to the semiconductor element, the effect of press-fitting the sleeve can be obtained even if lead solder is used.

実施形態の半導体装置の断面図を説明する図である。It is a figure explaining sectional drawing of the semiconductor device of an embodiment. 図１の破線枠内の拡大図である。It is an enlarged view in the broken-line frame of FIG. 図１の平面図である。It is a top view of FIG. モールド樹脂を省略した図１の平面図である。It is a top view of FIG. 1 which abbreviate | omitted mold resin. 回路記号で表された実施形態の半導体装置である。1 is a semiconductor device of an embodiment represented by a circuit symbol. 実施形態の半導体装置の製造方法を説明するフローチャートである。5 is a flowchart illustrating a method for manufacturing a semiconductor device according to an embodiment. 棒状電極端子の接合などについて説明する図である。It is a figure explaining joining etc. of a rod-shaped electrode terminal. スリーブの棒状電極端子への装着などについて説明する図である。It is a figure explaining attachment etc. to the rod-shaped electrode terminal of a sleeve. スリーブの棒状電極端子への圧入などについて説明する図である。It is a figure explaining the press injection etc. to the rod-shaped electrode terminal of a sleeve. 上金型と下金型による型締めが行われた状態を説明する図である。It is a figure explaining the state by which the mold clamping by the upper mold and the lower mold was performed. キャビティ内へのモールド樹脂の充填などについて説明する図である。It is a figure explaining filling etc. of mold resin in a cavity. スリーブの形状について説明する図である。It is a figure explaining the shape of a sleeve. スリーブの構成の例を説明する図である。It is a figure explaining the example of a structure of a sleeve. 電極端子の一端を板状にした構成を説明する図である。It is a figure explaining the structure which made the end of the electrode terminal into plate shape. 柱状の電極端子とスリーブについて説明する図である。It is a figure explaining a columnar electrode terminal and a sleeve.

符号の説明Explanation of symbols

１０ 半導体装置、 １１ インサート物、 １２ ベース板、 １６ 絶縁基板、 ２０ 回路パターン、 ２３ 鉛フリーはんだ、 ３０ 棒状電極端子、 ３６ スリーブ、 ４２ モールド樹脂 DESCRIPTION OF SYMBOLS 10 Semiconductor device, 11 Insert thing, 12 Base board, 16 Insulation board, 20 Circuit pattern, 23 Lead free solder, 30 Rod-shaped electrode terminal, 36 Sleeve, 42 Mold resin

Claims (11)

棒状電極端子が、絶縁基板表面に形成された回路パターン又は半導体素子上に直立するように、前記棒状電極端子の一端を前記回路パターン又は前記半導体素子上に接合する工程と、
前記棒状電極端子の他端に装着される前記棒状電極端子の長手方向に可動であるスリーブを、前記棒状電極の長手方向の長さより前記棒状電極と前記スリーブからなる構造の長さの方が長くなるように前記棒状電極端子の他端に装着する工程と、
上金型の内壁を前記スリーブに下方向の力を及ぼすように前記スリーブと接触させ、かつ、下金型の内壁からは前記絶縁基板の裏面に上方向の力を及ぼすようにした状態で型締めを行い、前記棒状電極と前記スリーブからなる構造の長さを短くするように前記スリーブの前記棒状電極に対する相対位置を変化させつつ前記スリーブを前記棒状電極端子に圧入する工程と、
前記スリーブを前記棒状電極端子に圧入した後に前記上金型と前記下金型から構成される空洞であるキャビティ内にモールド樹脂を充填する工程とを備え、
前記モールド樹脂を充填する際には前記上金型の内壁と前記スリーブが接触していることを特徴とする半導体装置の製造方法。 Bonding one end of the rod-shaped electrode terminal onto the circuit pattern or the semiconductor element so that the rod-shaped electrode terminal stands upright on the circuit pattern or the semiconductor element formed on the surface of the insulating substrate;
A sleeve that is movable in the longitudinal direction of the rod-shaped electrode terminal attached to the other end of the rod-shaped electrode terminal is longer in the length of the structure composed of the rod-shaped electrode and the sleeve than the length in the longitudinal direction of the rod-shaped electrode. Attaching to the other end of the rod-shaped electrode terminal,
The mold is such that the inner wall of the upper mold is brought into contact with the sleeve so as to exert a downward force on the sleeve, and the upward force is exerted on the back surface of the insulating substrate from the inner wall of the lower mold. Tightening and press-fitting the sleeve into the rod-shaped electrode terminal while changing the relative position of the sleeve to the rod-shaped electrode so as to shorten the length of the structure composed of the rod-shaped electrode and the sleeve ;
Filling the mold resin into a cavity that is a cavity constituted by the upper mold and the lower mold after the sleeve is press-fitted into the rod-shaped electrode terminal,
A method of manufacturing a semiconductor device, wherein an inner wall of the upper mold and the sleeve are in contact with each other when the mold resin is filled. 前記絶縁基板の裏面には金属製のベース板が接合され、
前記圧入する際には、前記下金型の内壁と前記ベース板の前記絶縁基板と接合された面と反対の面とを接触させることを特徴とする請求項１に記載の半導体装置の製造方法。 A metal base plate is bonded to the back surface of the insulating substrate,
2. The method of manufacturing a semiconductor device according to claim 1, wherein, when the press-fitting is performed, an inner wall of the lower mold is brought into contact with a surface opposite to a surface bonded to the insulating substrate of the base plate. . 前記スリーブの線膨張係数は前記モールド樹脂の線膨張係数と前記棒状電極端子の線膨張係数との間の値であることを特徴とする請求項１又は２に記載の半導体装置の製造方法。   3. The method of manufacturing a semiconductor device according to claim 1, wherein a linear expansion coefficient of the sleeve is a value between a linear expansion coefficient of the mold resin and a linear expansion coefficient of the rod-shaped electrode terminal. 前記スリーブはＰＥＴ（ポリエチレンテレフタレート）、ＰＰＳ（ポリフェニレンサルファイド）、ＰＢＴ（ポリブチレンテレフタレート）、Ｃｕ、Ａｌのいずれかからなることを特徴とする請求項２又は３に記載の半導体装置の製造方法。   4. The method of manufacturing a semiconductor device according to claim 2, wherein the sleeve is made of any one of PET (polyethylene terephthalate), PPS (polyphenylene sulfide), PBT (polybutylene terephthalate), Cu, and Al. 前記スリーブは弾性体からなることを特徴とする請求項１又は２に記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein the sleeve is made of an elastic body. 前記スリーブは、締りばめの筒状の形状であることを特徴とする請求項１〜５のいずれか１項に記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 1, wherein the sleeve has a cylindrical shape with an interference fit. 前記スリーブの内壁には絞り形状の突起が形成されたことを特徴とする請求項１〜５のいずれか１項に記載の半導体装置の製造方法。   6. The method for manufacturing a semiconductor device according to claim 1, wherein a drawing-shaped protrusion is formed on an inner wall of the sleeve. 前記スリーブは前記棒状電極端子の他端に巻きつくばねからなることを特徴とする請求項１又は２に記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein the sleeve is formed of a spring wound around the other end of the rod-shaped electrode terminal. 前記棒状電極端子の一端は他の部分より太く形成されることを特徴とする請求項１に記載の半導体装置の製造方法。   2. The method of manufacturing a semiconductor device according to claim 1, wherein one end of the rod-shaped electrode terminal is formed thicker than the other part. 金属製のベース板と、
前記ベース板の表面に接合された絶縁基板と、
前記絶縁基板の前記ベース板に接合された面と反対の面に形成された回路パターンと、
前記回路パターン上に接合された半導体素子と、
前記回路パターン又は、前記半導体素子の前記回路パターンと接合された面と反対の面上に直立するように、前記回路パターン又は前記半導体素子に一端が接合された棒状電極端子と、
前記棒状電極端子の他端に装着したスリーブと、
前記ベース板、前記絶縁基板、前記半導体素子、前記棒状電極端子、前記スリーブを、前記スリーブの前記絶縁基板と対向する面と反対の面および前記ベース板の裏面を露出するようにして覆うモールド樹脂とを備えることを特徴とする半導体装置。 A metal base plate,
An insulating substrate bonded to the surface of the base plate;
A circuit pattern formed on a surface opposite to the surface bonded to the base plate of the insulating substrate;
A semiconductor element bonded on the circuit pattern;
A rod-shaped electrode terminal having one end bonded to the circuit pattern or the semiconductor element so as to stand upright on the surface opposite to the surface bonded to the circuit pattern or the circuit pattern of the semiconductor element;
A sleeve attached to the other end of the rod-shaped electrode terminal;
Mold resin that covers the base plate, the insulating substrate, the semiconductor element, the rod electrode terminal, and the sleeve so that the surface of the sleeve opposite to the surface facing the insulating substrate and the back surface of the base plate are exposed. A semiconductor device comprising: 前記スリーブの線膨張係数は前記モールド樹脂の線膨張係数と前記棒状電極端子の線膨張係数との間の値であることを特徴とする請求項１０に記載の半導体装置。   The semiconductor device according to claim 10, wherein a linear expansion coefficient of the sleeve is a value between a linear expansion coefficient of the mold resin and a linear expansion coefficient of the rod-shaped electrode terminal.
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