JP4995495B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4995495B2 JP4995495B2 JP2006166879A JP2006166879A JP4995495B2 JP 4995495 B2 JP4995495 B2 JP 4995495B2 JP 2006166879 A JP2006166879 A JP 2006166879A JP 2006166879 A JP2006166879 A JP 2006166879A JP 4995495 B2 JP4995495 B2 JP 4995495B2
- Authority
- JP
- Japan
- Prior art keywords
- probing
- chip
- capacitance
- probe
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
- G01R31/2887—Features relating to contacting the IC under test, e.g. probe heads; chucks involving moving the probe head or the IC under test; docking stations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
- H01L2223/5446—Located in scribe lines
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
- H01L2223/5448—Located on chip prior to dicing and remaining on chip after dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
201 パッド領域
301 スクライブ領域
401 プロービングずれ検知用パタン
501 内側の導電体
502 外側の導電体
601 容量検出用ドットパタン
602 容量検出用ドットパタン
603 容量検出用ドットパタン
604 容量検出用ドットパタン
605 容量検出用ドットパタン
610 下地の絶縁膜
701 保護膜
801 プローブ針
Claims (4)
- 半導体基板と、
前記半導体基板の表面に配置された、トランジスタおよび複数のプローブ針によるプローブがなされるパッド領域を有するICチップと、
前記ICチップに隣接するスクライブ領域と、
前記スクライブ領域に配置された、複数の微小な導電体およびこれらの導電体の周囲を覆う保護膜からなるプロービングずれ検知用パタンと、
を有し、
各々の前記複数の微小な導電体は前記保護膜により電気的に絶縁されており、前記複数のプローブ針の針先の底面よりも小さく、
各々の前記複数の微小な導電体と前記プロービングずれ検知用パタンに針あてされた前記複数のプローブ針のうちのひとつとの間に形成される複数の容量により、前記プローブ針の位置ずれとオーバードライブ量とを検知できる半導体装置。 - 前記プロービングずれ検知用パタンは、前記ICチップ毎に2個1対の形で設けられていることを特徴とする請求項1記載の半導体装置。
- 前記プロービングずれ検知用パタンは、プロービング工程において同時に測定される前記ICチップ数毎に2個1対の形で設けられていることを特徴とする請求項1記載の半導体装置。
- 半導体基板と、
前記半導体基板の表面に配置された、トランジスタおよび複数のプローブ針によるプローブがなされるパッド領域を有するICチップと、
前記ICチップ内に配置された、複数の微小な導電体およびこれらの導電体の周囲を覆う保護膜からなるプロービングずれ検知用パタンと、
を有し、
各々の前記複数の微小な導電体は前記保護膜により電気的に絶縁されており、前記複数のプローブ針の針先の底面よりも小さく、
各々の前記複数の微小な導電体と前記プロービングずれ検知用パタンに針あてされた前記複数のプローブ針のうちのひとつとの間に形成される複数の容量により、前記プローブ針の位置ずれとオーバードライブ量とを検知できる半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006166879A JP4995495B2 (ja) | 2006-06-16 | 2006-06-16 | 半導体装置 |
US11/818,123 US7535240B2 (en) | 2006-06-16 | 2007-06-13 | Semiconductor device |
CN2007101388404A CN101090114B (zh) | 2006-06-16 | 2007-06-15 | 半导体装置 |
US12/354,423 US7804313B2 (en) | 2006-06-16 | 2009-01-15 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006166879A JP4995495B2 (ja) | 2006-06-16 | 2006-06-16 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007335693A JP2007335693A (ja) | 2007-12-27 |
JP4995495B2 true JP4995495B2 (ja) | 2012-08-08 |
Family
ID=38875665
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006166879A Expired - Fee Related JP4995495B2 (ja) | 2006-06-16 | 2006-06-16 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7535240B2 (ja) |
JP (1) | JP4995495B2 (ja) |
CN (1) | CN101090114B (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20150084659A1 (en) * | 2013-09-20 | 2015-03-26 | Infineon Technologies Ag | Contact arrangements and methods for detecting incorrect mechanical contacting of contact structures |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0645419A (ja) | 1992-07-21 | 1994-02-18 | Hitachi Ltd | 半導体装置 |
JPH09107011A (ja) * | 1995-10-11 | 1997-04-22 | Sharp Corp | 半導体装置、およびこの半導体装置の位置合わせ方法 |
JP3157715B2 (ja) * | 1996-05-30 | 2001-04-16 | 山形日本電気株式会社 | 半導体集積回路 |
JP2001189353A (ja) * | 2000-01-04 | 2001-07-10 | Toshiba Corp | プローブ検査装置及びプローブ検査方法 |
JP3990124B2 (ja) * | 2001-08-29 | 2007-10-10 | 松下電器産業株式会社 | 半導体ウェーハ検査用プローブの検査装置及び検査方法。 |
JP3793945B2 (ja) * | 2002-05-30 | 2006-07-05 | 松下電器産業株式会社 | 電圧プローブ、これを用いた半導体装置の検査方法、およびモニタ機能付き半導体装置 |
KR100555504B1 (ko) * | 2003-06-27 | 2006-03-03 | 삼성전자주식회사 | 결함 크기를 검출할 수 있는 반도체 소자의 테스트 구조및 이를 이용한 테스트 방법 |
JP2006003135A (ja) * | 2004-06-16 | 2006-01-05 | Hitachi Ltd | 半導体集積回路の不良診断方法 |
JP4570446B2 (ja) * | 2004-11-16 | 2010-10-27 | パナソニック株式会社 | 半導体ウェハーおよびその検査方法 |
JP2007200934A (ja) * | 2006-01-23 | 2007-08-09 | Fujitsu Ltd | プローブカードのプローブ針の針跡評価方法 |
-
2006
- 2006-06-16 JP JP2006166879A patent/JP4995495B2/ja not_active Expired - Fee Related
-
2007
- 2007-06-13 US US11/818,123 patent/US7535240B2/en not_active Expired - Fee Related
- 2007-06-15 CN CN2007101388404A patent/CN101090114B/zh not_active Expired - Fee Related
-
2009
- 2009-01-15 US US12/354,423 patent/US7804313B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US7535240B2 (en) | 2009-05-19 |
US20080001146A1 (en) | 2008-01-03 |
CN101090114A (zh) | 2007-12-19 |
US7804313B2 (en) | 2010-09-28 |
JP2007335693A (ja) | 2007-12-27 |
CN101090114B (zh) | 2010-12-29 |
US20090121223A1 (en) | 2009-05-14 |
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