JP4982899B2 - Microelectrode and manufacturing method thereof - Google Patents

Microelectrode and manufacturing method thereof Download PDF

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JP4982899B2
JP4982899B2 JP2007555886A JP2007555886A JP4982899B2 JP 4982899 B2 JP4982899 B2 JP 4982899B2 JP 2007555886 A JP2007555886 A JP 2007555886A JP 2007555886 A JP2007555886 A JP 2007555886A JP 4982899 B2 JP4982899 B2 JP 4982899B2
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electrode
fine pattern
microelectrode
resist
exposed portion
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貴行 若山
伸行 中桐
平道 佐藤
広幸 秋永
徹 中村
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National Institute of Advanced Industrial Science and Technology AIST
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N27/00Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
    • G01N27/26Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
    • G01N27/28Electrolytic cell components
    • G01N27/30Electrodes, e.g. test electrodes; Half-cells

Description

本発明は、電子材料、光学材料、センサー、メモリー、マイクロ流路、電気製品及び測定機器等に用いられる微小電極およびその製造方法に関するものである。   The present invention relates to a microelectrode used for an electronic material, an optical material, a sensor, a memory, a microchannel, an electric product, a measuring instrument, and the like, and a manufacturing method thereof.

従来、微小電極については、金属線など単体で形状を維持できる電極材料を電気絶縁性樹脂層により被覆し、該被覆層の周囲に金属層または金属帯を形成し、次いでその先端部において上記金属線または金属層を露出させて製造する方法(特許文献1参照)などが提案されている。
この方法では、電極間隔をある程度、例えば50μm程度に小さくすることはできるものの、電極の露出面を極めて微小、例えば1μm以下に小さくするのは困難であった。
Conventionally, for a microelectrode, an electrode material such as a metal wire that can maintain its shape alone is covered with an electrically insulating resin layer, a metal layer or a metal band is formed around the coating layer, and then the above-mentioned metal is formed at the tip portion thereof. A method of manufacturing a wire or a metal layer exposed (see Patent Document 1) has been proposed.
In this method, the electrode interval can be reduced to some extent, for example, about 50 μm, but it is difficult to reduce the exposed surface of the electrode to be extremely small, for example, 1 μm 2 or less.

特開平5−126782号公報Japanese Patent Laid-Open No. 5-126782

本発明の課題は、このような事情の下、極めて微小な露出面をもつ微小電極及びそれを
簡便に製造しうる方法を提供することにある。
Under such circumstances, an object of the present invention is to provide a microelectrode having an extremely small exposed surface and a method for easily manufacturing the microelectrode.

本発明は、上記の課題を解決するために、以下の手段が提供される。
(1)支持基板、該支持基板上に配設された微細パターン電極及び該微細パターン電極の先端露出部以外を被覆する絶縁性被覆物からなり、かつ前記微細パターン電極の先端露出部は該微細パターン電極の断面の微小面積で側面において形成されてなることを特徴とする微小電極である。
(2)前記微細パターン電極の先端露出部が支持基板及び絶縁性被覆物の端面と面一に形成されてなることを特徴とする前記(1)に記載の微小電極である。
(3)前記微細パターン電極の断面の微小面積を形成する幅及び厚みがそれぞれ10μm以下であることを特徴とする前記(1)又は(2)に記載の微小電極である。
(4)前記微細パターン電極の断面に有機分子が吸着されていることを特徴とする前記(1)ないし前記(3)のいずれかに記載の微小電極である。
(5)前記有機分子がチオール分子であることを特徴とする前記(4)に記載の微小電極である。
(6)前記微細パターン電極が貴金属、Cr、Ti、Cu、Fe、Co、Ni、V、Nb、Zn、Ge、Cd、Sn、Ta、W、Hg、Pb、これらの合金及びカーボンの中から選ばれた少なくとも1種の導電材からなることを特徴とする前記(1)ないし前記(5)のいずれかに記載の微小電極である。
(7)前記微細パターン電極がAu又はPtとCr又はTiとからなることを特徴とする前記(1)ないし前記(5)のいずれかに記載の微小電極である。
(8)前記支持基板が、少なくとも1種の絶縁性材からなる絶縁性基板、或いは導体又は半導体層上に絶縁性層が形成されてなる表面絶縁性基板であることを特徴とする前記(1)ないし前記(7)のいずれかに記載の微小電極である。
(9)前記支持基板が、酸化ケイ素被膜をもつシリコン板、ガラス板、プラスチック板、石英板及び酸化アルミニウム板の中から選ばれた少なくとも1種であることを特徴とする前記(1)ないし前記(7)のいずかに記載の微小電極である。
(10)前記絶縁性被覆物が、エポキシ樹脂、弗素樹脂、ポリエステル樹脂、ポリフェニレンオキシド樹脂、ポリフェニレンスルフィド樹脂、ウレタン樹脂、ポリイミド樹脂、シリコーン樹脂、塩化ビニル樹脂、フェノール樹脂、ケイ酸エチル及び酸化ケイ素の中から選ばれた少なくとも1種の絶縁材からなることを特徴とする前記(1)ないし前記(9)のいずかに記載の微小電極である。
(11)前記シリコーン樹脂がポリジメチルシロキサンであることを特徴とする前記(10)に記載の微小電極である。
(12)(A)支持基板上にレジスト膜を被着させ、レジスト膜に微細パターン電極に対応するレジストパターンを形成する工程と、(B)このレジストパターンの上から導電材を付着する工程と、(C)レジストとともにレジスト上の堆積導電材を除去するリフトオフ工程と、(D)得られた微細パターン電極を絶縁性材料で被覆する工程と、(E)側面において微細パターン電極の断面を露出させて微小面積の電極先端露出部を形成する工程を含むことを特徴とする微小電極の製造方法である。
(13)前記(E)工程において、前記電極先端露出部を前記支持基板及び前記絶縁性被覆物の端面と面一に形成することを特徴とする前記(12)に記載の微小電極の製造方法。
(14)前記(E)工程を、裂断、切断、イオンビーム加工、エッチング又は研磨により行うことを特徴とする前記(12)又は前記(13)に記載の微小電極の製造方法である。
In order to solve the above problems, the present invention provides the following means.
(1) A support substrate, a fine pattern electrode disposed on the support substrate, and an insulating coating covering other than the tip exposed portion of the fine pattern electrode, and the tip exposed portion of the fine pattern electrode is the fine pattern electrode. It is a microelectrode characterized in that it is formed on the side surface with a microarea of the cross section of the pattern electrode.
(2) The microelectrode according to (1), wherein a tip exposed portion of the micropattern electrode is formed flush with a support substrate and an end surface of the insulating coating.
(3) The microelectrode according to (1) or (2), wherein a width and a thickness for forming a microarea of a cross section of the micropatterned electrode are each 10 μm or less.
(4) The microelectrode according to any one of (1) to (3), wherein an organic molecule is adsorbed on a cross section of the fine pattern electrode.
(5) The microelectrode according to (4), wherein the organic molecule is a thiol molecule.
(6) The fine pattern electrode is selected from precious metals, Cr, Ti, Cu, Fe, Co, Ni, V, Nb, Zn, Ge, Cd, Sn, Ta, W, Hg, Pb, alloys thereof, and carbon. The microelectrode according to any one of (1) to (5) above, comprising at least one selected conductive material.
(7) The microelectrode according to any one of (1) to (5), wherein the fine pattern electrode is made of Au or Pt and Cr or Ti.
(8) The support substrate is an insulating substrate made of at least one insulating material, or a surface insulating substrate in which an insulating layer is formed on a conductor or semiconductor layer. The microelectrode according to any one of (7) to (7).
(9) The support substrate is at least one selected from a silicon plate having a silicon oxide film, a glass plate, a plastic plate, a quartz plate, and an aluminum oxide plate. The microelectrode according to any one of (7).
(10) The insulating coating is made of epoxy resin, fluorine resin, polyester resin, polyphenylene oxide resin, polyphenylene sulfide resin, urethane resin, polyimide resin, silicone resin, vinyl chloride resin, phenol resin, ethyl silicate and silicon oxide. The microelectrode according to any one of (1) to (9) above, comprising at least one insulating material selected from the inside.
(11) The microelectrode according to (10), wherein the silicone resin is polydimethylsiloxane.
(12) (A) a step of depositing a resist film on the support substrate and forming a resist pattern corresponding to the fine pattern electrode on the resist film; and (B) a step of attaching a conductive material from the resist pattern. (C) a lift-off process for removing the conductive material deposited on the resist together with the resist; (D) a process for coating the obtained fine pattern electrode with an insulating material; and (E) exposing a cross section of the fine pattern electrode on the side surface. A method of manufacturing a microelectrode, comprising the step of forming an exposed portion of the electrode tip having a small area.
(13) The microelectrode manufacturing method according to (12), wherein, in the step (E), the electrode tip exposed portion is formed flush with end surfaces of the support substrate and the insulating coating. .
(14) The method for producing a microelectrode according to (12) or (13), wherein the step (E) is performed by tearing, cutting, ion beam processing, etching, or polishing.

本発明の微小電極は、その露出面が極めて微小であるので、計測用電極、特に電極アレイ形態をなすものとして有利に利用される。
また、本発明方法によれば、微小な露出面をもつ先端露出部を容易に形成させることができ、微小電極を簡便に製造しうる。
Since the exposed surface of the microelectrode of the present invention is extremely small, it is advantageously used as an electrode for measurement, particularly in the form of an electrode array.
Moreover, according to the method of the present invention, the tip exposed portion having a minute exposed surface can be easily formed, and a minute electrode can be easily manufactured.

本発明の微小電極の一例(実施例1の電極露出面が一側面のみの微小電極アレイ)の模式図であるIt is a schematic diagram of an example of the microelectrode of the present invention (a microelectrode array in which the electrode exposure surface of Example 1 has only one side surface). 本発明の微小電極の別の一例(実施例1の電極露出面が三側面の微小電極アレイ)の模式図である。It is a schematic diagram of another example of the microelectrode of the present invention (a microelectrode array having three exposed electrode surfaces in Example 1). 電極露出部の電子顕微鏡観察像を示す図である。It is a figure which shows the electron microscope observation image of an electrode exposure part. 各金属電極に対する検出限界を示すグラフである。It is a graph which shows the detection limit with respect to each metal electrode.

符号の説明Explanation of symbols

1,1′,1″ 電極露出部
2 絶縁性被覆物
3a 酸化ケイ素膜付きシリコン板における下地シリコン板
3b 酸化ケイ素膜付きシリコン板における酸化ケイ素膜
4,4′,4″ リード線
1, 1 ', 1 "electrode exposed portion 2 insulating coating 3a base silicon plate in silicon plate with silicon oxide film 3b silicon oxide film in silicon plate with silicon oxide film 4, 4', 4" lead wire

本発明者らは、前記した好ましい特徴を有する微小電極を開発すべく鋭意検討を重ねた結果、支持基板上に被着させたレジスト膜に所定レジストパターンを形成させ、該レジストパターン上から導電材を付着させ、レジストとともにレジスト上の堆積導電材を除去するいわゆるリフトオフ処理を施し、得られた微細パターン電極を絶縁性材料で被覆し、該電極の断面を露出させて微小面積の電極先端露出部を形成させるのが課題解決に資することを見出し、この知見に基づいて本発明をなすに至った。   As a result of intensive studies to develop a microelectrode having the above-mentioned preferable characteristics, the present inventors have formed a predetermined resist pattern on a resist film deposited on a support substrate, and a conductive material is formed on the resist pattern. A so-called lift-off process is performed to remove the deposited conductive material on the resist together with the resist, and the obtained fine pattern electrode is covered with an insulating material, and a cross section of the electrode is exposed to expose an electrode tip exposed portion with a small area It has been found that the formation of the film contributes to solving the problem, and the present invention has been made based on this finding.

本発明の微小電極における微細パターン電極は、微細な電極パターン形状を有する電極本体であって、その数は1個でも、2個以上の複数個でもよい。
この微細パターン電極は、貴金属、Cr、Ti、Cu、Fe、Co、Ni、V、Nb、Zn、Ge、Cd、Sn、Ta、W、Hg、Pb、これらの合金及びカーボンの中から選ばれた少なくとも1種の導電材、中でも貴金属、Cr、これらの合金及びこれらの組合せ、特にAu又はPtとCr又はTiとの組合せからなるものが好ましい。
この電極本体の形態としては、幅が10μm以下、好ましくはサブミクロンオーダー以下、中でもナノメーターレベル、例えば50〜200nm等で、厚さが10μm以下、好ましくはサブミクロンオーダー以下、中でもナノメーターレベル、例えば50〜200nm等で、長さが200μm以上、好ましくは500μm以上、例えば500μm〜5mm等の細線が一般的であり、また、該細線は1本であってもよいし、2本以上の複数本であってもよい。
The fine pattern electrode in the fine electrode of the present invention is an electrode main body having a fine electrode pattern shape, and the number thereof may be one or two or more.
The fine pattern electrode is selected from precious metals, Cr, Ti, Cu, Fe, Co, Ni, V, Nb, Zn, Ge, Cd, Sn, Ta, W, Hg, Pb, alloys thereof and carbon. Further, at least one kind of conductive material, among them, noble metals, Cr, alloys thereof and combinations thereof, particularly those made of Au or Pt and Cr or Ti are preferable.
As the form of the electrode body, the width is 10 μm or less, preferably submicron order or less, especially nanometer level, for example, 50 to 200 nm, and the thickness is 10 μm or less, preferably submicron order or less, especially nanometer level, For example, a thin line having a length of 50 to 200 nm or the like and a length of 200 μm or more, preferably 500 μm or more, for example, 500 μm to 5 mm, is common, and the thin line may be one or two or more It may be a book.

本発明の微小電極における支持基板は、微細パターン電極を支持し、該基板上に微細パターン電極を絶縁状態で配設しうるものであれば特に制限されないが、少なくとも1種の絶縁性材からなる絶縁性基板、或いは導体又は半導体層上に絶縁性層が形成されてなる表面絶縁性基板であるのが好ましく、さらには水、水溶液、溶剤等の液体或いは気体が浸透しない材質のもの、例えば酸化ケイ素被膜をもつシリコン板、ガラス板、プラスチック板、石英板及び酸化アルミニウム板等が好ましい。   The support substrate in the microelectrode of the present invention is not particularly limited as long as it can support the fine pattern electrode and the fine pattern electrode can be disposed in an insulated state on the substrate, but is made of at least one insulating material. It is preferably an insulating substrate or a surface insulating substrate in which an insulating layer is formed on a conductor or semiconductor layer, and further, a material that does not penetrate liquid or gas such as water, aqueous solution, solvent, etc. A silicon plate, a glass plate, a plastic plate, a quartz plate, an aluminum oxide plate and the like having a silicon coating are preferable.

本発明の微小電極における絶縁性被覆物は、微細パターン電極の先端露出部以外を絶縁状態で被覆するものであれば特に制限されないが、水、水溶液、溶剤等の液体或いは気体が浸透しない絶縁性材料からなるものが好ましく、このような絶縁性材料としては、例えばエポキシ樹脂、弗素樹脂、ポリエステル樹脂、ポリフェニレンオキシド樹脂、ポリフェニレンスルフィド樹脂、ウレタン樹脂、ポリイミド樹脂、シリコーン樹脂、塩化ビニル樹脂、フェノール樹脂、ケイ酸エチル及び酸化ケイ素(代表的には二酸化ケイ素)等が挙げられ、中でもポリイミド樹脂、弗素樹脂、エポキシ樹脂、ケイ酸エチル及び二酸化ケイ素等が好ましい。
絶縁性被覆物は、一般に熱酸化法、スパッタリング法、CVD法、回転塗布法等により形成される。
The insulating coating in the microelectrode of the present invention is not particularly limited as long as it covers the exposed portion other than the exposed portion of the micropatterned electrode, but it does not penetrate liquid or gas such as water, aqueous solution, solvent, etc. Materials made of materials are preferable. Examples of such insulating materials include epoxy resins, fluorine resins, polyester resins, polyphenylene oxide resins, polyphenylene sulfide resins, urethane resins, polyimide resins, silicone resins, vinyl chloride resins, phenol resins, Examples thereof include ethyl silicate and silicon oxide (typically silicon dioxide), among which polyimide resin, fluorine resin, epoxy resin, ethyl silicate and silicon dioxide are preferable.
The insulating coating is generally formed by a thermal oxidation method, a sputtering method, a CVD method, a spin coating method, or the like.

本発明の微小電極の先端露出部は該電極の断面の微小面積で側面において形成されてなるものである。この露出部は、支持基板及び絶縁性被覆物の端面と面一に、換言すれば同一平面を成すように形成するのが好ましいが、これに限らず、露出面が凹凸のあるものや曲面や平面と曲面の混在するものであってもよい。
露出部の形成には、裂断、切断、イオンビーム加工、エッチング又は研磨等による手法、例えば支持基板が酸化ケイ素被膜をもつシリコン板である場合、下地シリコン板の劈開に伴う裂断による手法などが用いられる。
The exposed portion of the tip of the microelectrode of the present invention is formed on the side surface with a small area of the cross section of the electrode. The exposed portion is preferably formed so as to be flush with the end surfaces of the support substrate and the insulating coating, in other words, the same plane. However, the present invention is not limited to this, and the exposed surface is uneven or curved. A plane and a curved surface may be mixed.
For the formation of the exposed portion, a technique such as tearing, cutting, ion beam processing, etching or polishing, for example, a technique using tearing accompanying cleavage of the base silicon plate when the support substrate is a silicon plate having a silicon oxide film, etc. Is used.

本発明の微小電極を製造するには、以下の(A)ないし(E)の各工程を含んでなる方法によるのがよい。
(A)支持基板上にレジスト膜を被着させ、レジスト膜に微細パターン電極に対応するレジストパターンを形成する工程
(B)このレジストパターン上から導電材を付着する工程
(C)レジストとともにレジスト上の堆積導電材を除去するリフトオフ工程
(D)得られた微細パターン電極を絶縁性材料で被覆する工程
(E)側面において微細パターン電極の断面を露出させて微小面積の電極先端露出部を形成させる工程
In order to manufacture the microelectrode of the present invention, it is preferable to use a method including the following steps (A) to (E).
(A) A step of depositing a resist film on the support substrate and forming a resist pattern corresponding to the fine pattern electrode on the resist film (B) A step of attaching a conductive material from this resist pattern (C) A step of applying the resist together with the resist (D) The step of covering the obtained fine pattern electrode with an insulating material (E) The side surface of the fine pattern electrode is exposed on the side surface to form an electrode tip exposed portion with a small area. Process

前記(A)工程において用いられるレジストは、露光可能であるかあるいは電子線で描画しうるものが好ましい。   The resist used in the step (A) is preferably one that can be exposed or drawn with an electron beam.

前記(B)工程の導電材の付着には、スパッタリング法、真空蒸着法、CVD法、めっき法などが用いられる。この付着処理前に酸素プラズマ処理や薬液洗浄などを行ってレジストの残渣を取り除く前処理を行うことが望ましい。これらの前処理を行うことで導電材と支持基板の密着性が向上する。   For the attachment of the conductive material in the step (B), sputtering, vacuum deposition, CVD, plating, or the like is used. It is desirable to perform a pretreatment for removing the resist residue by performing an oxygen plasma treatment or chemical cleaning before the adhesion treatment. By performing these pretreatments, the adhesion between the conductive material and the support substrate is improved.

前記(C)工程は、レジストを適当な溶媒に溶解させたり、溶融したりすることによるのが好ましい。
(C)工程後(D)工程前には、レジスト残渣を除去し、電極周囲を被覆する絶縁性膜の密着性を向上させるために、紫外線処理、オゾン処理、酸素プラズマ処理、薬液洗浄を行うことが好ましい。
The step (C) is preferably performed by dissolving or melting the resist in an appropriate solvent.
After the (C) step and before the (D) step, in order to remove the resist residue and improve the adhesion of the insulating film covering the periphery of the electrode, ultraviolet treatment, ozone treatment, oxygen plasma treatment, and chemical cleaning are performed. It is preferable.

前記(D)の被覆工程は、一般に熱酸化法、スパッタリング法、CVD法、回転塗布法等によればよい。   In general, the coating step (D) may be performed by a thermal oxidation method, a sputtering method, a CVD method, a spin coating method, or the like.

前記(E)工程においては、電極先端露出部を支持基板及び絶縁性被覆物の端面と面一に形成させるのが好ましいが、この露出部は、これに限らず、露出面が凹凸のあるものや曲面や平面と曲面の混在するものとしてもよい。
露出部の形成には、裂断、切断、イオンビーム加工、エッチング又は研磨等による手法、例えば支持基板が酸化ケイ素被膜をもつシリコン板である場合、下地シリコン板の劈開に伴う裂断による手法などが用いられる。
In the step (E), it is preferable to form the electrode tip exposed portion flush with the end surfaces of the support substrate and the insulating coating. However, the exposed portion is not limited to this, and the exposed surface is uneven. Or a curved surface or a mixture of a flat surface and a curved surface may be used.
For the formation of the exposed portion, a technique such as tearing, cutting, ion beam processing, etching or polishing, for example, a technique using tearing accompanying cleavage of the base silicon plate when the support substrate is a silicon plate having a silicon oxide film, etc. Is used.

4000nmの厚さの酸化ケイ素膜付きシリコン板上にレジストを成膜させ、レジストへの所望の電極パターンに対応するパターン形成として、電極パッド相応部と、それに続く、幅100nm、長さ3mmの微小細線部とを表1に示す条件で電子ビーム描画法によりレジストに描画し、現像することによりレジストパターンを形成させ、レジストにより被覆されていない酸化ケイ素膜表面に表2に示す条件で蒸着法によりクロムを堆積させ、次いで金を堆積させたのち、レジストを溶解してレジストともどもレジスト上に堆積された余分な金属を除去することによって、幅が100nm、厚さが100nm、長さが3mmである金属細線と電極パッドからなる微細パターン電極を形成させた。電極パッドを除く微細パターン電極の周囲に表3に示す条件でスパッタ法により酸化ケイ素膜を300nmの厚さで成膜し、微細パターン電極を、絶縁化と液体あるいは気体(例えば計測用電極とした場合における被測定物)の浸透防止等のために被覆した。次いで、金属細線の幅方向に該シリコン板、微細パターン電極、絶縁性被覆物を切断して電極の断面を露出させ、各電極の露出面積が1×10−14である微小電極アレイを得た。最後に露出した電極パッド部にリード線を設けた。A resist is formed on a silicon plate with a silicon oxide film having a thickness of 4000 nm, and a pattern corresponding to a desired electrode pattern on the resist is formed as a corresponding part of the electrode pad, followed by a minute part having a width of 100 nm and a length of 3 mm. A thin line portion is drawn on a resist by an electron beam drawing method under the conditions shown in Table 1, and a resist pattern is formed by development, and the surface of the silicon oxide film not covered with the resist is formed by a vapor deposition method under the conditions shown in Table 2. After depositing chromium and then gold, the resist is dissolved to remove the excess metal deposited on the resist and the resist is 100 nm wide, 100 nm thick and 3 mm long A fine pattern electrode composed of a fine metal wire and an electrode pad was formed. A silicon oxide film having a thickness of 300 nm was formed around the fine pattern electrode excluding the electrode pad by sputtering under the conditions shown in Table 3, and the fine pattern electrode was insulated and used as a liquid or gas (for example, a measurement electrode). In order to prevent penetration of the object to be measured). Next, the silicon plate, the fine pattern electrode, and the insulating coating are cut in the width direction of the fine metal wire to expose the cross section of the electrode, and a microelectrode array in which the exposed area of each electrode is 1 × 10 −14 m 2 is obtained. Obtained. Finally, lead wires were provided on the exposed electrode pads.

Figure 0004982899
Figure 0004982899

Figure 0004982899
Figure 0004982899

Figure 0004982899
Figure 0004982899

この微小電極アレイの模式図を、電極露出面が一側面のみの場合については図1に、電極露出面が三側面の場合については図2にそれぞれ示す。これらの図において、1、1′、1″は電極露出部、2は絶縁性被覆物、3aは酸化ケイ素膜付きシリコン板における下地シリコン板、3bは該シリコン板における酸化ケイ素膜、4、4′、4″はリード線をそれぞれ示す。参考資料として電極露出部の電子顕微鏡観察像を図3に示す。この図において1は電極露出部、2はスパッタ堆積した酸化ケイ素、3は酸化ケイ素付きシリコン基板の酸化ケイ素を示す。   A schematic diagram of this microelectrode array is shown in FIG. 1 when the electrode exposure surface is only one side surface, and in FIG. 2 when the electrode exposure surface is three side surfaces. In these figures, 1, 1 ', 1 "are electrode exposed portions, 2 is an insulating coating, 3a is a base silicon plate in a silicon plate with a silicon oxide film, 3b is a silicon oxide film on the silicon plate, 4, 4 ′ And 4 ″ indicate lead wires, respectively. As a reference material, an electron microscope observation image of the electrode exposed portion is shown in FIG. In this figure, 1 is an electrode exposed portion, 2 is silicon oxide sputter-deposited, and 3 is silicon oxide of a silicon substrate with silicon oxide.

はじめに、以下に示すように4種類の各面積を有する金電極a、b、c、dを準備した。金電極aは、一辺1cmの正方形の金電極で、2.3×10−6〜3.9×10−5Paの真空中、一辺1cmのマイカ上にadlayerとしてはじめに厚み約2nmのCrを蒸着し、次いで金を厚み約200〜300nm蒸着したしたものである。金電極bは、直径0.1mmの金ワイヤーをカットし、その断面を水素フレームによりアニールしたものである。金電極cは、本発明に係わり、シリコン基板上に幅10μmのマスクを用いて始に厚み約2nmのCrを蒸着し、次いで金を厚み約200nm蒸着した金細線を、最後にポリジメチルシロキサンで被覆してその基板をカットしたシリコン基板上の金細線の断面からなるものである。金電極dは、本発明に係り、シリコン基板上に幅100nmのマスクを用いてはじめに厚み約2nmのCrを蒸着し、次いで金を厚み約100nm蒸着した金細線を、最後に酸化ケイ素膜で被覆してその基板をカットしたシリコン基板上の金細線の断面からなるものである。First, as shown below, gold electrodes a, b, c, and d having four types of areas were prepared. The gold electrode a is a square gold electrode with a side of 1 cm. In a vacuum of 2.3 × 10 −6 to 3.9 × 10 −5 Pa, Cr having a thickness of about 2 nm is first deposited on an mica with a side of 1 cm as an adlayer. Then, gold is deposited to a thickness of about 200 to 300 nm. The gold electrode b is obtained by cutting a gold wire having a diameter of 0.1 mm and annealing the cross section with a hydrogen frame. The gold electrode c is related to the present invention. First, a thin gold wire having a thickness of about 2 nm was first deposited on a silicon substrate using a mask having a width of 10 μm, and then gold was deposited to a thickness of about 200 nm. It consists of a cross section of a fine gold wire on a silicon substrate that has been coated and cut. The gold electrode d is related to the present invention. First, Cr having a thickness of about 2 nm is vapor-deposited on a silicon substrate using a mask having a width of 100 nm, and then a gold fine wire having a thickness of about 100 nm is coated with a silicon oxide film. The cross section of the fine gold wire on the silicon substrate cut from the substrate.

次に、上記の各金電極a、b、c、dのそれぞれについて電極面に分子膜を調製した。電極面に分子吸着させる方法としては、ジオキサン中溶解した濃度1mMのビピリジンチオール誘導体の溶液に、各電極を10〜30分間浸し、次いでジオキサンでリンスした。また分子吸着の別の方法としては、縦横0.5〜1cm×厚み約1mmのポリジメチルシロキサンの板に先述の分子溶液をキャストし、各電極を押し付けて分子膜の転写を行う方法がある。分子の金−硫黄結合による表面固定は、光電子分光法により確認している。   Next, a molecular film was prepared on the electrode surface for each of the gold electrodes a, b, c, and d. As a method for adsorbing molecules on the electrode surface, each electrode was immersed in a solution of a 1 mM bipyridinethiol derivative dissolved in dioxane for 10 to 30 minutes, and then rinsed with dioxane. As another method of molecular adsorption, there is a method of transferring the molecular film by casting the molecular solution described above on a polydimethylsiloxane plate of 0.5 to 1 cm in length and width and about 1 mm in thickness and pressing each electrode. Surface fixation by molecular gold-sulfur bonds has been confirmed by photoelectron spectroscopy.

次に、検出対象として塩化パラジウム(II)ジアセトニトリル錯体(PdClAN)を用いた。まずPdClAN 2.6mgをアセトニトリル200μLに溶解し、次いで蒸留水10mLを加え、水/アセトニトリル=50/1の濃度1mM (m=10−3, M=mol/L)の溶液を準備した。この溶液をマイクロピペットを用いて順次千倍希釈してゆき、1μM,1nM,1pM,1fM
(μ=10−6, n=10−9, p=10−12,f=10−15)の各濃度の溶液を調製した。次に支持電解質として濃度0.1Mの過塩素酸カリウム(KClO)水溶液(アセトニトリル体積濃度2%含有)を調製した。これをセルに導入し測定に用いた。上記すべての容器は蒸留テトラヒドロフラン洗浄したテフロン製のものを用いた。
Next, palladium (II) diacetonitrile complex (PdCl 2 AN 2 ) was used as a detection target. First, 2.6 mg of PdCl 2 AN 2 was dissolved in 200 μL of acetonitrile, then 10 mL of distilled water was added, and a solution of water / acetonitrile = 50/1 in concentration of 1 mM (m = 10 −3 , M = mol / L) was prepared. . This solution is sequentially diluted 1000 times using a micropipette, and 1 μM, 1 nM, 1 pM, 1 fM
Solutions with various concentrations (μ = 10 −6 , n = 10 −9 , p = 10 −12 , f = 10 −15 ) were prepared. Next, a 0.1 M concentration potassium perchlorate (KClO 4 ) aqueous solution (containing 2% acetonitrile volume concentration) was prepared as a supporting electrolyte. This was introduced into a cell and used for measurement. All the above containers were made of Teflon washed with distilled tetrahydrofuran.

支持電解質溶液をセルに5mL加え、応答測定を行った。測定は、AutoLab社製(オランダ)のPGSTAT12を用い、Open Circuit Potential(OCP)測定を経時変化を記録しながら行った。参照電極にはAg/AgCl電極および炭素電極を用いた。各濃度のPdClAN溶液を50μLセルに濃度の薄い順に加え、準備した上記の各電極a、b、c、dのOCP変化を記録した。検出濃度は加えた後の濃度とし、すなわち1fMの溶液50μLをセル内の支持電解質溶液5mLに加えた場合、検出濃度は10aM(a=10−18)となる。同様に1pMの時は10fM、1nMの時は10pM,1μMの時は10nM、1mMの時は10μMとなる。検出濃度をmMオーダーにする場合はPdClAN溶液を3〜5mLセルに加えた。また、場合に応じてマイクロピペッタを用い加える容量を増減させた。塩化パラジウム(II)が電極と反応した場合、OCPが上昇することが基礎実験から分かっている。各濃度におけるOCPの変化があるかないかを測定し、検出限界を調べた。なお、支持電解質KClO溶液のみでは各電極に応答はないことを確認している。5 mL of the supporting electrolyte solution was added to the cell, and response measurement was performed. The measurement was performed using PGSTAT12 manufactured by AutoLab (Netherlands), and the Open Circuit Potential (OCP) measurement was performed while recording the change over time. An Ag / AgCl electrode and a carbon electrode were used as reference electrodes. Each concentration of PdCl 2 AN 2 solution was added to a 50 μL cell in ascending order of concentration, and the OCP changes of the prepared electrodes a, b, c and d were recorded. The detection concentration is the concentration after the addition, that is, when 50 μL of 1 fM solution is added to 5 mL of the supporting electrolyte solution in the cell, the detection concentration is 10 aM (a = 10 −18 ). Similarly, 10 fM for 1 pM, 10 pM for 1 nM, 10 nM for 1 μM, and 10 μM for 1 mM. When the detection concentration was set to the order of mM, the PdCl 2 AN 2 solution was added to the 3 to 5 mL cell. Further, the capacity to be added was increased or decreased depending on the case using a micropipette. It has been found from basic experiments that OCP rises when palladium (II) chloride reacts with the electrode. Whether or not there was a change in OCP at each concentration was measured, and the detection limit was examined. It has been confirmed that there is no response to each electrode with the supporting electrolyte KClO 4 solution alone.

図4に炭素電極を参照電極に用いた実験における検出限界の結果を示す。横軸は各電極の面積に対応し、横軸の右端から、一辺1cmの正方形の金電極aの面積、直径約0.1mmの金電極bの面積、本発明の10μm×0.2μmの金電極cの面積、本発明の一辺約100nmの金電極dの面積である。縦軸は実験に用いた各電極における検出限界を示している。金電極aは主にmM,μMにおける応答があり、nMが検出限界であった。金電極bはpMが検出限界であった。これに対し、μmからnmのディメンジョンを有する金電極c、dは、1cmや0.1mmのディメンジョンを有する金電極a、bではみられなかったfMさらにはaMでの応答があり、検出限界すなわち感度の大幅な増強効果が観測された。実験結果からμm以下のディメンジョンでは、電極面積の微小化の効果が現れ、本発明の電極を用いたセンシングの検出限界すなわち感度の増強が起こる。   FIG. 4 shows the result of detection limit in an experiment using a carbon electrode as a reference electrode. The horizontal axis corresponds to the area of each electrode. From the right end of the horizontal axis, the area of the square gold electrode a having a side of 1 cm, the area of the gold electrode b having a diameter of about 0.1 mm, and the 10 μm × 0.2 μm gold of the present invention. The area of the electrode c is the area of the gold electrode d having a side of about 100 nm in the present invention. The vertical axis represents the detection limit at each electrode used in the experiment. The gold electrode a mainly responded in mM and μM, and nM was the detection limit. The gold electrode b had a detection limit of pM. On the other hand, the gold electrodes c and d having a dimension of μm to nm have a response at fM or aM that was not observed with the gold electrodes a and b having a dimension of 1 cm or 0.1 mm, and the detection limit, that is, A significant sensitivity enhancement effect was observed. From the experimental results, when the dimension is μm or less, the effect of miniaturizing the electrode area appears, and the detection limit of sensing using the electrode of the present invention, that is, the enhancement of sensitivity occurs.

本発明の微小電極は、ナノメーターレベルのもの、中でも微小電極アレイとして利用しうるので、微小コンデンサーやダイオードやトランジスタの部品、溶液中SPM測定に必要な金属チップやカンチレバーの機能部分、センサー電極、メモリー素子、電気化学測定のための電極窓、微小光学素子の部品等に適用できる。
特に、本発明の微小電極は、計測用電極として電気計測に利用することで、濃度の希薄な溶液中の溶質測定を高感度で測定、検量することが可能であり、例えばガス、CFC(クロロフルオロカーボン)、VOC(揮発性有機化合物)、無機物、カチオンおよびアニオンのイオン類、有機物、両親媒性分子、錯体、環境ホルモン、脂質、蛋白、酵素、抗原抗体、核酸塩基類の生態関連物質等のセンシング、分析、測定に利用可能である。
The microelectrode of the present invention can be used as a nanometer level, in particular, a microelectrode array. Therefore, a microcapacitor, a diode, a transistor component, a functional part of a metal chip or a cantilever necessary for SPM measurement in solution, a sensor electrode, It can be applied to memory elements, electrode windows for electrochemical measurements, and parts of micro optical elements.
In particular, the microelectrode of the present invention can be used for electrical measurement as an electrode for measurement, so that solute measurement in a dilute solution can be measured and calibrated with high sensitivity. For example, gas, CFC (chloroform) Fluorocarbons), VOCs (volatile organic compounds), inorganics, cations and anions, organics, amphiphilic molecules, complexes, environmental hormones, lipids, proteins, enzymes, antigen antibodies, nucleobases and other biologically relevant substances It can be used for sensing, analysis and measurement.

Claims (6)

支持基板、該支持基板上に配設された微細パターン電極及び該微細パターン電極の先端露出部以外を被覆する絶縁性被覆物からなる計測用の微小電極であって
前記微細パターン電極の先端露出部は該微細パターン電極の断面の微小面積で側面において形成されてな
前記微細パターン電極の断面の微小面積を形成する幅及び厚みがそれぞれ50〜200nmであり
前記微細パターン電極がAuとCrとからなることを特徴とする微小電極。
Supporting substrate, a microelectrode for Ru measurement name an insulating coating covering the non-distal exposed portion of the support disposed on the substrate fine pattern electrodes and the fine pattern electrodes,
Distal exposed portion of the fine pattern electrodes Ri Na formed in the side surface in the minute area of the cross section of the fine pattern electrodes,
The width and thickness for forming a minute area of the cross section of the fine pattern electrode are each 50 to 200 nm ,
Microelectrodes the fine pattern electrode is characterized Rukoto such from Au and Cr.
前記微細パターン電極の先端露出部が前記支持基板及び前記絶縁性被覆物の端面と面一に形成されてなることを特徴とする請求項1に記載の微小電極。  2. The microelectrode according to claim 1, wherein a tip exposed portion of the fine pattern electrode is formed flush with an end face of the support substrate and the insulating coating. 前記微細パターン電極の断面に有機分子が吸着されていることを特徴とする請求項1又は2に記載の微小電極。 3. The microelectrode according to claim 1, wherein organic molecules are adsorbed on a cross section of the fine pattern electrode. 前記有機分子がチオール分子であることを特徴とする請求項に記載の微小電極。The microelectrode according to claim 3 , wherein the organic molecule is a thiol molecule. (A)支持基板上にレジスト膜を被着させ、レジスト膜に微細パターン電極に対応するレジストパターンを形成する工程と、(B)このレジストパターンの上から導電材を付着する工程と、(C)レジストとともにレジスト上の堆積導電材を除去するリフトオフ工程と、(D)得られた微細パターン電極を絶縁性材料で被覆する工程と、(E)側面において微細パターン電極の断面を露出させて微小面積の電極先端露出部を形成する工程を含むことを特徴とする請求項1記載の微小電極の製造方法。(A) a step of depositing a resist film on the support substrate, and forming a resist pattern corresponding to the fine pattern electrode on the resist film; (B) a step of attaching a conductive material on the resist pattern; ) A lift-off process for removing the deposited conductive material on the resist together with the resist; (D) a process for coating the obtained fine pattern electrode with an insulating material; 2. The method of manufacturing a microelectrode according to claim 1 , further comprising a step of forming an electrode tip exposed portion having an area. 前記(E)工程において、前記電極先端露出部を前記支持基板及び前記絶縁性被覆物の端面と面一に形成することを特徴とする請求項に記載の微小電極の製造方法。6. The method of manufacturing a microelectrode according to claim 5 , wherein, in the step (E), the electrode tip exposed portion is formed flush with the end surface of the support substrate and the insulating coating.
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